intr.h revision 1.29 1 /* $NetBSD: intr.h,v 1.29 2007/06/17 06:04:30 tsutsui Exp $ */
2
3 /*
4 * Copyright (c) 1998 Jonathan Stone. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Jonathan Stone for
17 * the NetBSD Project.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #ifndef _PMAX_INTR_H_
34 #define _PMAX_INTR_H_
35
36 #include <sys/device.h>
37 #include <sys/lock.h>
38 #include <sys/queue.h>
39
40 #define IPL_NONE 0 /* disable only this interrupt */
41 #define IPL_SOFT 1 /* generic software interrupts (SI 0) */
42 #define IPL_SOFTCLOCK 2 /* clock software interrupts (SI 0) */
43 #define IPL_SOFTNET 3 /* network software interrupts (SI 1) */
44 #define IPL_SOFTSERIAL 4 /* serial software interrupts (SI 1) */
45 #define IPL_BIO 5 /* disable block I/O interrupts */
46 #define IPL_NET 6 /* disable network interrupts */
47 #define IPL_TTY 7 /* disable terminal interrupts */
48 #define IPL_VM 8
49 #define IPL_SERIAL IPL_TTY /* disable serial interrupts */
50 #define IPL_CLOCK 9 /* disable clock interrupts */
51 #define IPL_STATCLOCK 10
52 #define IPL_HIGH IPL_STATCLOCK /* disable all interrupts */
53 #define IPL_SCHED IPL_HIGH
54 #define IPL_LOCK IPL_HIGH
55
56 #define _IPL_N 11
57
58 #define _IPL_SI0_FIRST IPL_SOFT
59 #define _IPL_SI0_LAST IPL_SOFTCLOCK
60
61 #define _IPL_SI1_FIRST IPL_SOFTNET
62 #define _IPL_SI1_LAST IPL_SOFTSERIAL
63
64 /* Soft interrupt numbers. */
65 #define SI_SOFT 0 /* generic software interrupts */
66 #define SI_SOFTSERIAL 1 /* serial software interrupts */
67 #define SI_SOFTNET 2 /* network software interrupts */
68 #define SI_SOFTCLOCK 3 /* clock software interrupts */
69
70 #define SI_NQUEUES 4
71
72 #define SI_QUEUENAMES { \
73 "misc", \
74 "serial", \
75 "net", \
76 "clock", \
77 }
78
79 #ifdef _KERNEL
80 #ifndef _LOCORE
81
82 #include <mips/cpuregs.h>
83 #include <mips/locore.h>
84
85 #define splhigh() _splraise(MIPS_INT_MASK)
86 #define spl0() (void)_spllower(0)
87 #define splx(s) (void)_splset(s)
88 #define splbio() splraiseipl(makeiplcookie(IPL_BIO))
89 #define splnet() splraiseipl(makeiplcookie(IPL_NET))
90 #define spltty() splraiseipl(makeiplcookie(IPL_TTY))
91 #define splserial() spltty()
92 #define splvm() splraiseipl(makeiplcookie(IPL_VM))
93 #define splclock() splraiseipl(makeiplcookie(IPL_CLOCK))
94 #define splstatclock() splraiseipl(makeiplcookie(IPL_STATCLOCK))
95
96 #define splsched() splhigh()
97 #define spllock() splhigh()
98
99 #define _SPL_SOFT MIPS_SOFT_INT_MASK_0
100 #define _SPL_SOFTCLOCK MIPS_SOFT_INT_MASK_0
101 #define _SPL_SOFTNET (MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
102 #define _SPL_SOFTSERIAL (MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
103
104 #define splsoft() _splraise(_SPL_SOFT)
105 #define splsoftclock() _splraise(_SPL_SOFTCLOCK)
106 #define splsoftnet() _splraise(_SPL_SOFTNET)
107 #define splsoftserial() _splraise(_SPL_SOFTSERIAL)
108
109 extern const int *ipl2spl_table;
110
111 typedef int ipl_t;
112 typedef struct {
113 int _spl;
114 } ipl_cookie_t;
115
116 ipl_cookie_t makeiplcookie(ipl_t);
117
118 static inline int
119 splraiseipl(ipl_cookie_t icookie)
120 {
121
122 return _splraise(icookie._spl);
123 }
124
125 /* Conventionals ... */
126
127 #define MIPS_SPLHIGH (MIPS_INT_MASK)
128 #define MIPS_SPL0 (MIPS_INT_MASK_0|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
129 #define MIPS_SPL1 (MIPS_INT_MASK_1|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
130 #define MIPS_SPL3 (MIPS_INT_MASK_3|MIPS_SOFT_INT_MASK_0|MIPS_SOFT_INT_MASK_1)
131 #define MIPS_SPL_0_1 (MIPS_INT_MASK_1|MIPS_SPL0)
132 #define MIPS_SPL_0_1_2 (MIPS_INT_MASK_2|MIPS_SPL_0_1)
133 #define MIPS_SPL_0_1_3 (MIPS_INT_MASK_3|MIPS_SPL_0_1)
134 #define MIPS_SPL_0_1_2_3 (MIPS_INT_MASK_3|MIPS_SPL_0_1_2)
135
136 struct intrhand {
137 int (*ih_func) __P((void *));
138 void *ih_arg;
139 struct evcnt ih_count;
140 };
141 extern struct intrhand intrtab[];
142
143 #define SYS_DEV_SCC0 0
144 #define SYS_DEV_SCC1 1
145 #define SYS_DEV_LANCE 2
146 #define SYS_DEV_SCSI 3
147 #define SYS_DEV_OPT0 4
148 #define SYS_DEV_OPT1 5
149 #define SYS_DEV_OPT2 6
150 #define SYS_DEV_DTOP 7
151 #define SYS_DEV_ISDN 8
152 #define SYS_DEV_FDC 9
153 #define SYS_DEV_BOGUS -1
154 #define MAX_DEV_NCOOKIES 10
155
156
157 struct pmax_intrhand {
158 LIST_ENTRY(pmax_intrhand) ih_q;
159 int (*ih_func)(void *);
160 void *ih_arg;
161 };
162
163 #include <mips/softintr.h>
164
165 extern struct evcnt pmax_clock_evcnt;
166 extern struct evcnt pmax_fpu_evcnt;
167 extern struct evcnt pmax_memerr_evcnt;
168
169 void intr_init(void);
170 #endif /* !_LOCORE */
171 #endif /* _KERNEL */
172
173 #endif /* !_PMAX_INTR_H_ */
174