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locore.h revision 1.1 
      1 /*	$NetBSD: locore.h,v 1.1 1996/05/19 01:32:56 jonathan Exp $	*/
      2 
      3 /*
      4  * Copyright 1996 The Board of Trustees of The Leland Stanford
      5  * Junior University. All Rights Reserved.
      6  *
      7  * Permission to use, copy, modify, and distribute this
      8  * software and its documentation for any purpose and without
      9  * fee is hereby granted, provided that the above copyright
     10  * notice appear in all copies.  Stanford University
     11  * makes no representations about the suitability of this
     12  * software for any purpose.  It is provided "as is" without
     13  * express or implied warranty.
     14  */
     15 
     16 /*
     17  * Jump table for MIPS cpu locore functions that are implemented
     18  * differently on different generations, or instruction-level
     19  * archtecture (ISA) level, the Mips family.
     20  * The following functions must be provided for each mips ISA level:
     21  *
     22  *
     23  *	MachConfigCache
     24  *	MachFlushCache
     25  *	MachFlushDCache
     26  *	MachFlushICache
     27  *	MachForceCacheUpdate
     28  *	MachSetPID
     29  *	MachTLBFlush
     30  *	MachTLBFlushAddr __P()
     31  *	MachTLBUpdate (u_int, (pt_entry_t?) u_int);
     32  *	MachTLBWriteIndexed
     33  *
     34  * We currently provide support for:
     35  *
     36  *	r2000 and r3000 (mips ISA-I)
     37  *	r4000 and r4400 in 32-bit mode (mips ISA-III?)
     38  */
     39 
     40 #ifndef _MIPS_LOCORE_H
     41 #define  _MIPS_LOCORE_H
     42 
     43 extern void mips_r2000_ConfigCache  __P((void));
     44 extern void mips_r2000_FlushCache  __P((void));
     45 extern void mips_r2000_FlushDCache  __P((vm_offset_t addr, vm_offset_t len));
     46 extern void mips_r2000_FlushICache  __P((vm_offset_t addr, vm_offset_t len));
     47 extern void mips_r2000_ForceCacheUpdate __P((void));
     48 extern void mips_r2000_SetPID   __P((int pid));
     49 extern void mips_r2000_TLBFlush __P((void));
     50 extern void mips_r2000_TLBFlushAddr   __P( /* XXX Really pte highpart ? */
     51 					  (vm_offset_t addr));
     52 extern void mips_r2000_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int));
     53 extern void mips_r2000_TLBWriteIndexed  __P((u_int index, u_int high,
     54 					    u_int low));
     55 
     56 extern void mips_r4000_ConfigCache __P((void));
     57 extern void mips_r4000_FlushCache  __P((void));
     58 extern void mips_r4000_FlushDCache __P((vm_offset_t addr, vm_offset_t len));
     59 extern void mips_r4000_FlushICache __P((vm_offset_t addr, vm_offset_t len));
     60 extern void mips_r4000_ForceCacheUpdate __P((void));
     61 extern void mips_r4000_SetPID  __P((int pid));
     62 extern void mips_r4000_TLBFlush __P((void));
     63 extern void mips_r4000_TLBFlushAddr __P( /* XXX Really pte highpart ? */
     64 					  (vm_offset_t addr));
     65 extern void mips_r4000_TLBUpdate __P((u_int, /*pt_entry_t*/ u_int));
     66 extern void mips_r4000_TLBWriteIndexed __P((u_int index, u_int high,
     67 					    u_int low));
     68 
     69 /*
     70  *  A vector with an entry for each mips-ISA-level dependent
     71  * locore function, and macros which jump through it.
     72  * XXX the macro names are chosen to be compatible with the old
     73  * Sprite  coding-convention names used in 4.4bsd/pmax.
     74  */
     75 typedef struct  {
     76 	void (*configCache) __P((void));
     77 	void (*flushCache)  __P((void));
     78 	void (*flushDCache) __P((vm_offset_t addr, vm_offset_t len));
     79 	void (*flushICache) __P((vm_offset_t addr, vm_offset_t len));
     80 	void (*forceCacheUpdate)  __P((void));
     81 	void (*setTLBpid)  __P((int pid));
     82 	void (*tlbFlush)  __P((void));
     83 	void (*tlbFlushAddr)  __P((vm_offset_t)); /* XXX Really pte highpart ? */
     84 	void (*tlbUpdate)  __P((u_int highreg, u_int lowreg));
     85 	void (*tlbWriteIndexed)  __P((u_int, u_int, u_int));
     86 } mips_locore_jumpvec_t;
     87 
     88 
     89 /*
     90  * The "active" locore-fuction vector, and
     91 
     92  */
     93 extern mips_locore_jumpvec_t mips_locore_jumpvec;
     94 extern mips_locore_jumpvec_t r2000_locore_vec;
     95 extern mips_locore_jumpvec_t r4000_locore_vec;
     96 
     97 #define MachConfigCache		(*(mips_locore_jumpvec.configCache))
     98 #define MachFlushCache		(*(mips_locore_jumpvec.flushCache))
     99 #define MachFlushDCache		(*(mips_locore_jumpvec.flushDCache))
    100 #define MachFlushICache		(*(mips_locore_jumpvec.flushICache))
    101 #define MachForceCacheUpdate	(*(mips_locore_jumpvec.forceCacheUpdate))
    102 #define MachSetPID		(*(mips_locore_jumpvec.setTLBpid))
    103 #define MachTLBFlush		(*(mips_locore_jumpvec.tlbFlush))
    104 #define MachTLBFlushAddr	(*(mips_locore_jumpvec.tlbFlushAddr))
    105 #define MachTLBUpdate		(*(mips_locore_jumpvec.tlbUpdate))
    106 #define MachTLBWriteIndexed	(*(mips_locore_jumpvec.tlbWriteIndexed))
    107 
    108 #endif	/* _MIPS_LOCORE_H */
    109