1 1.5 tsutsui /* $NetBSD: z8530var.h,v 1.5 2008/03/29 19:15:35 tsutsui Exp $ */ 2 1.2 ad 3 1.2 ad /* 4 1.2 ad * Copyright (c) 1994 Gordon W. Ross 5 1.2 ad * Copyright (c) 1992, 1993 6 1.2 ad * The Regents of the University of California. All rights reserved. 7 1.2 ad * 8 1.2 ad * This software was developed by the Computer Systems Engineering group 9 1.2 ad * at Lawrence Berkeley Laboratory under DARPA contract BG 91-66 and 10 1.2 ad * contributed to Berkeley. 11 1.2 ad * 12 1.2 ad * All advertising materials mentioning features or use of this software 13 1.2 ad * must display the following acknowledgement: 14 1.2 ad * This product includes software developed by the University of 15 1.2 ad * California, Lawrence Berkeley Laboratory. 16 1.2 ad * 17 1.2 ad * Redistribution and use in source and binary forms, with or without 18 1.2 ad * modification, are permitted provided that the following conditions 19 1.2 ad * are met: 20 1.2 ad * 1. Redistributions of source code must retain the above copyright 21 1.2 ad * notice, this list of conditions and the following disclaimer. 22 1.2 ad * 2. Redistributions in binary form must reproduce the above copyright 23 1.2 ad * notice, this list of conditions and the following disclaimer in the 24 1.2 ad * documentation and/or other materials provided with the distribution. 25 1.2 ad * 3. All advertising materials mentioning features or use of this software 26 1.2 ad * must display the following acknowledgement: 27 1.2 ad * This product includes software developed by the University of 28 1.2 ad * California, Berkeley and its contributors. 29 1.2 ad * 4. Neither the name of the University nor the names of its contributors 30 1.2 ad * may be used to endorse or promote products derived from this software 31 1.2 ad * without specific prior written permission. 32 1.2 ad * 33 1.2 ad * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 34 1.2 ad * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 35 1.2 ad * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 36 1.2 ad * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 37 1.2 ad * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 38 1.2 ad * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 39 1.2 ad * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 40 1.2 ad * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 41 1.2 ad * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 42 1.2 ad * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 43 1.2 ad * SUCH DAMAGE. 44 1.2 ad * 45 1.2 ad * @(#)zsvar.h 8.1 (Berkeley) 6/11/93 46 1.2 ad */ 47 1.2 ad 48 1.2 ad /* 49 1.2 ad * XXX XXX XXX THIS DOES NOT WORK WITH MULTIPLE ATTACHMENTS!!! XXX XXX XXX 50 1.2 ad */ 51 1.2 ad 52 1.2 ad #include <dev/ic/z8530sc.h> 53 1.2 ad 54 1.2 ad struct zsc_softc { 55 1.5 tsutsui device_t zsc_dev; /* required first: base device */ 56 1.2 ad struct zs_chanstate *zsc_cs[2]; /* channel A and B soft state */ 57 1.2 ad /* Machine-dependent part follows... */ 58 1.2 ad int zsc_addroffset; /* used as "cookie" to identify scc */ 59 1.2 ad void *zsc_sih; 60 1.2 ad }; 61 1.2 ad 62 1.2 ad /* 63 1.2 ad * Functions to read and write individual registers in a channel. 64 1.2 ad * The ZS chip requires a 1.6 uSec. recovery time between accesses, 65 1.2 ad * and the Alpha TC hardware does NOT take care of this for you. 66 1.2 ad * The delay is now handled inside the chip access functions. 67 1.2 ad * These could be inlines, but with the delay, speed is moot. 68 1.2 ad */ 69 1.2 ad 70 1.2 ad u_int zs_read_reg(struct zs_chanstate *cs, u_int reg); 71 1.2 ad u_int zs_read_csr(struct zs_chanstate *cs); 72 1.2 ad u_int zs_read_data(struct zs_chanstate *cs); 73 1.2 ad 74 1.2 ad void zs_write_reg(struct zs_chanstate *cs, u_int reg, u_int val); 75 1.2 ad void zs_write_csr(struct zs_chanstate *cs, u_int val); 76 1.2 ad void zs_write_data(struct zs_chanstate *cs, u_int val); 77 1.2 ad 78 1.2 ad /* Interrupt priority for the SCC chip; needs to match ZSHARD_PRI. */ 79 1.2 ad #define splzs() spltty() 80 1.4 ad #define IPL_ZS IPL_TTY 81