kn02.h revision 1.4
1 /* $NetBSD: kn02.h,v 1.4 1994/10/26 21:10:28 cgd Exp $ */ 2 3 /*- 4 * Copyright (c) 1992, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * This code is derived from software contributed to Berkeley by 8 * The Mach Operating System project at Carnegie-Mellon University, 9 * Ralph Campbell and Rick Macklem. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the University of 22 * California, Berkeley and its contributors. 23 * 4. Neither the name of the University nor the names of its contributors 24 * may be used to endorse or promote products derived from this software 25 * without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 28 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 29 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 30 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 31 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 32 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 33 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 34 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 35 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 36 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 37 * SUCH DAMAGE. 38 * 39 * @(#)kn02.h 8.1 (Berkeley) 6/10/93 40 */ 41 42 /* 43 * Mach Operating System 44 * Copyright (c) 1991,1990,1989 Carnegie Mellon University 45 * All Rights Reserved. 46 * 47 * Permission to use, copy, modify and distribute this software and 48 * its documentation is hereby granted, provided that both the copyright 49 * notice and this permission notice appear in all copies of the 50 * software, derivative works or modified versions, and any portions 51 * thereof, and that both notices appear in supporting documentation. 52 * 53 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 54 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 55 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 56 * 57 * Carnegie Mellon requests users of this software to return to 58 * 59 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 60 * School of Computer Science 61 * Carnegie Mellon University 62 * Pittsburgh PA 15213-3890 63 * 64 * any improvements or extensions that they make and grant Carnegie the 65 * rights to redistribute these changes. 66 */ 67 /* 68 * HISTORY 69 * Log: kn02.h,v 70 * Revision 2.5 91/05/14 17:23:30 mrt 71 * Correcting copyright 72 * 73 * Revision 2.4 91/02/05 17:42:03 mrt 74 * Added author notices 75 * [91/02/04 11:14:23 mrt] 76 * 77 * Changed to use new Mach copyright 78 * [91/02/02 12:12:58 mrt] 79 * 80 * Revision 2.3 90/12/05 23:32:04 af 81 * 82 * 83 * Revision 2.1.1.2 90/11/01 02:48:10 af 84 * Reworked a bit, made reentrant. 85 * 86 * Revision 2.1.1.1 90/10/03 11:48:22 af 87 * Created, from the DEC specs: 88 * "DECstation 5000/200 KN02 System Module Functional Specification" 89 * Workstation Systems Engineering, Palo Alto, CA. Aug 27, 1990. 90 * [90/09/03 af] 91 */ 92 /* 93 * File: kn02.h 94 * Author: Alessandro Forin, Carnegie Mellon University 95 * Date: 9/90 96 * 97 * Definitions specific to the KN02 processor (3max) 98 */ 99 100 #ifndef MIPS_KN02_H 101 #define MIPS_KN02_H 1 102 103 /* 104 * KN02's Physical address space 105 */ 106 107 #define KN02_PHYS_MIN 0x00000000 /* 512 Meg */ 108 #define KN02_PHYS_MAX 0x1fffffff 109 110 /* 111 * Memory map 112 */ 113 114 #define KN02_PHYS_MEMORY_START 0x00000000 115 #define KN02_PHYS_MEMORY_END 0x1dffffff /* 480 Meg in 15 slots */ 116 117 /* 118 * I/O map 119 */ 120 121 #define KN02_PHYS_TC_0_START 0x1e000000 /* TURBOchannel, slot 0 */ 122 #define KN02_PHYS_TC_0_END 0x1e3fffff /* 4 Meg, option0 */ 123 124 #define KN02_PHYS_TC_1_START 0x1e400000 /* TURBOchannel, slot 1 */ 125 #define KN02_PHYS_TC_1_END 0x1e7fffff /* 4 Meg, option1 */ 126 127 #define KN02_PHYS_TC_2_START 0x1e800000 /* TURBOchannel, slot 2 */ 128 #define KN02_PHYS_TC_2_END 0x1ebfffff /* 4 Meg, option2 */ 129 130 #define KN02_PHYS_TC_3_START 0x1ec00000 /* TURBOchannel, slot 3 */ 131 #define KN02_PHYS_TC_3_END 0x1effffff /* 4 Meg, reserved*/ 132 133 #define KN02_PHYS_TC_4_START 0x1f000000 /* TURBOchannel, slot 4 */ 134 #define KN02_PHYS_TC_4_END 0x1f3fffff /* 4 Meg, reserved*/ 135 136 #define KN02_PHYS_TC_5_START 0x1f400000 /* TURBOchannel, slot 5 */ 137 #define KN02_PHYS_TC_5_END 0x1f7fffff /* 4 Meg, SCSI */ 138 139 #define KN02_PHYS_TC_6_START 0x1f800000 /* TURBOchannel, slot 6 */ 140 #define KN02_PHYS_TC_6_END 0x1fbfffff /* 4 Meg, ether */ 141 142 #define KN02_PHYS_TC_7_START 0x1fc00000 /* TURBOchannel, slot 7 */ 143 #define KN02_PHYS_TC_7_END 0x1fffffff /* 4 Meg, system devices */ 144 145 #define KN02_PHYS_TC_START KN02_PHYS_TC_0_START 146 #define KN02_PHYS_TC_END KN02_PHYS_TC_7_END /* 32 Meg */ 147 148 #define KN02_TC_NSLOTS 8 149 #define KN02_TC_MIN 0 150 #define KN02_TC_MAX 6 /* don't look at system slot */ 151 152 /* 153 * System devices 154 */ 155 156 #define KN02_SYS_ROM_START KN02_PHYS_TC_7_START+0x000000 157 #define KN02_SYS_ROM_END KN02_PHYS_TC_7_START+0x07ffff 158 159 #define KN02_SYS_RESERVED KN02_PHYS_TC_7_START+0x080000 160 161 #define KN02_SYS_CHKSYN KN02_PHYS_TC_7_START+0x100000 162 163 #define KN02_SYS_ERRADR KN02_PHYS_TC_7_START+0x180000 164 165 #define KN02_SYS_DZ KN02_PHYS_TC_7_START+0x200000 166 167 #define KN02_SYS_CLOCK KN02_PHYS_TC_7_START+0x280000 168 169 #define KN02_SYS_CSR KN02_PHYS_TC_7_START+0x300000 170 171 #define KN02_SYS_ROM1_START KN02_PHYS_TC_7_START+0x380000 172 #define KN02_SYS_ROM1_END KN02_PHYS_TC_7_START+0x3fffff 173 174 175 /* 176 * Interrupts 177 */ 178 179 #define KN02_INT_FPA IP_LEV7 /* Floating Point coproc */ 180 #define KN02_INT_RES1 IP_LEV6 /* reserved, unused */ 181 #define KN02_INT_MEM IP_LEV5 /* memory controller */ 182 #define KN02_INT_RES2 IP_LEV4 /* reserved, unused */ 183 #define KN02_INT_CLOCK IP_LEV3 /* rtc chip */ 184 #define KN02_INT_IO IP_LEV2 /* I/O slots */ 185 186 /* 187 * System board registers 188 */ 189 190 /* system Status and Control register */ 191 192 #define KN02_CSR_IOINT 0x000000ff /* ro */ 193 /* Interrupt pending */ 194 # define KN02_IP_DZ 0x00000080 /* serial lines */ 195 # define KN02_IP_LANCE 0x00000040 /* thin ethernet */ 196 # define KN02_IP_SCSI 0x00000020 /* ASC scsi controller */ 197 # define KN02_IP_XXXX 0x00000018 /* unused */ 198 # define KN02_IP_SLOT2 0x00000004 /* option slot 2 */ 199 # define KN02_IP_SLOT1 0x00000002 /* option slot 1 */ 200 # define KN02_IP_SLOT0 0x00000001 /* option slot 0 */ 201 202 #define KN02_CSR_BAUD38 0x00000100 /* rw */ 203 /* Max DZ baud rate */ 204 #define KN02_CSR_DIAGDN 0x00000200 /* rw */ 205 /* Diag jumper */ 206 #define KN02_CSR_BNK32M 0x00000400 /* rw */ 207 /* Memory bank stride */ 208 #define KN02_CSR_TXDIS 0x00000800 /* rw */ 209 /* Disable DZ xmit */ 210 #define KN02_CSR_LEDIAG 0x00001000 /* rw */ 211 /* Latch ECC */ 212 #define KN02_CSR_CORRECT 0x00002000 /* rw */ 213 /* ECC corrects single bit */ 214 #define KN02_CSR_ECCMD 0x0000c000 /* rw */ 215 /* ECC logic mode */ 216 #define KN02_CSR_IOINTEN 0x00ff0000 /* rw */ 217 #define KN02_CSR_IOINTEN_SHIFT 16 /* Interrupt enable */ 218 219 #define KN02_CSR_NRMMOD 0x01000000 /* ro */ 220 /* Diag jumper state */ 221 #define KN02_CSR_REFEVEN 0x02000000 /* ro */ 222 /* Refreshing even mem bank */ 223 #define KN02_CSR_PRSVNVR 0x04000000 /* ro */ 224 /* Preserve NVR jumper */ 225 #define KN02_CSR_PSWARN 0x08000000 /* ro */ 226 /* PS overheating */ 227 #define KN02_CSR_RRESERVED 0xf0000000 /* rz */ 228 229 #define KN02_CSR_LEDS 0x000000ff /* wo */ 230 /* Diag LEDs */ 231 #define KN02_CSR_WRESERVED 0xff000000 /* wz */ 232 233 234 /* Error address status register */ 235 236 #define KN02_ERR_ADDRESS 0x07ffffff /* phys address */ 237 #define KN02_ERR_RESERVED 0x08000000 /* unused */ 238 #define KN02_ERR_ECCERR 0x10000000 /* ECC error */ 239 #define KN02_ERR_WRITE 0x20000000 /* read/write transaction */ 240 #define KN02_ERR_CPU 0x40000000 /* CPU or device initiator */ 241 #define KN02_ERR_VALID 0x80000000 /* Info is valid */ 242 243 /* ECC check/syndrome status register */ 244 245 #define KN02_ECC_SYNLO 0x0000007f /* syndrome, even bank */ 246 #define KN02_ECC_SNGLO 0x00000080 /* single bit err, " */ 247 #define KN02_ECC_CHKLO 0x00007f00 /* check bits, " " */ 248 #define KN02_ECC_VLDLO 0x00008000 /* info valid for " */ 249 #define KN02_ECC_SYNHI 0x007f0000 /* syndrome, odd bank */ 250 #define KN02_ECC_SNGHI 0x00800000 /* single bit err, " */ 251 #define KN02_ECC_CHKHI 0x7f000000 /* check bits, " " */ 252 #define KN02_ECC_VLDHI 0x80000000 /* info valid for " */ 253 254 255 #endif /* MIPS_KN02_H */ 256
Indexes created Fri Sep 26 08:10:20 GMT 2025