ioasic.c revision 1.1.2.15 1 1.1.2.15 nisimura /* $NetBSD: ioasic.c,v 1.1.2.15 1999/11/30 08:49:52 nisimura Exp $ */
2 1.1.2.1 nisimura
3 1.1.2.5 nisimura /*
4 1.1.2.5 nisimura * Copyright (c) 1994, 1995 Carnegie-Mellon University.
5 1.1.2.5 nisimura * All rights reserved.
6 1.1.2.5 nisimura *
7 1.1.2.5 nisimura * Author: Keith Bostic, Chris G. Demetriou, Jonathan Stone
8 1.1.2.5 nisimura *
9 1.1.2.5 nisimura * Permission to use, copy, modify and distribute this software and
10 1.1.2.5 nisimura * its documentation is hereby granted, provided that both the copyright
11 1.1.2.5 nisimura * notice and this permission notice appear in all copies of the
12 1.1.2.5 nisimura * software, derivative works or modified versions, and any portions
13 1.1.2.5 nisimura * thereof, and that both notices appear in supporting documentation.
14 1.1.2.5 nisimura *
15 1.1.2.5 nisimura * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.1.2.5 nisimura * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.1.2.5 nisimura * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.1.2.5 nisimura *
19 1.1.2.5 nisimura * Carnegie Mellon requests users of this software to return to
20 1.1.2.5 nisimura *
21 1.1.2.5 nisimura * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.1.2.5 nisimura * School of Computer Science
23 1.1.2.5 nisimura * Carnegie Mellon University
24 1.1.2.5 nisimura * Pittsburgh PA 15213-3890
25 1.1.2.5 nisimura *
26 1.1.2.5 nisimura * any improvements or extensions that they make and grant Carnegie the
27 1.1.2.5 nisimura * rights to redistribute these changes.
28 1.1.2.5 nisimura */
29 1.1.2.5 nisimura
30 1.1.2.1 nisimura #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
31 1.1.2.1 nisimura
32 1.1.2.15 nisimura __KERNEL_RCSID(0, "$NetBSD: ioasic.c,v 1.1.2.15 1999/11/30 08:49:52 nisimura Exp $");
33 1.1.2.1 nisimura
34 1.1.2.1 nisimura #include <sys/param.h>
35 1.1.2.1 nisimura #include <sys/systm.h>
36 1.1.2.1 nisimura #include <sys/device.h>
37 1.1.2.1 nisimura
38 1.1.2.1 nisimura #include <machine/bus.h>
39 1.1.2.1 nisimura #include <machine/intr.h>
40 1.1.2.1 nisimura
41 1.1.2.5 nisimura #include <pmax/pmax/pmaxtype.h>
42 1.1.2.1 nisimura #include <dev/tc/tcvar.h>
43 1.1.2.4 drochner #include <dev/tc/ioasicvar.h>
44 1.1.2.1 nisimura #include <pmax/tc/ioasicreg.h>
45 1.1.2.5 nisimura
46 1.1.2.5 nisimura #include "opt_dec_3min.h"
47 1.1.2.5 nisimura #include "opt_dec_maxine.h"
48 1.1.2.5 nisimura #include "opt_dec_3maxplus.h"
49 1.1.2.1 nisimura
50 1.1.2.1 nisimura int ioasicmatch __P((struct device *, struct cfdata *, void *));
51 1.1.2.1 nisimura void ioasicattach __P((struct device *, struct device *, void *));
52 1.1.2.1 nisimura
53 1.1.2.1 nisimura struct cfattach ioasic_ca = {
54 1.1.2.1 nisimura sizeof(struct ioasic_softc), ioasicmatch, ioasicattach,
55 1.1.2.1 nisimura };
56 1.1.2.1 nisimura
57 1.1.2.1 nisimura struct ioasic_dev *ioasic_devs;
58 1.1.2.1 nisimura int ioasic_ndevs, builtin_ndevs;
59 1.1.2.1 nisimura
60 1.1.2.11 nisimura tc_addr_t ioasic_base;
61 1.1.2.11 nisimura
62 1.1.2.11 nisimura extern struct ioasic_dev xine_ioasic_devs[];
63 1.1.2.11 nisimura extern int xine_builtin_ndevs, xine_ioasic_ndevs;
64 1.1.2.11 nisimura extern struct ioasic_dev kmin_ioasic_devs[];
65 1.1.2.11 nisimura extern int kmin_builtin_ndevs, kmin_ioasic_ndevs;
66 1.1.2.11 nisimura extern struct ioasic_dev kn03_ioasic_devs[];
67 1.1.2.11 nisimura extern int kn03_builtin_ndevs, kn03_ioasic_ndevs;
68 1.1.2.11 nisimura
69 1.1.2.1 nisimura int
70 1.1.2.1 nisimura ioasicmatch(parent, cfdata, aux)
71 1.1.2.1 nisimura struct device *parent;
72 1.1.2.1 nisimura struct cfdata *cfdata;
73 1.1.2.1 nisimura void *aux;
74 1.1.2.1 nisimura {
75 1.1.2.1 nisimura struct tc_attach_args *ta = aux;
76 1.1.2.1 nisimura
77 1.1.2.1 nisimura /* Make sure that we're looking for this type of device. */
78 1.1.2.1 nisimura if (strncmp("IOCTL ", ta->ta_modname, TC_ROM_LLEN))
79 1.1.2.1 nisimura return (0);
80 1.1.2.1 nisimura
81 1.1.2.5 nisimura if (cfdata->cf_unit > 0)
82 1.1.2.5 nisimura return (0);
83 1.1.2.5 nisimura
84 1.1.2.15 nisimura return (1);
85 1.1.2.15 nisimura }
86 1.1.2.15 nisimura
87 1.1.2.15 nisimura void
88 1.1.2.15 nisimura ioasicattach(parent, self, aux)
89 1.1.2.15 nisimura struct device *parent, *self;
90 1.1.2.15 nisimura void *aux;
91 1.1.2.15 nisimura {
92 1.1.2.15 nisimura struct ioasic_softc *sc = (struct ioasic_softc *)self;
93 1.1.2.15 nisimura struct tc_attach_args *ta = aux;
94 1.1.2.15 nisimura int i, imsk;
95 1.1.2.15 nisimura
96 1.1.2.15 nisimura sc->sc_bst = ta->ta_memt;
97 1.1.2.15 nisimura if (bus_space_map(ta->ta_memt, ta->ta_addr,
98 1.1.2.15 nisimura 0x400000, 0, &sc->sc_bsh)) {
99 1.1.2.15 nisimura printf("%s: unable to map device\n", sc->sc_dv.dv_xname);
100 1.1.2.15 nisimura return;
101 1.1.2.15 nisimura }
102 1.1.2.15 nisimura sc->sc_dmat = ta->ta_dmat;
103 1.1.2.15 nisimura sc->sc_cookie = ta->ta_cookie;
104 1.1.2.15 nisimura
105 1.1.2.15 nisimura sc->sc_base = ta->ta_addr; /* XXX XXX XXX */
106 1.1.2.15 nisimura
107 1.1.2.15 nisimura printf("\n");
108 1.1.2.15 nisimura
109 1.1.2.5 nisimura switch (systype) {
110 1.1.2.5 nisimura #if defined(DEC_MAXINE)
111 1.1.2.5 nisimura case DS_MAXINE:
112 1.1.2.1 nisimura ioasic_devs = xine_ioasic_devs;
113 1.1.2.1 nisimura ioasic_ndevs = xine_ioasic_ndevs;
114 1.1.2.1 nisimura builtin_ndevs = xine_builtin_ndevs;
115 1.1.2.5 nisimura break;
116 1.1.2.5 nisimura #endif
117 1.1.2.11 nisimura #if defined(DEC_3MIN)
118 1.1.2.5 nisimura case DS_3MIN:
119 1.1.2.11 nisimura ioasic_devs = kmin_ioasic_devs;
120 1.1.2.11 nisimura ioasic_ndevs = kmin_ioasic_ndevs;
121 1.1.2.11 nisimura builtin_ndevs = kmin_builtin_ndevs;
122 1.1.2.11 nisimura break;
123 1.1.2.11 nisimura #endif
124 1.1.2.11 nisimura #if defined(DEC_3MAXPLUS)
125 1.1.2.5 nisimura case DS_3MAXPLUS:
126 1.1.2.1 nisimura ioasic_devs = kn03_ioasic_devs;
127 1.1.2.1 nisimura ioasic_ndevs = kn03_ioasic_ndevs;
128 1.1.2.1 nisimura builtin_ndevs = kn03_builtin_ndevs;
129 1.1.2.5 nisimura break;
130 1.1.2.5 nisimura #endif
131 1.1.2.5 nisimura default:
132 1.1.2.1 nisimura panic("ioasicmatch: how did we get here?");
133 1.1.2.5 nisimura }
134 1.1.2.1 nisimura
135 1.1.2.1 nisimura /*
136 1.1.2.1 nisimura * Turn off all device interrupt bits.
137 1.1.2.1 nisimura * (This _does_ include TC option slot bits.
138 1.1.2.1 nisimura */
139 1.1.2.9 nisimura imsk = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
140 1.1.2.1 nisimura for (i = 0; i < ioasic_ndevs; i++)
141 1.1.2.9 nisimura imsk &= ~ioasic_devs[i].iad_intrbits;
142 1.1.2.9 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, imsk);
143 1.1.2.1 nisimura
144 1.1.2.5 nisimura /*
145 1.1.2.5 nisimura * Try to configure each device.
146 1.1.2.5 nisimura */
147 1.1.2.7 nisimura ioasic_attach_devs(sc, ioasic_devs, builtin_ndevs);
148 1.1.2.1 nisimura }
149 1.1.2.1 nisimura
150 1.1.2.1 nisimura void
151 1.1.2.1 nisimura ioasic_intr_establish(ioa, cookie, level, func, arg)
152 1.1.2.1 nisimura struct device *ioa;
153 1.1.2.1 nisimura void *cookie, *arg;
154 1.1.2.14 nisimura int level;
155 1.1.2.1 nisimura int (*func) __P((void *));
156 1.1.2.1 nisimura {
157 1.1.2.1 nisimura struct ioasic_softc *sc = (void *)ioasic_cd.cd_devs[0];
158 1.1.2.10 nisimura int i, intrbits;
159 1.1.2.1 nisimura
160 1.1.2.1 nisimura for (i = 0; i < ioasic_ndevs; i++) {
161 1.1.2.1 nisimura if (ioasic_devs[i].iad_cookie == cookie)
162 1.1.2.5 nisimura goto found;
163 1.1.2.1 nisimura }
164 1.1.2.9 nisimura panic("ioasic_intr_establish: invalid cookie %d", (int)cookie);
165 1.1.2.5 nisimura found:
166 1.1.2.5 nisimura
167 1.1.2.9 nisimura intrtab[(int)cookie].ih_func = func;
168 1.1.2.9 nisimura intrtab[(int)cookie].ih_arg = arg;
169 1.1.2.1 nisimura
170 1.1.2.1 nisimura intrbits = ioasic_devs[i].iad_intrbits;
171 1.1.2.10 nisimura i = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
172 1.1.2.10 nisimura i |= intrbits;
173 1.1.2.10 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, i);
174 1.1.2.1 nisimura iplmask[level] |= intrbits;
175 1.1.2.1 nisimura }
176 1.1.2.1 nisimura
177 1.1.2.1 nisimura void
178 1.1.2.1 nisimura ioasic_intr_disestablish(ioa, cookie)
179 1.1.2.1 nisimura struct device *ioa;
180 1.1.2.1 nisimura void *cookie;
181 1.1.2.1 nisimura {
182 1.1.2.15 nisimura panic("ioasic_intr_disestablish: cookie %d", (int)cookie);
183 1.1.2.1 nisimura }
184 1.1.2.1 nisimura
185 1.1.2.1 nisimura /*
186 1.1.2.1 nisimura * spl(9) for IOASIC DECstations
187 1.1.2.1 nisimura */
188 1.1.2.1 nisimura int _splraise_ioasic __P((int));
189 1.1.2.1 nisimura int _spllower_ioasic __P((int));
190 1.1.2.11 nisimura int _splrestore_ioasic __P((int));
191 1.1.2.1 nisimura
192 1.1.2.1 nisimura int
193 1.1.2.1 nisimura _splraise_ioasic(lvl)
194 1.1.2.1 nisimura int lvl;
195 1.1.2.1 nisimura {
196 1.1.2.1 nisimura u_int32_t new;
197 1.1.2.1 nisimura
198 1.1.2.1 nisimura new = oldiplmask[lvl] = *(u_int32_t *)(ioasic_base + IOASIC_IMSK);
199 1.1.2.11 nisimura new &= iplmask[IPL_HIGH] &~ iplmask[lvl];
200 1.1.2.1 nisimura *(u_int32_t *)(ioasic_base + IOASIC_IMSK) = new;
201 1.1.2.1 nisimura tc_wmb();
202 1.1.2.11 nisimura return lvl;
203 1.1.2.1 nisimura }
204 1.1.2.1 nisimura
205 1.1.2.1 nisimura int
206 1.1.2.11 nisimura _spllower_ioasic(lvl)
207 1.1.2.1 nisimura {
208 1.1.2.11 nisimura u_int32_t new;
209 1.1.2.1 nisimura
210 1.1.2.11 nisimura new = oldiplmask[lvl] = *(u_int32_t *)(ioasic_base + IOASIC_IMSK);
211 1.1.2.1 nisimura *(u_int32_t *)(ioasic_base + IOASIC_IMSK) = iplmask[IPL_HIGH];
212 1.1.2.1 nisimura tc_wmb();
213 1.1.2.11 nisimura return lvl;
214 1.1.2.1 nisimura }
215 1.1.2.1 nisimura
216 1.1.2.1 nisimura int
217 1.1.2.11 nisimura _splrestore_ioasic(lvl)
218 1.1.2.1 nisimura int lvl;
219 1.1.2.1 nisimura {
220 1.1.2.11 nisimura if (lvl > IPL_HIGH)
221 1.1.2.11 nisimura _splset(MIPS_SR_INT_IE | lvl);
222 1.1.2.11 nisimura else {
223 1.1.2.11 nisimura *(u_int32_t *)(ioasic_base + IOASIC_IMSK) = oldiplmask[lvl];
224 1.1.2.1 nisimura tc_wmb();
225 1.1.2.1 nisimura }
226 1.1.2.11 nisimura return lvl;
227 1.1.2.1 nisimura }
228