ioasic.c revision 1.3 1 1.3 simonb /* $NetBSD: ioasic.c,v 1.3 1999/12/06 11:52:36 simonb Exp $ */
2 1.2 nisimura
3 1.2 nisimura /*
4 1.2 nisimura * Copyright (c) 1994, 1995 Carnegie-Mellon University.
5 1.2 nisimura * All rights reserved.
6 1.2 nisimura *
7 1.2 nisimura * Author: Keith Bostic, Chris G. Demetriou, Jonathan Stone
8 1.2 nisimura *
9 1.2 nisimura * Permission to use, copy, modify and distribute this software and
10 1.2 nisimura * its documentation is hereby granted, provided that both the copyright
11 1.2 nisimura * notice and this permission notice appear in all copies of the
12 1.2 nisimura * software, derivative works or modified versions, and any portions
13 1.2 nisimura * thereof, and that both notices appear in supporting documentation.
14 1.2 nisimura *
15 1.2 nisimura * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 1.2 nisimura * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 1.2 nisimura * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 1.2 nisimura *
19 1.2 nisimura * Carnegie Mellon requests users of this software to return to
20 1.2 nisimura *
21 1.2 nisimura * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 1.2 nisimura * School of Computer Science
23 1.2 nisimura * Carnegie Mellon University
24 1.2 nisimura * Pittsburgh PA 15213-3890
25 1.2 nisimura *
26 1.2 nisimura * any improvements or extensions that they make and grant Carnegie the
27 1.2 nisimura * rights to redistribute these changes.
28 1.2 nisimura */
29 1.2 nisimura
30 1.2 nisimura #include <sys/param.h>
31 1.2 nisimura #include <sys/systm.h>
32 1.2 nisimura #include <sys/device.h>
33 1.2 nisimura
34 1.2 nisimura #include <machine/bus.h>
35 1.2 nisimura #include <dev/tc/tcvar.h>
36 1.2 nisimura #include <dev/tc/ioasicvar.h>
37 1.2 nisimura
38 1.2 nisimura #include <pmax/pmax/pmaxtype.h>
39 1.2 nisimura #include <pmax/pmax/asic.h>
40 1.2 nisimura #include <pmax/pmax/kmin.h>
41 1.2 nisimura #include <pmax/pmax/maxine.h>
42 1.2 nisimura #include <pmax/pmax/kn03.h>
43 1.2 nisimura #include <pmax/pmax/turbochannel.h> /* interrupt enable declaration */
44 1.2 nisimura
45 1.2 nisimura #include "opt_dec_3min.h"
46 1.2 nisimura #include "opt_dec_maxine.h"
47 1.2 nisimura #include "opt_dec_3maxplus.h"
48 1.2 nisimura
49 1.2 nisimura #define C(x) ((void *)(x))
50 1.2 nisimura #define ARRAY_SIZEOF(x) (sizeof((x)) / sizeof((x)[0]))
51 1.2 nisimura
52 1.2 nisimura #if defined(DEC_3MIN)
53 1.2 nisimura static struct ioasic_dev kmin_ioasic_devs[] = {
54 1.2 nisimura { "lance", 0x0C0000, C(KMIN_LANCE_SLOT), IOASIC_INTR_LANCE, },
55 1.2 nisimura { "scc", 0x100000, C(KMIN_SCC0_SLOT), IOASIC_INTR_SCC_0, },
56 1.2 nisimura { "scc", 0x180000, C(KMIN_SCC1_SLOT), IOASIC_INTR_SCC_1, },
57 1.2 nisimura { "mc146818", 0x200000, C(-1), 0 },
58 1.2 nisimura { "asc", 0x300000, C(KMIN_SCSI_SLOT), IOASIC_INTR_SCSI, },
59 1.2 nisimura };
60 1.2 nisimura static int kmin_builtin_ndevs = ARRAY_SIZEOF(kmin_ioasic_devs);
61 1.2 nisimura static int kmin_ioasic_ndevs = ARRAY_SIZEOF(kmin_ioasic_devs);
62 1.2 nisimura #endif
63 1.2 nisimura
64 1.2 nisimura #if defined(DEC_MAXINE)
65 1.2 nisimura static struct ioasic_dev xine_ioasic_devs[] = {
66 1.2 nisimura { "lance", 0x0C0000, C(XINE_LANCE_SLOT), IOASIC_INTR_LANCE },
67 1.2 nisimura { "scc", 0x100000, C(XINE_SCC0_SLOT), IOASIC_INTR_SCC_0 },
68 1.2 nisimura { "mc146818", 0x200000, C(-1), 0 },
69 1.2 nisimura { "isdn", 0x240000, C(XINE_ISDN_SLOT), XINE_INTR_ISDN, },
70 1.2 nisimura { "dtop", 0x280000, C(XINE_DTOP_SLOT), XINE_INTR_DTOP, },
71 1.2 nisimura { "fdc", 0x2C0000, C(XINE_FLOPPY_SLOT), 0 },
72 1.2 nisimura { "asc", 0x300000, C(XINE_SCSI_SLOT), IOASIC_INTR_SCSI, },
73 1.2 nisimura { "(TC0)", 0x0, C(0), XINE_INTR_TC_0, },
74 1.2 nisimura { "(TC1)", 0x0, C(1), XINE_INTR_TC_1, },
75 1.2 nisimura { "(TC2)", 0x0, C(2), XINE_INTR_VINT, },
76 1.2 nisimura };
77 1.2 nisimura static int xine_builtin_ndevs = ARRAY_SIZEOF(xine_ioasic_devs) - 3;
78 1.2 nisimura static int xine_ioasic_ndevs = ARRAY_SIZEOF(xine_ioasic_devs);
79 1.2 nisimura #endif
80 1.2 nisimura
81 1.2 nisimura #if defined(DEC_3MAXPLUS)
82 1.2 nisimura static struct ioasic_dev kn03_ioasic_devs[] = {
83 1.2 nisimura { "lance", 0x0C0000, C(KN03_LANCE_SLOT), IOASIC_INTR_LANCE, },
84 1.2 nisimura { "z8530 ", 0x100000, C(KN03_SCC0_SLOT), IOASIC_INTR_SCC_0, },
85 1.3 simonb { "z8530 ", 0x180000, C(KN03_SCC1_SLOT), IOASIC_INTR_SCC_1, },
86 1.2 nisimura { "mc146818", 0x200000, C(-1), 0, },
87 1.2 nisimura { "asc", 0x300000, C(KN03_SCSI_SLOT), IOASIC_INTR_SCSI, },
88 1.2 nisimura { "(TC0)", 0x0, C(0), KN03_INTR_TC_0, },
89 1.2 nisimura { "(TC1)", 0x0, C(1), KN03_INTR_TC_1, },
90 1.2 nisimura { "(TC2)", 0x0, C(2), KN03_INTR_TC_2, },
91 1.2 nisimura };
92 1.2 nisimura static int kn03_builtin_ndevs = ARRAY_SIZEOF(kn03_ioasic_devs) - 3;
93 1.2 nisimura static int kn03_ioasic_ndevs = ARRAY_SIZEOF(kn03_ioasic_devs);
94 1.2 nisimura #endif
95 1.2 nisimura
96 1.2 nisimura static int ioasicmatch __P((struct device *, struct cfdata *, void *));
97 1.2 nisimura static void ioasicattach __P((struct device *, struct device *, void *));
98 1.2 nisimura
99 1.2 nisimura const struct cfattach ioasic_ca = {
100 1.2 nisimura sizeof(struct ioasic_softc), ioasicmatch, ioasicattach
101 1.2 nisimura };
102 1.2 nisimura
103 1.2 nisimura tc_addr_t ioasic_base = 0;
104 1.2 nisimura
105 1.2 nisimura static int
106 1.2 nisimura ioasicmatch(parent, cfdata, aux)
107 1.2 nisimura struct device *parent;
108 1.2 nisimura struct cfdata *cfdata;
109 1.2 nisimura void *aux;
110 1.2 nisimura {
111 1.2 nisimura struct tc_attach_args *ta = aux;
112 1.2 nisimura
113 1.2 nisimura /* Make sure that we're looking for this type of device. */
114 1.2 nisimura if (strncmp("IOCTL ", ta->ta_modname, TC_ROM_LLEN))
115 1.2 nisimura return (0);
116 1.2 nisimura
117 1.2 nisimura if (cfdata->cf_unit > 0)
118 1.2 nisimura return (0);
119 1.2 nisimura
120 1.2 nisimura return (1);
121 1.2 nisimura }
122 1.2 nisimura
123 1.2 nisimura static void
124 1.2 nisimura ioasicattach(parent, self, aux)
125 1.2 nisimura struct device *parent, *self;
126 1.2 nisimura void *aux;
127 1.2 nisimura {
128 1.2 nisimura struct ioasic_softc *sc = (struct ioasic_softc *)self;
129 1.2 nisimura struct tc_attach_args *ta = aux;
130 1.2 nisimura struct ioasic_dev *ioasic_devs;
131 1.2 nisimura int ioasic_ndevs, builtin_ndevs;
132 1.2 nisimura int i, imsk;
133 1.2 nisimura
134 1.2 nisimura sc->sc_bst = ta->ta_memt;
135 1.2 nisimura if (bus_space_map(ta->ta_memt, ta->ta_addr,
136 1.2 nisimura 0x400000, 0, &sc->sc_bsh)) {
137 1.2 nisimura printf("%s: unable to map device\n", sc->sc_dv.dv_xname);
138 1.2 nisimura return;
139 1.2 nisimura }
140 1.2 nisimura sc->sc_dmat = ta->ta_dmat;
141 1.2 nisimura sc->sc_cookie = ta->ta_cookie;
142 1.2 nisimura
143 1.2 nisimura sc->sc_base = ta->ta_addr; /* XXX XXX XXX */
144 1.2 nisimura
145 1.2 nisimura printf("\n");
146 1.2 nisimura
147 1.2 nisimura switch (systype) {
148 1.2 nisimura #if defined(DEC_3MIN)
149 1.2 nisimura case DS_3MIN:
150 1.2 nisimura ioasic_devs = kmin_ioasic_devs;
151 1.2 nisimura ioasic_ndevs = kmin_ioasic_ndevs;
152 1.2 nisimura builtin_ndevs = kmin_builtin_ndevs;
153 1.2 nisimura break;
154 1.2 nisimura #endif
155 1.2 nisimura #if defined(DEC_MAXINE)
156 1.2 nisimura case DS_MAXINE:
157 1.2 nisimura ioasic_devs = xine_ioasic_devs;
158 1.2 nisimura ioasic_ndevs = xine_ioasic_ndevs;
159 1.2 nisimura builtin_ndevs = xine_builtin_ndevs;
160 1.2 nisimura break;
161 1.2 nisimura #endif
162 1.2 nisimura #if defined(DEC_3MAXPLUS)
163 1.2 nisimura case DS_3MAXPLUS:
164 1.2 nisimura ioasic_devs = kn03_ioasic_devs;
165 1.2 nisimura ioasic_ndevs = kn03_ioasic_ndevs;
166 1.2 nisimura builtin_ndevs = kn03_builtin_ndevs;
167 1.2 nisimura break;
168 1.2 nisimura #endif
169 1.2 nisimura default:
170 1.2 nisimura panic("ioasicmatch: how did we get here?");
171 1.2 nisimura }
172 1.2 nisimura
173 1.2 nisimura /*
174 1.2 nisimura * Turn off all device interrupt bits.
175 1.2 nisimura * (This _does_ include TC option slot bits.
176 1.2 nisimura */
177 1.2 nisimura imsk = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
178 1.2 nisimura for (i = 0; i < ioasic_ndevs; i++)
179 1.2 nisimura imsk &= ~ioasic_devs[i].iad_intrbits;
180 1.2 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, imsk);
181 1.2 nisimura
182 1.2 nisimura /*
183 1.2 nisimura * Try to configure each device.
184 1.2 nisimura */
185 1.2 nisimura ioasic_attach_devs(sc, ioasic_devs, builtin_ndevs);
186 1.2 nisimura }
187 1.2 nisimura
188 1.2 nisimura #if 1 /* XXX for now XXX */
189 1.2 nisimura void
190 1.2 nisimura ioasic_intr_establish(dev, cookie, level, handler, val)
191 1.2 nisimura struct device *dev;
192 1.2 nisimura void *cookie;
193 1.2 nisimura int level;
194 1.2 nisimura int (*handler) __P((void *));
195 1.2 nisimura void *val;
196 1.2 nisimura {
197 1.2 nisimura (*tc_enable_interrupt)((unsigned)cookie, handler, val, 1);
198 1.2 nisimura }
199 1.2 nisimura
200 1.2 nisimura #else /* XXX eventually XXX */
201 1.2 nisimura
202 1.2 nisimura void
203 1.2 nisimura ioasic_intr_establish(ioa, cookie, level, func, arg)
204 1.2 nisimura struct device *ioa;
205 1.2 nisimura void *cookie, *arg;
206 1.2 nisimura int level;
207 1.2 nisimura int (*func) __P((void *));
208 1.2 nisimura {
209 1.2 nisimura struct ioasic_softc *sc = (void *)ioasic_cd.cd_devs[0];
210 1.2 nisimura int i, intrbits;
211 1.2 nisimura
212 1.2 nisimura for (i = 0; i < ioasic_ndevs; i++) {
213 1.2 nisimura if (ioasic_devs[i].iad_cookie == cookie)
214 1.2 nisimura goto found;
215 1.2 nisimura }
216 1.2 nisimura panic("ioasic_intr_establish: invalid cookie %d", (int)cookie);
217 1.2 nisimura found:
218 1.2 nisimura
219 1.2 nisimura intrtab[(int)cookie].ih_func = func;
220 1.2 nisimura intrtab[(int)cookie].ih_arg = arg;
221 1.2 nisimura
222 1.2 nisimura intrbits = ioasic_devs[i].iad_intrbits;
223 1.2 nisimura i = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
224 1.2 nisimura i |= intrbits;
225 1.2 nisimura bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, i);
226 1.2 nisimura }
227 1.2 nisimura
228 1.2 nisimura void
229 1.2 nisimura ioasic_intr_disestablish(ioa, cookie)
230 1.2 nisimura struct device *ioa;
231 1.2 nisimura void *cookie;
232 1.2 nisimura {
233 1.2 nisimura panic("ioasic_intr_disestablish: cookie %d", (int)cookie);
234 1.2 nisimura }
235 1.2 nisimura #endif
236