ioasic.c revision 1.1.2.11
1 /* $NetBSD: ioasic.c,v 1.1.2.11 1999/08/13 09:01:51 nisimura Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Keith Bostic, Chris G. Demetriou, Jonathan Stone 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 32 __KERNEL_RCSID(0, "$NetBSD: ioasic.c,v 1.1.2.11 1999/08/13 09:01:51 nisimura Exp $"); 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/device.h> 37 38 #include <machine/bus.h> 39 #include <machine/intr.h> 40 41 #include <pmax/pmax/pmaxtype.h> 42 #include <dev/tc/tcvar.h> 43 #include <dev/tc/ioasicvar.h> 44 #include <pmax/tc/ioasicreg.h> 45 46 #include "opt_dec_3min.h" 47 #include "opt_dec_maxine.h" 48 #include "opt_dec_3maxplus.h" 49 50 int ioasicmatch __P((struct device *, struct cfdata *, void *)); 51 void ioasicattach __P((struct device *, struct device *, void *)); 52 53 struct cfattach ioasic_ca = { 54 sizeof(struct ioasic_softc), ioasicmatch, ioasicattach, 55 }; 56 57 struct ioasic_dev *ioasic_devs; 58 int ioasic_ndevs, builtin_ndevs; 59 60 tc_addr_t ioasic_base; 61 62 extern struct ioasic_dev xine_ioasic_devs[]; 63 extern int xine_builtin_ndevs, xine_ioasic_ndevs; 64 extern struct ioasic_dev kmin_ioasic_devs[]; 65 extern int kmin_builtin_ndevs, kmin_ioasic_ndevs; 66 extern struct ioasic_dev kn03_ioasic_devs[]; 67 extern int kn03_builtin_ndevs, kn03_ioasic_ndevs; 68 69 int 70 ioasicmatch(parent, cfdata, aux) 71 struct device *parent; 72 struct cfdata *cfdata; 73 void *aux; 74 { 75 struct tc_attach_args *ta = aux; 76 77 /* Make sure that we're looking for this type of device. */ 78 if (strncmp("IOCTL ", ta->ta_modname, TC_ROM_LLEN)) 79 return (0); 80 81 if (cfdata->cf_unit > 0) 82 return (0); 83 84 switch (systype) { 85 #if defined(DEC_MAXINE) 86 case DS_MAXINE: 87 ioasic_devs = xine_ioasic_devs; 88 ioasic_ndevs = xine_ioasic_ndevs; 89 builtin_ndevs = xine_builtin_ndevs; 90 break; 91 #endif 92 #if defined(DEC_3MIN) 93 case DS_3MIN: 94 ioasic_devs = kmin_ioasic_devs; 95 ioasic_ndevs = kmin_ioasic_ndevs; 96 builtin_ndevs = kmin_builtin_ndevs; 97 break; 98 #endif 99 #if defined(DEC_3MAXPLUS) 100 case DS_3MAXPLUS: 101 ioasic_devs = kn03_ioasic_devs; 102 ioasic_ndevs = kn03_ioasic_ndevs; 103 builtin_ndevs = kn03_builtin_ndevs; 104 break; 105 #endif 106 default: 107 panic("ioasicmatch: how did we get here?"); 108 } 109 110 return (1); 111 } 112 113 void 114 ioasicattach(parent, self, aux) 115 struct device *parent, *self; 116 void *aux; 117 { 118 struct ioasic_softc *sc = (struct ioasic_softc *)self; 119 struct tc_attach_args *ta = aux; 120 #if 0 121 int i, imsk; 122 #endif 123 124 sc->sc_bst = ta->ta_memt; 125 if (bus_space_map(ta->ta_memt, ta->ta_addr, 126 0x400000, 0, &sc->sc_bsh)) { 127 printf("%s: unable to map device\n", sc->sc_dv.dv_xname); 128 return; 129 } 130 sc->sc_dmat = ta->ta_dmat; 131 sc->sc_cookie = ta->ta_cookie; 132 133 sc->sc_base = ta->ta_addr; /* XXX XXX XXX */ 134 135 printf("\n"); 136 137 #if 0 138 /* 139 * Turn off all device interrupt bits. 140 * (This _does_ include TC option slot bits. 141 */ 142 imsk = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK); 143 for (i = 0; i < ioasic_ndevs; i++) 144 imsk &= ~ioasic_devs[i].iad_intrbits; 145 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, imsk); 146 147 (void)ioasic_lance_dma_setup(sc); 148 #endif 149 150 /* 151 * Try to configure each device. 152 */ 153 ioasic_attach_devs(sc, ioasic_devs, builtin_ndevs); 154 } 155 156 void 157 ioasic_intr_establish(ioa, cookie, level, func, arg) 158 struct device *ioa; 159 void *cookie, *arg; 160 tc_intrlevel_t level; 161 int (*func) __P((void *)); 162 { 163 struct ioasic_softc *sc = (void *)ioasic_cd.cd_devs[0]; 164 int i, intrbits; 165 166 for (i = 0; i < ioasic_ndevs; i++) { 167 if (ioasic_devs[i].iad_cookie == cookie) 168 goto found; 169 } 170 panic("ioasic_intr_establish: invalid cookie %d", (int)cookie); 171 found: 172 173 intrtab[(int)cookie].ih_func = func; 174 intrtab[(int)cookie].ih_arg = arg; 175 176 intrbits = ioasic_devs[i].iad_intrbits; 177 i = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK); 178 i |= intrbits; 179 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, i); 180 iplmask[level] |= intrbits; 181 } 182 183 void 184 ioasic_intr_disestablish(ioa, cookie) 185 struct device *ioa; 186 void *cookie; 187 { 188 printf("device %s with cookie %d: ", ioa->dv_xname, (int)cookie); 189 panic("ioasic_intr_disestablish called"); 190 } 191 192 char * 193 ioasic_lance_ether_address() 194 { 195 196 return (char *)(ioasic_base + IOASIC_SLOT_2_START); 197 } 198 199 #if 1 200 void ioasic_lance_dma_setup __P((void *)); 201 202 void 203 ioasic_lance_dma_setup(v) 204 void *v; 205 { 206 tc_addr_t tca; 207 u_int32_t ldp, csr; 208 209 tca = (tc_addr_t)v; 210 ldp = ((tca << 3) & ~(tc_addr_t)0x1f) | ((tca >> 29) & 0x1f); 211 *(u_int32_t *)IOASIC_REG_LANCE_DMAPTR(ioasic_base) = ldp; 212 tc_wmb(); 213 214 csr = *(u_int32_t *)IOASIC_REG_CSR(ioasic_base); 215 csr |= IOASIC_CSR_DMAEN_LANCE; 216 *(u_int32_t *)IOASIC_REG_CSR(ioasic_base) = csr; 217 tc_wmb(); 218 } 219 #endif 220 221 /* 222 * spl(9) for IOASIC DECstations 223 */ 224 int _splraise_ioasic __P((int)); 225 int _spllower_ioasic __P((int)); 226 int _splrestore_ioasic __P((int)); 227 228 int 229 _splraise_ioasic(lvl) 230 int lvl; 231 { 232 u_int32_t new; 233 234 new = oldiplmask[lvl] = *(u_int32_t *)(ioasic_base + IOASIC_IMSK); 235 new &= iplmask[IPL_HIGH] &~ iplmask[lvl]; 236 *(u_int32_t *)(ioasic_base + IOASIC_IMSK) = new; 237 tc_wmb(); 238 return lvl; 239 } 240 241 int 242 _spllower_ioasic(lvl) 243 { 244 u_int32_t new; 245 246 new = oldiplmask[lvl] = *(u_int32_t *)(ioasic_base + IOASIC_IMSK); 247 *(u_int32_t *)(ioasic_base + IOASIC_IMSK) = iplmask[IPL_HIGH]; 248 tc_wmb(); 249 return lvl; 250 } 251 252 int 253 _splrestore_ioasic(lvl) 254 int lvl; 255 { 256 if (lvl > IPL_HIGH) 257 _splset(MIPS_SR_INT_IE | lvl); 258 else { 259 *(u_int32_t *)(ioasic_base + IOASIC_IMSK) = oldiplmask[lvl]; 260 tc_wmb(); 261 } 262 return lvl; 263 } 264
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