ioasic.c revision 1.1.2.12 1 /* $NetBSD: ioasic.c,v 1.1.2.12 1999/09/09 07:09:32 nisimura Exp $ */
2
3 /*
4 * Copyright (c) 1994, 1995 Carnegie-Mellon University.
5 * All rights reserved.
6 *
7 * Author: Keith Bostic, Chris G. Demetriou, Jonathan Stone
8 *
9 * Permission to use, copy, modify and distribute this software and
10 * its documentation is hereby granted, provided that both the copyright
11 * notice and this permission notice appear in all copies of the
12 * software, derivative works or modified versions, and any portions
13 * thereof, and that both notices appear in supporting documentation.
14 *
15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
18 *
19 * Carnegie Mellon requests users of this software to return to
20 *
21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU
22 * School of Computer Science
23 * Carnegie Mellon University
24 * Pittsburgh PA 15213-3890
25 *
26 * any improvements or extensions that they make and grant Carnegie the
27 * rights to redistribute these changes.
28 */
29
30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */
31
32 __KERNEL_RCSID(0, "$NetBSD: ioasic.c,v 1.1.2.12 1999/09/09 07:09:32 nisimura Exp $");
33
34 #include <sys/param.h>
35 #include <sys/systm.h>
36 #include <sys/device.h>
37
38 #include <machine/bus.h>
39 #include <machine/intr.h>
40
41 #include <pmax/pmax/pmaxtype.h>
42 #include <dev/tc/tcvar.h>
43 #include <dev/tc/ioasicvar.h>
44 #include <pmax/tc/ioasicreg.h>
45
46 #include "opt_dec_3min.h"
47 #include "opt_dec_maxine.h"
48 #include "opt_dec_3maxplus.h"
49
50 int ioasicmatch __P((struct device *, struct cfdata *, void *));
51 void ioasicattach __P((struct device *, struct device *, void *));
52
53 struct cfattach ioasic_ca = {
54 sizeof(struct ioasic_softc), ioasicmatch, ioasicattach,
55 };
56
57 struct ioasic_dev *ioasic_devs;
58 int ioasic_ndevs, builtin_ndevs;
59
60 tc_addr_t ioasic_base;
61
62 extern struct ioasic_dev xine_ioasic_devs[];
63 extern int xine_builtin_ndevs, xine_ioasic_ndevs;
64 extern struct ioasic_dev kmin_ioasic_devs[];
65 extern int kmin_builtin_ndevs, kmin_ioasic_ndevs;
66 extern struct ioasic_dev kn03_ioasic_devs[];
67 extern int kn03_builtin_ndevs, kn03_ioasic_ndevs;
68
69 int
70 ioasicmatch(parent, cfdata, aux)
71 struct device *parent;
72 struct cfdata *cfdata;
73 void *aux;
74 {
75 struct tc_attach_args *ta = aux;
76
77 /* Make sure that we're looking for this type of device. */
78 if (strncmp("IOCTL ", ta->ta_modname, TC_ROM_LLEN))
79 return (0);
80
81 if (cfdata->cf_unit > 0)
82 return (0);
83
84 switch (systype) {
85 #if defined(DEC_MAXINE)
86 case DS_MAXINE:
87 ioasic_devs = xine_ioasic_devs;
88 ioasic_ndevs = xine_ioasic_ndevs;
89 builtin_ndevs = xine_builtin_ndevs;
90 break;
91 #endif
92 #if defined(DEC_3MIN)
93 case DS_3MIN:
94 ioasic_devs = kmin_ioasic_devs;
95 ioasic_ndevs = kmin_ioasic_ndevs;
96 builtin_ndevs = kmin_builtin_ndevs;
97 break;
98 #endif
99 #if defined(DEC_3MAXPLUS)
100 case DS_3MAXPLUS:
101 ioasic_devs = kn03_ioasic_devs;
102 ioasic_ndevs = kn03_ioasic_ndevs;
103 builtin_ndevs = kn03_builtin_ndevs;
104 break;
105 #endif
106 default:
107 panic("ioasicmatch: how did we get here?");
108 }
109
110 return (1);
111 }
112
113 void
114 ioasicattach(parent, self, aux)
115 struct device *parent, *self;
116 void *aux;
117 {
118 struct ioasic_softc *sc = (struct ioasic_softc *)self;
119 struct tc_attach_args *ta = aux;
120 #if 0
121 int i, imsk;
122 #endif
123
124 sc->sc_bst = ta->ta_memt;
125 if (bus_space_map(ta->ta_memt, ta->ta_addr,
126 0x400000, 0, &sc->sc_bsh)) {
127 printf("%s: unable to map device\n", sc->sc_dv.dv_xname);
128 return;
129 }
130 sc->sc_dmat = ta->ta_dmat;
131 sc->sc_cookie = ta->ta_cookie;
132
133 sc->sc_base = ta->ta_addr; /* XXX XXX XXX */
134
135 printf("\n");
136
137 #if 0
138 /*
139 * Turn off all device interrupt bits.
140 * (This _does_ include TC option slot bits.
141 */
142 imsk = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
143 for (i = 0; i < ioasic_ndevs; i++)
144 imsk &= ~ioasic_devs[i].iad_intrbits;
145 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, imsk);
146 #endif
147
148 /*
149 * Try to configure each device.
150 */
151 ioasic_attach_devs(sc, ioasic_devs, builtin_ndevs);
152 }
153
154 void
155 ioasic_intr_establish(ioa, cookie, level, func, arg)
156 struct device *ioa;
157 void *cookie, *arg;
158 tc_intrlevel_t level;
159 int (*func) __P((void *));
160 {
161 struct ioasic_softc *sc = (void *)ioasic_cd.cd_devs[0];
162 int i, intrbits;
163
164 for (i = 0; i < ioasic_ndevs; i++) {
165 if (ioasic_devs[i].iad_cookie == cookie)
166 goto found;
167 }
168 panic("ioasic_intr_establish: invalid cookie %d", (int)cookie);
169 found:
170
171 intrtab[(int)cookie].ih_func = func;
172 intrtab[(int)cookie].ih_arg = arg;
173
174 intrbits = ioasic_devs[i].iad_intrbits;
175 i = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
176 i |= intrbits;
177 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, i);
178 iplmask[level] |= intrbits;
179 }
180
181 void
182 ioasic_intr_disestablish(ioa, cookie)
183 struct device *ioa;
184 void *cookie;
185 {
186 printf("device %s with cookie %d: ", ioa->dv_xname, (int)cookie);
187 panic("ioasic_intr_disestablish called");
188 }
189
190 char *
191 ioasic_lance_ether_address()
192 {
193
194 return (char *)(ioasic_base + IOASIC_SLOT_2_START);
195 }
196
197 /*
198 * spl(9) for IOASIC DECstations
199 */
200 int _splraise_ioasic __P((int));
201 int _spllower_ioasic __P((int));
202 int _splrestore_ioasic __P((int));
203
204 int
205 _splraise_ioasic(lvl)
206 int lvl;
207 {
208 u_int32_t new;
209
210 new = oldiplmask[lvl] = *(u_int32_t *)(ioasic_base + IOASIC_IMSK);
211 new &= iplmask[IPL_HIGH] &~ iplmask[lvl];
212 *(u_int32_t *)(ioasic_base + IOASIC_IMSK) = new;
213 tc_wmb();
214 return lvl;
215 }
216
217 int
218 _spllower_ioasic(lvl)
219 {
220 u_int32_t new;
221
222 new = oldiplmask[lvl] = *(u_int32_t *)(ioasic_base + IOASIC_IMSK);
223 *(u_int32_t *)(ioasic_base + IOASIC_IMSK) = iplmask[IPL_HIGH];
224 tc_wmb();
225 return lvl;
226 }
227
228 int
229 _splrestore_ioasic(lvl)
230 int lvl;
231 {
232 if (lvl > IPL_HIGH)
233 _splset(MIPS_SR_INT_IE | lvl);
234 else {
235 *(u_int32_t *)(ioasic_base + IOASIC_IMSK) = oldiplmask[lvl];
236 tc_wmb();
237 }
238 return lvl;
239 }
240