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ioasic.c revision 1.1.2.15
      1 /* $NetBSD: ioasic.c,v 1.1.2.15 1999/11/30 08:49:52 nisimura Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
      5  * All rights reserved.
      6  *
      7  * Author: Keith Bostic, Chris G. Demetriou, Jonathan Stone
      8  *
      9  * Permission to use, copy, modify and distribute this software and
     10  * its documentation is hereby granted, provided that both the copyright
     11  * notice and this permission notice appear in all copies of the
     12  * software, derivative works or modified versions, and any portions
     13  * thereof, and that both notices appear in supporting documentation.
     14  *
     15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  *
     19  * Carnegie Mellon requests users of this software to return to
     20  *
     21  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  *  School of Computer Science
     23  *  Carnegie Mellon University
     24  *  Pittsburgh PA 15213-3890
     25  *
     26  * any improvements or extensions that they make and grant Carnegie the
     27  * rights to redistribute these changes.
     28  */
     29 
     30 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     31 
     32 __KERNEL_RCSID(0, "$NetBSD: ioasic.c,v 1.1.2.15 1999/11/30 08:49:52 nisimura Exp $");
     33 
     34 #include <sys/param.h>
     35 #include <sys/systm.h>
     36 #include <sys/device.h>
     37 
     38 #include <machine/bus.h>
     39 #include <machine/intr.h>
     40 
     41 #include <pmax/pmax/pmaxtype.h>
     42 #include <dev/tc/tcvar.h>
     43 #include <dev/tc/ioasicvar.h>
     44 #include <pmax/tc/ioasicreg.h>
     45 
     46 #include "opt_dec_3min.h"
     47 #include "opt_dec_maxine.h"
     48 #include "opt_dec_3maxplus.h"
     49 
     50 int	ioasicmatch __P((struct device *, struct cfdata *, void *));
     51 void	ioasicattach __P((struct device *, struct device *, void *));
     52 
     53 struct cfattach ioasic_ca = {
     54 	sizeof(struct ioasic_softc), ioasicmatch, ioasicattach,
     55 };
     56 
     57 struct ioasic_dev *ioasic_devs;
     58 int ioasic_ndevs, builtin_ndevs;
     59 
     60 tc_addr_t ioasic_base;
     61 
     62 extern struct ioasic_dev xine_ioasic_devs[];
     63 extern int xine_builtin_ndevs, xine_ioasic_ndevs;
     64 extern struct ioasic_dev kmin_ioasic_devs[];
     65 extern int kmin_builtin_ndevs, kmin_ioasic_ndevs;
     66 extern struct ioasic_dev kn03_ioasic_devs[];
     67 extern int kn03_builtin_ndevs, kn03_ioasic_ndevs;
     68 
     69 int
     70 ioasicmatch(parent, cfdata, aux)
     71 	struct device *parent;
     72 	struct cfdata *cfdata;
     73 	void *aux;
     74 {
     75 	struct tc_attach_args *ta = aux;
     76 
     77 	/* Make sure that we're looking for this type of device. */
     78 	if (strncmp("IOCTL   ", ta->ta_modname, TC_ROM_LLEN))
     79 		return (0);
     80 
     81 	if (cfdata->cf_unit > 0)
     82 		return (0);
     83 
     84 	return (1);
     85 }
     86 
     87 void
     88 ioasicattach(parent, self, aux)
     89 	struct device *parent, *self;
     90 	void *aux;
     91 {
     92 	struct ioasic_softc *sc = (struct ioasic_softc *)self;
     93 	struct tc_attach_args *ta = aux;
     94 	int i, imsk;
     95 
     96 	sc->sc_bst = ta->ta_memt;
     97 	if (bus_space_map(ta->ta_memt, ta->ta_addr,
     98 			0x400000, 0, &sc->sc_bsh)) {
     99 		printf("%s: unable to map device\n", sc->sc_dv.dv_xname);
    100 		return;
    101 	}
    102 	sc->sc_dmat = ta->ta_dmat;
    103 	sc->sc_cookie = ta->ta_cookie;
    104 
    105 	sc->sc_base = ta->ta_addr; /* XXX XXX XXX */
    106 
    107 	printf("\n");
    108 
    109 	switch (systype) {
    110 #if defined(DEC_MAXINE)
    111 	case DS_MAXINE:
    112 		ioasic_devs = xine_ioasic_devs;
    113 		ioasic_ndevs = xine_ioasic_ndevs;
    114 		builtin_ndevs = xine_builtin_ndevs;
    115 		break;
    116 #endif
    117 #if defined(DEC_3MIN)
    118 	case DS_3MIN:
    119 		ioasic_devs = kmin_ioasic_devs;
    120 		ioasic_ndevs = kmin_ioasic_ndevs;
    121 		builtin_ndevs = kmin_builtin_ndevs;
    122 		break;
    123 #endif
    124 #if defined(DEC_3MAXPLUS)
    125 	case DS_3MAXPLUS:
    126 		ioasic_devs = kn03_ioasic_devs;
    127 		ioasic_ndevs = kn03_ioasic_ndevs;
    128 		builtin_ndevs = kn03_builtin_ndevs;
    129 		break;
    130 #endif
    131 	default:
    132 		panic("ioasicmatch: how did we get here?");
    133 	}
    134 
    135 	/*
    136 	 * Turn off all device interrupt bits.
    137 	 * (This _does_ include TC option slot bits.
    138 	 */
    139 	imsk = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
    140 	for (i = 0; i < ioasic_ndevs; i++)
    141 		imsk &= ~ioasic_devs[i].iad_intrbits;
    142 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, imsk);
    143 
    144 	/*
    145 	 * Try to configure each device.
    146 	 */
    147 	ioasic_attach_devs(sc, ioasic_devs, builtin_ndevs);
    148 }
    149 
    150 void
    151 ioasic_intr_establish(ioa, cookie, level, func, arg)
    152 	struct device *ioa;
    153 	void *cookie, *arg;
    154 	int level;
    155 	int (*func) __P((void *));
    156 {
    157 	struct ioasic_softc *sc = (void *)ioasic_cd.cd_devs[0];
    158 	int i, intrbits;
    159 
    160 	for (i = 0; i < ioasic_ndevs; i++) {
    161 		if (ioasic_devs[i].iad_cookie == cookie)
    162 			goto found;
    163 	}
    164 	panic("ioasic_intr_establish: invalid cookie %d", (int)cookie);
    165 found:
    166 
    167 	intrtab[(int)cookie].ih_func = func;
    168 	intrtab[(int)cookie].ih_arg = arg;
    169 
    170 	intrbits = ioasic_devs[i].iad_intrbits;
    171 	i = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
    172 	i |= intrbits;
    173 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, i);
    174 	iplmask[level] |= intrbits;
    175 }
    176 
    177 void
    178 ioasic_intr_disestablish(ioa, cookie)
    179 	struct device *ioa;
    180 	void *cookie;
    181 {
    182 	panic("ioasic_intr_disestablish: cookie %d", (int)cookie);
    183 }
    184 
    185 /*
    186  * spl(9) for IOASIC DECstations
    187  */
    188 int _splraise_ioasic __P((int));
    189 int _spllower_ioasic __P((int));
    190 int _splrestore_ioasic __P((int));
    191 
    192 int
    193 _splraise_ioasic(lvl)
    194 	int lvl;
    195 {
    196 	u_int32_t new;
    197 
    198 	new = oldiplmask[lvl] = *(u_int32_t *)(ioasic_base + IOASIC_IMSK);
    199 	new &= iplmask[IPL_HIGH] &~ iplmask[lvl];
    200 	*(u_int32_t *)(ioasic_base + IOASIC_IMSK) = new;
    201 	tc_wmb();
    202 	return lvl;
    203 }
    204 
    205 int
    206 _spllower_ioasic(lvl)
    207 {
    208 	u_int32_t new;
    209 
    210 	new = oldiplmask[lvl] = *(u_int32_t *)(ioasic_base + IOASIC_IMSK);
    211 	*(u_int32_t *)(ioasic_base + IOASIC_IMSK) = iplmask[IPL_HIGH];
    212 	tc_wmb();
    213 	return lvl;
    214 }
    215 
    216 int
    217 _splrestore_ioasic(lvl)
    218 	int lvl;
    219 {
    220 	if (lvl > IPL_HIGH)
    221 		_splset(MIPS_SR_INT_IE | lvl);
    222 	else {
    223 		*(u_int32_t *)(ioasic_base + IOASIC_IMSK) = oldiplmask[lvl];
    224 		tc_wmb();
    225 	}
    226 	return lvl;
    227 }
    228