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ioasic.c revision 1.1.2.17
      1 /* $NetBSD: ioasic.c,v 1.1.2.17 2000/02/03 09:36:23 nisimura Exp $ */
      2 
      3 /*
      4  * Copyright (c) 1994, 1995 Carnegie-Mellon University.
      5  * All rights reserved.
      6  *
      7  * Author: Keith Bostic, Chris G. Demetriou, Jonathan Stone
      8  *
      9  * Permission to use, copy, modify and distribute this software and
     10  * its documentation is hereby granted, provided that both the copyright
     11  * notice and this permission notice appear in all copies of the
     12  * software, derivative works or modified versions, and any portions
     13  * thereof, and that both notices appear in supporting documentation.
     14  *
     15  * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
     16  * CONDITION.  CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
     17  * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
     18  *
     19  * Carnegie Mellon requests users of this software to return to
     20  *
     21  *  Software Distribution Coordinator  or  Software.Distribution (at) CS.CMU.EDU
     22  *  School of Computer Science
     23  *  Carnegie Mellon University
     24  *  Pittsburgh PA 15213-3890
     25  *
     26  * any improvements or extensions that they make and grant Carnegie the
     27  * rights to redistribute these changes.
     28  */
     29 
     30 #include <sys/cdefs.h>			/* RCS ID & Copyright macro defns */
     31 
     32 __KERNEL_RCSID(0, "$NetBSD: ioasic.c,v 1.1.2.17 2000/02/03 09:36:23 nisimura Exp $");
     33 
     34 #include "opt_dec_3min.h"
     35 #include "opt_dec_maxine.h"
     36 #include "opt_dec_3maxplus.h"
     37 
     38 #include <sys/param.h>
     39 #include <sys/systm.h>
     40 #include <sys/device.h>
     41 
     42 #include <machine/bus.h>
     43 #include <machine/intr.h>
     44 
     45 #include <pmax/pmax/pmaxtype.h>
     46 #include <dev/tc/tcvar.h>
     47 #include <dev/tc/ioasicreg.h>
     48 #include <dev/tc/ioasicvar.h>
     49 
     50 static int  ioasicmatch __P((struct device *, struct cfdata *, void *));
     51 static void ioasicattach __P((struct device *, struct device *, void *));
     52 
     53 const struct cfattach ioasic_ca = {
     54 	sizeof(struct ioasic_softc), ioasicmatch, ioasicattach,
     55 };
     56 
     57 tc_addr_t ioasic_base;
     58 
     59 /* There can be only one. */
     60 int ioasicfound;
     61 
     62 struct ioasic_dev *ioasic_devs;
     63 int ioasic_ndevs, builtin_ndevs;
     64 
     65 extern struct ioasic_dev kmin_ioasic_devs[];
     66 extern int kmin_builtin_ndevs, kmin_ioasic_ndevs;
     67 extern struct ioasic_dev xine_ioasic_devs[];
     68 extern int xine_builtin_ndevs, xine_ioasic_ndevs;
     69 extern struct ioasic_dev kn03_ioasic_devs[];
     70 extern int kn03_builtin_ndevs, kn03_ioasic_ndevs;
     71 
     72 static int
     73 ioasicmatch(parent, cfdata, aux)
     74 	struct device *parent;
     75 	struct cfdata *cfdata;
     76 	void *aux;
     77 {
     78 	struct tc_attach_args *ta = aux;
     79 
     80 	/* Make sure that we're looking for this type of device. */
     81 	if (strncmp("IOCTL   ", ta->ta_modname, TC_ROM_LLEN))
     82 		return (0);
     83 
     84 	if (ioasicfound)
     85 		return (0);
     86 
     87 	return (1);
     88 }
     89 
     90 static void
     91 ioasicattach(parent, self, aux)
     92 	struct device *parent, *self;
     93 	void *aux;
     94 {
     95 	struct ioasic_softc *sc = (struct ioasic_softc *)self;
     96 	struct tc_attach_args *ta = aux;
     97 	int i, imsk;
     98 
     99 	ioasicfound = 1;
    100 
    101 	sc->sc_bst = ta->ta_memt;
    102 	if (bus_space_map(ta->ta_memt, ta->ta_addr,
    103 			0x400000, 0, &sc->sc_bsh)) {
    104 		printf("%s: unable to map device\n", sc->sc_dv.dv_xname);
    105 		return;
    106 	}
    107 	sc->sc_dmat = ta->ta_dmat;
    108 	sc->sc_cookie = ta->ta_cookie;
    109 
    110 	sc->sc_base = ta->ta_addr; /* XXX XXX XXX */
    111 
    112 	printf("\n");
    113 
    114 	switch (systype) {
    115 #if defined(DEC_3MIN)
    116 	case DS_3MIN:
    117 		ioasic_devs = kmin_ioasic_devs;
    118 		ioasic_ndevs = kmin_ioasic_ndevs;
    119 		builtin_ndevs = kmin_builtin_ndevs;
    120 		break;
    121 #endif
    122 #if defined(DEC_MAXINE)
    123 	case DS_MAXINE:
    124 		ioasic_devs = xine_ioasic_devs;
    125 		ioasic_ndevs = xine_ioasic_ndevs;
    126 		builtin_ndevs = xine_builtin_ndevs;
    127 		break;
    128 #endif
    129 #if defined(DEC_3MAXPLUS)
    130 	case DS_3MAXPLUS:
    131 		ioasic_devs = kn03_ioasic_devs;
    132 		ioasic_ndevs = kn03_ioasic_ndevs;
    133 		builtin_ndevs = kn03_builtin_ndevs;
    134 		break;
    135 #endif
    136 	default:
    137 		panic("ioasicmatch: how did we get here?");
    138 	}
    139 
    140 	/*
    141 	 * Turn off all device interrupt bits.
    142 	 * (This _does_ include TC option slot bits.
    143 	 */
    144 	imsk = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
    145 	for (i = 0; i < ioasic_ndevs; i++)
    146 		imsk &= ~ioasic_devs[i].iad_intrbits;
    147 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, imsk);
    148 
    149 	/*
    150 	 * Try to configure each device.
    151 	 */
    152 	ioasic_attach_devs(sc, ioasic_devs, builtin_ndevs);
    153 }
    154 
    155 void
    156 ioasic_intr_establish(ioa, cookie, level, func, arg)
    157 	struct device *ioa;
    158 	void *cookie, *arg;
    159 	int level;
    160 	int (*func) __P((void *));
    161 {
    162 	struct ioasic_softc *sc = (void *)ioasic_cd.cd_devs[0];
    163 	int i, intrbits;
    164 
    165 	for (i = 0; i < ioasic_ndevs; i++) {
    166 		if (ioasic_devs[i].iad_cookie == cookie)
    167 			goto found;
    168 	}
    169 	panic("ioasic_intr_establish: invalid cookie %d", (int)cookie);
    170 found:
    171 
    172 	intrtab[(int)cookie].ih_func = func;
    173 	intrtab[(int)cookie].ih_arg = arg;
    174 
    175 	intrbits = ioasic_devs[i].iad_intrbits;
    176 	i = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK);
    177 	i |= intrbits;
    178 	bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, i);
    179 	iplmask[level] |= intrbits;
    180 }
    181 
    182 void
    183 ioasic_intr_disestablish(ioa, cookie)
    184 	struct device *ioa;
    185 	void *cookie;
    186 {
    187 	panic("ioasic_intr_disestablish: cookie %d", (int)cookie);
    188 }
    189 
    190 /*
    191  * spl(9) for IOASIC DECstations
    192  */
    193 int _splraise_ioasic __P((int));
    194 int _spllower_ioasic __P((int));
    195 int _splrestore_ioasic __P((int));
    196 
    197 int
    198 _splraise_ioasic(lvl)
    199 	int lvl;
    200 {
    201 	u_int32_t new;
    202 
    203 	new = oldiplmask[lvl] = *(u_int32_t *)(ioasic_base + IOASIC_IMSK);
    204 	new &= iplmask[IPL_HIGH] &~ iplmask[lvl];
    205 	*(u_int32_t *)(ioasic_base + IOASIC_IMSK) = new;
    206 	tc_wmb();
    207 	return lvl;
    208 }
    209 
    210 int
    211 _spllower_ioasic(lvl)
    212 {
    213 	u_int32_t new;
    214 
    215 	new = oldiplmask[lvl] = *(u_int32_t *)(ioasic_base + IOASIC_IMSK);
    216 	*(u_int32_t *)(ioasic_base + IOASIC_IMSK) = iplmask[IPL_HIGH];
    217 	tc_wmb();
    218 	return lvl;
    219 }
    220 
    221 int
    222 _splrestore_ioasic(lvl)
    223 	int lvl;
    224 {
    225 	if (lvl > IPL_HIGH)
    226 		_splset(MIPS_SR_INT_IE | lvl);
    227 	else {
    228 		*(u_int32_t *)(ioasic_base + IOASIC_IMSK) = oldiplmask[lvl];
    229 		tc_wmb();
    230 	}
    231 	return lvl;
    232 }
    233