ioasic.c revision 1.7
1 /* $NetBSD: ioasic.c,v 1.7 2000/01/10 03:24:41 simonb Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1995 Carnegie-Mellon University. 5 * All rights reserved. 6 * 7 * Author: Keith Bostic, Chris G. Demetriou, Jonathan Stone 8 * 9 * Permission to use, copy, modify and distribute this software and 10 * its documentation is hereby granted, provided that both the copyright 11 * notice and this permission notice appear in all copies of the 12 * software, derivative works or modified versions, and any portions 13 * thereof, and that both notices appear in supporting documentation. 14 * 15 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS" 16 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND 17 * FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE. 18 * 19 * Carnegie Mellon requests users of this software to return to 20 * 21 * Software Distribution Coordinator or Software.Distribution (at) CS.CMU.EDU 22 * School of Computer Science 23 * Carnegie Mellon University 24 * Pittsburgh PA 15213-3890 25 * 26 * any improvements or extensions that they make and grant Carnegie the 27 * rights to redistribute these changes. 28 */ 29 30 #include <sys/cdefs.h> /* RCS ID & Copyright macro defns */ 31 __KERNEL_RCSID(0, "$NetBSD: ioasic.c,v 1.7 2000/01/10 03:24:41 simonb Exp $"); 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/device.h> 36 37 #include <dev/tc/tcvar.h> 38 #include <dev/tc/ioasicvar.h> 39 40 #include <pmax/pmax/pmaxtype.h> 41 #include <pmax/pmax/asic.h> 42 #include <pmax/pmax/kmin.h> 43 #include <pmax/pmax/maxine.h> 44 #include <pmax/pmax/kn03.h> 45 #include <pmax/pmax/turbochannel.h> /* interrupt enable declaration */ 46 47 #include "opt_dec_3min.h" 48 #include "opt_dec_maxine.h" 49 #include "opt_dec_3maxplus.h" 50 51 #define C(x) ((void *)(x)) 52 #define ARRAY_SIZEOF(x) (sizeof((x)) / sizeof((x)[0])) 53 54 #if defined(DEC_3MIN) 55 static struct ioasic_dev kmin_ioasic_devs[] = { 56 { "lance", 0x0C0000, C(KMIN_LANCE_SLOT), IOASIC_INTR_LANCE, }, 57 { "scc", 0x100000, C(KMIN_SCC0_SLOT), IOASIC_INTR_SCC_0, }, 58 { "scc", 0x180000, C(KMIN_SCC1_SLOT), IOASIC_INTR_SCC_1, }, 59 { "mc146818", 0x200000, C(-1), 0 }, 60 { "asc", 0x300000, C(KMIN_SCSI_SLOT), IOASIC_INTR_SCSI, }, 61 }; 62 static int kmin_builtin_ndevs = ARRAY_SIZEOF(kmin_ioasic_devs); 63 static int kmin_ioasic_ndevs = ARRAY_SIZEOF(kmin_ioasic_devs); 64 #endif 65 66 #if defined(DEC_MAXINE) 67 static struct ioasic_dev xine_ioasic_devs[] = { 68 { "lance", 0x0C0000, C(XINE_LANCE_SLOT), IOASIC_INTR_LANCE }, 69 { "scc", 0x100000, C(XINE_SCC0_SLOT), IOASIC_INTR_SCC_0 }, 70 { "mc146818", 0x200000, C(-1), 0 }, 71 { "isdn", 0x240000, C(XINE_ISDN_SLOT), XINE_INTR_ISDN, }, 72 { "dtop", 0x280000, C(XINE_DTOP_SLOT), XINE_INTR_DTOP, }, 73 { "fdc", 0x2C0000, C(XINE_FLOPPY_SLOT), 0 }, 74 { "asc", 0x300000, C(XINE_SCSI_SLOT), IOASIC_INTR_SCSI, }, 75 { "(TC0)", 0x0, C(0), XINE_INTR_TC_0, }, 76 { "(TC1)", 0x0, C(1), XINE_INTR_TC_1, }, 77 { "(TC2)", 0x0, C(2), XINE_INTR_VINT, }, 78 }; 79 static int xine_builtin_ndevs = ARRAY_SIZEOF(xine_ioasic_devs) - 3; 80 static int xine_ioasic_ndevs = ARRAY_SIZEOF(xine_ioasic_devs); 81 #endif 82 83 #if defined(DEC_3MAXPLUS) 84 static struct ioasic_dev kn03_ioasic_devs[] = { 85 { "lance", 0x0C0000, C(KN03_LANCE_SLOT), IOASIC_INTR_LANCE, }, 86 { "z8530 ", 0x100000, C(KN03_SCC0_SLOT), IOASIC_INTR_SCC_0, }, 87 { "z8530 ", 0x180000, C(KN03_SCC1_SLOT), IOASIC_INTR_SCC_1, }, 88 { "mc146818", 0x200000, C(-1), 0, }, 89 { "asc", 0x300000, C(KN03_SCSI_SLOT), IOASIC_INTR_SCSI, }, 90 { "(TC0)", 0x0, C(0), KN03_INTR_TC_0, }, 91 { "(TC1)", 0x0, C(1), KN03_INTR_TC_1, }, 92 { "(TC2)", 0x0, C(2), KN03_INTR_TC_2, }, 93 }; 94 static int kn03_builtin_ndevs = ARRAY_SIZEOF(kn03_ioasic_devs) - 3; 95 static int kn03_ioasic_ndevs = ARRAY_SIZEOF(kn03_ioasic_devs); 96 #endif 97 98 static int ioasicmatch __P((struct device *, struct cfdata *, void *)); 99 static void ioasicattach __P((struct device *, struct device *, void *)); 100 101 const struct cfattach ioasic_ca = { 102 sizeof(struct ioasic_softc), ioasicmatch, ioasicattach 103 }; 104 105 tc_addr_t ioasic_base = 0; 106 107 static int 108 ioasicmatch(parent, cfdata, aux) 109 struct device *parent; 110 struct cfdata *cfdata; 111 void *aux; 112 { 113 struct tc_attach_args *ta = aux; 114 115 /* Make sure that we're looking for this type of device. */ 116 if (strncmp("IOCTL ", ta->ta_modname, TC_ROM_LLEN)) 117 return (0); 118 119 if (cfdata->cf_unit > 0) 120 return (0); 121 122 return (1); 123 } 124 125 static void 126 ioasicattach(parent, self, aux) 127 struct device *parent, *self; 128 void *aux; 129 { 130 struct ioasic_softc *sc = (struct ioasic_softc *)self; 131 struct tc_attach_args *ta = aux; 132 struct ioasic_dev *ioasic_devs; 133 int ioasic_ndevs, builtin_ndevs; 134 int i, imsk; 135 136 sc->sc_bst = ta->ta_memt; 137 if (bus_space_map(ta->ta_memt, ta->ta_addr, 138 0x400000, 0, &sc->sc_bsh)) { 139 printf("%s: unable to map device\n", sc->sc_dv.dv_xname); 140 return; 141 } 142 sc->sc_dmat = ta->ta_dmat; 143 sc->sc_cookie = ta->ta_cookie; 144 145 sc->sc_base = ta->ta_addr; /* XXX XXX XXX */ 146 147 printf("\n"); 148 149 switch (systype) { 150 #if defined(DEC_3MIN) 151 case DS_3MIN: 152 ioasic_devs = kmin_ioasic_devs; 153 ioasic_ndevs = kmin_ioasic_ndevs; 154 builtin_ndevs = kmin_builtin_ndevs; 155 break; 156 #endif 157 #if defined(DEC_MAXINE) 158 case DS_MAXINE: 159 ioasic_devs = xine_ioasic_devs; 160 ioasic_ndevs = xine_ioasic_ndevs; 161 builtin_ndevs = xine_builtin_ndevs; 162 break; 163 #endif 164 #if defined(DEC_3MAXPLUS) 165 case DS_3MAXPLUS: 166 ioasic_devs = kn03_ioasic_devs; 167 ioasic_ndevs = kn03_ioasic_ndevs; 168 builtin_ndevs = kn03_builtin_ndevs; 169 break; 170 #endif 171 default: 172 panic("ioasicmatch: how did we get here?"); 173 } 174 175 /* 176 * Turn off all device interrupt bits. 177 * (This _does_ include TC option slot bits. 178 */ 179 imsk = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK); 180 for (i = 0; i < ioasic_ndevs; i++) 181 imsk &= ~ioasic_devs[i].iad_intrbits; 182 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, imsk); 183 184 /* 185 * Try to configure each device. 186 */ 187 ioasic_attach_devs(sc, ioasic_devs, builtin_ndevs); 188 } 189 190 #if 1 /* XXX for now XXX */ 191 void 192 ioasic_intr_establish(dev, cookie, level, handler, val) 193 struct device *dev; 194 void *cookie; 195 int level; 196 int (*handler) __P((void *)); 197 void *val; 198 { 199 (*tc_enable_interrupt)((unsigned)cookie, handler, val, 1); 200 } 201 202 #else /* XXX eventually XXX */ 203 204 void 205 ioasic_intr_establish(ioa, cookie, level, func, arg) 206 struct device *ioa; 207 void *cookie, *arg; 208 int level; 209 int (*func) __P((void *)); 210 { 211 struct ioasic_softc *sc = (void *)ioasic_cd.cd_devs[0]; 212 int i, intrbits; 213 214 for (i = 0; i < ioasic_ndevs; i++) { 215 if (ioasic_devs[i].iad_cookie == cookie) 216 goto found; 217 } 218 panic("ioasic_intr_establish: invalid cookie %d", (int)cookie); 219 found: 220 221 intrtab[(int)cookie].ih_func = func; 222 intrtab[(int)cookie].ih_arg = arg; 223 224 intrbits = ioasic_devs[i].iad_intrbits; 225 i = bus_space_read_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK); 226 i |= intrbits; 227 bus_space_write_4(sc->sc_bst, sc->sc_bsh, IOASIC_IMSK, i); 228 } 229 230 void 231 ioasic_intr_disestablish(ioa, cookie) 232 struct device *ioa; 233 void *cookie; 234 { 235 panic("ioasic_intr_disestablish: cookie %d", (int)cookie); 236 } 237 #endif 238
Indexes created Wed Oct 15 03:09:54 GMT 2025