booke_machdep.c revision 1.1.2.1 1 /* $NetBSD: booke_machdep.c,v 1.1.2.1 2011/01/07 01:26:19 matt Exp $ */
2 /*-
3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
4 * All rights reserved.
5 *
6 * This code is derived from software contributed to The NetBSD Foundation
7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects
8 * Agency and which was developed by Matt Thomas of 3am Software Foundry.
9 *
10 * This material is based upon work supported by the Defense Advanced Research
11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under
12 * Contract No. N66001-09-C-2073.
13 * Approved for Public Release, Distribution Unlimited
14 *
15 * Redistribution and use in source and binary forms, with or without
16 * modification, are permitted provided that the following conditions
17 * are met:
18 * 1. Redistributions of source code must retain the above copyright
19 * notice, this list of conditions and the following disclaimer.
20 * 2. Redistributions in binary form must reproduce the above copyright
21 * notice, this list of conditions and the following disclaimer in the
22 * documentation and/or other materials provided with the distribution.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 * POSSIBILITY OF SUCH DAMAGE.
35 */
36
37 #define __INTR_PRIVATE
38 #define _POWERPC_BUS_DMA_PRIVATE
39
40 #include <sys/cdefs.h>
41
42 #include <sys/param.h>
43 #include <sys/cpu.h>
44 #include <sys/intr.h>
45 #include <sys/mount.h>
46 #include <sys/msgbuf.h>
47 #include <sys/kernel.h>
48 #include <sys/reboot.h>
49 #include <sys/bus.h>
50
51 #include <uvm/uvm_extern.h>
52
53
54 /*
55 * Global variables used here and there
56 */
57 struct user *proc0paddr;
58 paddr_t msgbuf_paddr;
59 psize_t pmemsize;
60 struct vm_map *mb_map;
61 struct vm_map *phys_map;
62
63 static bus_addr_t booke_dma_phys_to_bus_mem(bus_dma_tag_t, bus_addr_t);
64 static bus_addr_t booke_dma_bus_mem_to_phys(bus_dma_tag_t, bus_addr_t);
65
66
67 struct powerpc_bus_dma_tag booke_bus_dma_tag = {
68 ._dmamap_create = _bus_dmamap_create,
69 ._dmamap_destroy = _bus_dmamap_destroy,
70 ._dmamap_load = _bus_dmamap_load,
71 ._dmamap_load_mbuf = _bus_dmamap_load_mbuf,
72 ._dmamap_load_uio = _bus_dmamap_load_uio,
73 ._dmamap_load_raw = _bus_dmamap_load_raw,
74 ._dmamap_unload = _bus_dmamap_unload,
75 ._dmamap_sync = _bus_dmamap_sync,
76 ._dmamem_alloc = _bus_dmamem_alloc,
77 ._dmamem_free = _bus_dmamem_free,
78 ._dmamem_map = _bus_dmamem_map,
79 ._dmamem_unmap = _bus_dmamem_unmap,
80 ._dmamem_mmap = _bus_dmamem_mmap,
81 ._dma_phys_to_bus_mem = booke_dma_phys_to_bus_mem,
82 ._dma_bus_mem_to_phys = booke_dma_bus_mem_to_phys,
83 };
84
85 static bus_addr_t
86 booke_dma_phys_to_bus_mem(bus_dma_tag_t t, bus_addr_t a)
87 {
88 return a;
89 }
90
91 static bus_addr_t
92 booke_dma_bus_mem_to_phys(bus_dma_tag_t t, bus_addr_t a)
93 {
94 return a;
95 }
96
97 static int
98 null_splraise(int ipl)
99 {
100 int cpl = curcpu()->ci_cpl;
101 curcpu()->ci_cpl = ipl;
102 return cpl;
103 }
104
105 static void
106 null_splx(int ipl)
107 {
108 curcpu()->ci_cpl = ipl;
109 }
110
111 static const struct intrsw null_intrsw = {
112 .intrsw_splraise = null_splraise,
113 .intrsw_splx = null_splx,
114 };
115
116 const struct intrsw *powerpc_intrsw = &null_intrsw;
117 struct cpu_md_ops cpu_md_ops;
118 extern struct cpu_info cpu_info[1];
119
120 #if 0
121 pt_entry_t ptp0[NPTEPG] = {
122 [(0x20000 & SEGOFSET) >> PGSHIFT] = 0x00020000|PTE_xR|PTE_xX|PTE_M,
123 };
124
125 struct pmap_segtab pmap_kern_segtab = {
126 .seg_tab[0x20000 >> SEGSHIFT] = ptp0,
127 };
128 #endif
129
130 struct cpu_softc cpu_softc[1] = {
131 [0] = {
132 .cpu_ci = cpu_info,
133 },
134 };
135 struct cpu_info cpu_info[1] = {
136 [0] = {
137 .ci_curlwp = &lwp0,
138 .ci_tlb_info = &pmap_tlb0_info,
139 .ci_softc = cpu_softc,
140 .ci_cpl = IPL_HIGH,
141 #if 0
142 .ci_pmap_kern_segtab = &pmap_kern_segtab,
143 #endif
144 },
145 };
146
147 /*
148 * This should probably be in autoconf! XXX
149 */
150 char cpu_model[80];
151 char machine[] = MACHINE; /* from <machine/param.h> */
152 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */
153
154 char bootpath[256];
155
156 #if NKSYMS || defined(DDB) || defined(MODULAR)
157 void *startsym, *endsym;
158 #endif
159
160 int fake_mapiodev = 1;
161
162 void lcsplx(int);
163
164 void
165 booke_cpu_startup(void)
166 {
167 vaddr_t minaddr, maxaddr;
168 char pbuf[9];
169
170 printf("%s%s", copyright, version);
171
172 format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
173 printf("total memory = %s\n", pbuf);
174
175 minaddr = 0;
176 /*
177 * Allocate a submap for physio
178 */
179 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
180 VM_PHYS_SIZE, 0, false, NULL);
181
182 /*
183 * No need to allocate an mbuf cluster submap. Mbuf clusters
184 * are allocated via the pool allocator, and we use direct-mapped
185 * pool pages.
186 */
187
188 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
189 printf("avail memory = %s\n", pbuf);
190
191 /*
192 * Set up the board properties database.
193 */
194 board_info_init();
195
196 /*
197 * Now that we have VM, malloc()s are OK in bus_space.
198 */
199 bus_space_mallocok();
200 fake_mapiodev = 0;
201 }
202
203 static void
204 dumpsys(void)
205 {
206
207 printf("dumpsys: TBD\n");
208 }
209
210 /*
211 * Halt or reboot the machine after syncing/dumping according to howto.
212 */
213 void
214 cpu_reboot(int howto, char *what)
215 {
216 static int syncing;
217 static char str[256];
218 char *ap = str, *ap1 = ap;
219
220 boothowto = howto;
221 if (!cold && !(howto & RB_NOSYNC) && !syncing) {
222 syncing = 1;
223 vfs_shutdown(); /* sync */
224 resettodr(); /* set wall clock */
225 }
226
227 splhigh();
228
229 if (!cold && (howto & RB_DUMP))
230 dumpsys();
231
232 doshutdownhooks();
233
234 pmf_system_shutdown(boothowto);
235
236 if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
237 /* Power off here if we know how...*/
238 }
239
240 if (howto & RB_HALT) {
241 printf("halted\n\n");
242
243 goto reboot; /* XXX for now... */
244
245 #ifdef DDB
246 printf("dropping to debugger\n");
247 while(1)
248 Debugger();
249 #endif
250 }
251
252 printf("rebooting\n\n");
253 if (what && *what) {
254 if (strlen(what) > sizeof str - 5)
255 printf("boot string too large, ignored\n");
256 else {
257 strcpy(str, what);
258 ap1 = ap = str + strlen(str);
259 *ap++ = ' ';
260 }
261 }
262 *ap++ = '-';
263 if (howto & RB_SINGLE)
264 *ap++ = 's';
265 if (howto & RB_KDB)
266 *ap++ = 'd';
267 *ap++ = 0;
268 if (ap[-2] == '-')
269 *ap1 = 0;
270
271 /* flush cache for msgbuf */
272 dcache_wb(msgbuf_paddr, round_page(MSGBUFSIZE));
273
274 reboot:
275 __asm volatile("msync; isync");
276 (*cpu_md_ops.md_cpu_reset)();
277
278 printf("%s: md_cpu_reset() failed!\n", __func__);
279 #ifdef DDB
280 for (;;)
281 Debugger();
282 #else
283 for (;;)
284 /* nothing */;
285 #endif
286 }
287 void
288 lcsplx(int spl)
289 {
290 splx(spl);
291 }
292
293 /*
294 * mapiodev:
295 *
296 * Allocate vm space and mapin the I/O address. Use reserved TLB
297 * mapping if one is found.
298 */
299 void *
300 mapiodev(paddr_t pa, psize_t len)
301 {
302 const vsize_t off = pa & PAGE_MASK;
303
304 /*
305 * See if we have reserved TLB entry for the pa. This needs to be
306 * true for console as we can't use uvm during early bootstrap.
307 */
308 void * const p = tlb_mapiodev(pa, len);
309 if (p != NULL)
310 return p;
311
312 if (fake_mapiodev)
313 panic("mapiodev: no TLB entry reserved for %llx+%llx",
314 (long long)pa, (long long)len);
315
316 pa = trunc_page(pa);
317 len = round_page(off + len);
318 vaddr_t va = uvm_km_alloc(kernel_map, len, 0, UVM_KMF_VAONLY);
319
320 if (va == 0)
321 return NULL;
322
323 for (va += len, pa += len; len > 0; len -= PAGE_SIZE) {
324 va -= PAGE_SIZE;
325 pa -= PAGE_SIZE;
326 pmap_kenter_pa(va, pa,
327 VM_PROT_READ|VM_PROT_WRITE|PMAP_NOCACHE);
328 }
329 pmap_update(pmap_kernel());
330 return (void *)(va + off);
331 }
332
333 void
334 unmapiodev(vaddr_t va, vsize_t len)
335 {
336 /* Nothing to do for reserved (ie. not uvm_km_alloc'd) mappings. */
337 if (va < VM_MIN_KERNEL_ADDRESS || va > VM_MAX_KERNEL_ADDRESS) {
338 tlb_unmapiodev(va, len);
339 return;
340 }
341
342 len = round_page((va & PAGE_MASK) + len);
343 va = trunc_page(va);
344
345 pmap_kremove(va, len);
346 uvm_km_free(kernel_map, va, len, UVM_KMF_VAONLY);
347 }
348
349 void
350 cpu_evcnt_attach(struct cpu_info *ci)
351 {
352 struct cpu_softc * const cpu = ci->ci_softc;
353 const char * const xname = device_xname(ci->ci_dev);
354
355 evcnt_attach_dynamic_nozero(&ci->ci_ev_clock, EVCNT_TYPE_INTR,
356 NULL, xname, "clock");
357 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_late_clock, EVCNT_TYPE_INTR,
358 NULL, xname, "late clock");
359 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_exec_trap_sync, EVCNT_TYPE_TRAP,
360 NULL, xname, "exec pages synced (trap)");
361 #ifndef __HAVE_FAST_SOFTINTS
362 evcnt_attach_dynamic_nozero(&ci->ci_ev_softclock, EVCNT_TYPE_INTR,
363 NULL, xname, "soft clock");
364 evcnt_attach_dynamic_nozero(&ci->ci_ev_softnet, EVCNT_TYPE_INTR,
365 NULL, xname, "soft net");
366 evcnt_attach_dynamic_nozero(&ci->ci_ev_softserial, EVCNT_TYPE_INTR,
367 NULL, xname, "soft serial");
368 #endif
369 evcnt_attach_dynamic_nozero(&ci->ci_ev_traps, EVCNT_TYPE_TRAP,
370 NULL, xname, "traps");
371 evcnt_attach_dynamic_nozero(&ci->ci_ev_kdsi, EVCNT_TYPE_TRAP,
372 &ci->ci_ev_traps, xname, "kernel DSI traps");
373 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi, EVCNT_TYPE_TRAP,
374 &ci->ci_ev_traps, xname, "user DSI traps");
375 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi_fatal, EVCNT_TYPE_TRAP,
376 &ci->ci_ev_udsi, xname, "user DSI failures");
377 evcnt_attach_dynamic_nozero(&ci->ci_ev_kisi, EVCNT_TYPE_TRAP,
378 &ci->ci_ev_traps, xname, "kernel ISI traps");
379 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi, EVCNT_TYPE_TRAP,
380 &ci->ci_ev_traps, xname, "user ISI traps");
381 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi_fatal, EVCNT_TYPE_TRAP,
382 &ci->ci_ev_isi, xname, "user ISI failures");
383 evcnt_attach_dynamic_nozero(&ci->ci_ev_scalls, EVCNT_TYPE_TRAP,
384 &ci->ci_ev_traps, xname, "system call traps");
385 evcnt_attach_dynamic_nozero(&ci->ci_ev_pgm, EVCNT_TYPE_TRAP,
386 &ci->ci_ev_traps, xname, "PGM traps");
387 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpu, EVCNT_TYPE_TRAP,
388 &ci->ci_ev_traps, xname, "FPU unavailable traps");
389 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpusw, EVCNT_TYPE_TRAP,
390 &ci->ci_ev_fpu, xname, "FPU context switches");
391 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali, EVCNT_TYPE_TRAP,
392 &ci->ci_ev_traps, xname, "user alignment traps");
393 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali_fatal, EVCNT_TYPE_TRAP,
394 &ci->ci_ev_ali, xname, "user alignment traps");
395 evcnt_attach_dynamic_nozero(&ci->ci_ev_umchk, EVCNT_TYPE_TRAP,
396 &ci->ci_ev_umchk, xname, "user MCHK failures");
397 evcnt_attach_dynamic_nozero(&ci->ci_ev_vec, EVCNT_TYPE_TRAP,
398 &ci->ci_ev_traps, xname, "AltiVec unavailable");
399 #ifdef ALTIVEC
400 if (cpu_altivec) {
401 evcnt_attach_dynamic_nozero(&ci->ci_ev_vecsw, EVCNT_TYPE_TRAP,
402 &ci->ci_ev_vec, xname, "AltiVec context switches");
403 }
404 #endif
405 evcnt_attach_dynamic_nozero(&ci->ci_ev_ipi, EVCNT_TYPE_INTR,
406 NULL, xname, "IPIs");
407 evcnt_attach_dynamic_nozero(&ci->ci_ev_tlbmiss_soft, EVCNT_TYPE_TRAP,
408 &ci->ci_ev_traps, xname, "soft tlb misses");
409 evcnt_attach_dynamic_nozero(&ci->ci_ev_dtlbmiss_hard, EVCNT_TYPE_TRAP,
410 &ci->ci_ev_traps, xname, "data tlb misses");
411 evcnt_attach_dynamic_nozero(&ci->ci_ev_itlbmiss_hard, EVCNT_TYPE_TRAP,
412 &ci->ci_ev_traps, xname, "inst tlb misses");
413 }
414
415 uint32_t
416 cpu_read_4(bus_addr_t a)
417 {
418 struct cpu_softc * const cpu = curcpu()->ci_softc;
419 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a);
420 return bus_space_read_4(cpu->cpu_bst, cpu->cpu_bsh, a);
421 }
422
423 uint8_t
424 cpu_read_1(bus_addr_t a)
425 {
426 struct cpu_softc * const cpu = curcpu()->ci_softc;
427 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a);
428 return bus_space_read_1(cpu->cpu_bst, cpu->cpu_bsh, a);
429 }
430
431 void
432 cpu_write_4(bus_addr_t a, uint32_t v)
433 {
434 struct cpu_softc * const cpu = curcpu()->ci_softc;
435 bus_space_write_4(cpu->cpu_bst, cpu->cpu_bsh, a, v);
436 }
437
438 void
439 cpu_write_1(bus_addr_t a, uint8_t v)
440 {
441 struct cpu_softc * const cpu = curcpu()->ci_softc;
442 bus_space_write_1(cpu->cpu_bst, cpu->cpu_bsh, a, v);
443 }
444