booke_machdep.c revision 1.1.2.3
1 /* $NetBSD: booke_machdep.c,v 1.1.2.3 2011/10/14 17:21:25 matt Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #define __INTR_PRIVATE 38 #define _POWERPC_BUS_DMA_PRIVATE 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: booke_machdep.c,v 1.1.2.3 2011/10/14 17:21:25 matt Exp $"); 42 43 #include "opt_modular.h" 44 45 #include <sys/param.h> 46 #include <sys/cpu.h> 47 #include <sys/device.h> 48 #include <sys/intr.h> 49 #include <sys/mount.h> 50 #include <sys/msgbuf.h> 51 #include <sys/kernel.h> 52 #include <sys/reboot.h> 53 #include <sys/bus.h> 54 55 #include <uvm/uvm_extern.h> 56 57 #include <powerpc/cpuset.h> 58 #include <powerpc/pcb.h> 59 #include <powerpc/spr.h> 60 #include <powerpc/booke/spr.h> 61 #include <powerpc/booke/cpuvar.h> 62 63 /* 64 * Global variables used here and there 65 */ 66 struct user *proc0paddr; 67 paddr_t msgbuf_paddr; 68 psize_t pmemsize; 69 struct vm_map *mb_map; 70 struct vm_map *phys_map; 71 72 #ifdef MODULAR 73 register_t cpu_psluserset = PSL_USERSET; 74 register_t cpu_pslusermod = PSL_USERMOD; 75 register_t cpu_pslusermask = PSL_USERMASK; 76 #endif 77 78 static bus_addr_t booke_dma_phys_to_bus_mem(bus_dma_tag_t, bus_addr_t); 79 static bus_addr_t booke_dma_bus_mem_to_phys(bus_dma_tag_t, bus_addr_t); 80 81 82 struct powerpc_bus_dma_tag booke_bus_dma_tag = { 83 ._dmamap_create = _bus_dmamap_create, 84 ._dmamap_destroy = _bus_dmamap_destroy, 85 ._dmamap_load = _bus_dmamap_load, 86 ._dmamap_load_mbuf = _bus_dmamap_load_mbuf, 87 ._dmamap_load_uio = _bus_dmamap_load_uio, 88 ._dmamap_load_raw = _bus_dmamap_load_raw, 89 ._dmamap_unload = _bus_dmamap_unload, 90 ._dmamap_sync = _bus_dmamap_sync, 91 ._dmamem_alloc = _bus_dmamem_alloc, 92 ._dmamem_free = _bus_dmamem_free, 93 ._dmamem_map = _bus_dmamem_map, 94 ._dmamem_unmap = _bus_dmamem_unmap, 95 ._dmamem_mmap = _bus_dmamem_mmap, 96 ._dma_phys_to_bus_mem = booke_dma_phys_to_bus_mem, 97 ._dma_bus_mem_to_phys = booke_dma_bus_mem_to_phys, 98 }; 99 100 static bus_addr_t 101 booke_dma_phys_to_bus_mem(bus_dma_tag_t t, bus_addr_t a) 102 { 103 return a; 104 } 105 106 static bus_addr_t 107 booke_dma_bus_mem_to_phys(bus_dma_tag_t t, bus_addr_t a) 108 { 109 return a; 110 } 111 112 struct cpu_md_ops cpu_md_ops; 113 114 struct cpu_softc cpu_softc[] = { 115 [0] = { 116 .cpu_ci = &cpu_info[0], 117 }, 118 #ifdef MULTIPROCESSOR 119 [CPU_MAXNUM-1] = { 120 .cpu_ci = &cpu_info[CPU_MAXNUM-1], 121 }, 122 #endif 123 }; 124 struct cpu_info cpu_info[] = { 125 [0] = { 126 .ci_curlwp = &lwp0, 127 .ci_tlb_info = &pmap_tlb0_info, 128 .ci_softc = &cpu_softc[0], 129 .ci_cpl = IPL_HIGH, 130 .ci_idepth = -1, 131 }, 132 #ifdef MULTIPROCESSOR 133 [CPU_MAXNUM-1] = { 134 .ci_curlwp = NULL, 135 .ci_tlb_info = &pmap_tlb0_info, 136 .ci_softc = &cpu_softc[CPU_MAXNUM-1], 137 .ci_cpl = IPL_HIGH, 138 .ci_idepth = -1, 139 }, 140 #endif 141 }; 142 CTASSERT(__arraycount(cpu_info) == __arraycount(cpu_softc)); 143 144 /* 145 * This should probably be in autoconf! XXX 146 */ 147 char cpu_model[80]; 148 char machine[] = MACHINE; /* from <machine/param.h> */ 149 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */ 150 151 char bootpath[256]; 152 153 #if NKSYMS || defined(DDB) || defined(MODULAR) 154 void *startsym, *endsym; 155 #endif 156 157 #if defined(MULTIPROCESSOR) 158 volatile struct cpu_hatch_data cpu_hatch_data __cacheline_aligned; 159 #endif 160 161 int fake_mapiodev = 1; 162 163 void 164 booke_cpu_startup(const char *model) 165 { 166 vaddr_t minaddr, maxaddr; 167 char pbuf[9]; 168 169 strlcpy(cpu_model, model, sizeof(cpu_model)); 170 171 printf("%s%s", copyright, version); 172 173 format_bytes(pbuf, sizeof(pbuf), ctob((uint64_t)physmem)); 174 printf("total memory = %s\n", pbuf); 175 176 minaddr = 0; 177 /* 178 * Allocate a submap for physio 179 */ 180 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 181 VM_PHYS_SIZE, 0, false, NULL); 182 183 /* 184 * No need to allocate an mbuf cluster submap. Mbuf clusters 185 * are allocated via the pool allocator, and we use direct-mapped 186 * pool pages. 187 */ 188 189 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 190 printf("avail memory = %s\n", pbuf); 191 192 /* 193 * Register the tlb's evcnts 194 */ 195 pmap_tlb_info_evcnt_attach(curcpu()->ci_tlb_info); 196 197 /* 198 * Set up the board properties database. 199 */ 200 board_info_init(); 201 202 /* 203 * Now that we have VM, malloc()s are OK in bus_space. 204 */ 205 bus_space_mallocok(); 206 fake_mapiodev = 0; 207 208 #ifdef MULTIPROCESSOR 209 for (size_t i = 1; i < __arraycount(cpu_info); i++) { 210 struct cpu_info * const ci = &cpu_info[i]; 211 struct cpu_softc * const cpu = &cpu_softc[i]; 212 cpu->cpu_ci = ci; 213 cpu->cpu_bst = cpu_softc[0].cpu_bst; 214 cpu->cpu_le_bst = cpu_softc[0].cpu_le_bst; 215 cpu->cpu_bsh = cpu_softc[0].cpu_bsh; 216 cpu->cpu_highmem = cpu_softc[0].cpu_highmem; 217 ci->ci_softc = cpu; 218 ci->ci_tlb_info = &pmap_tlb0_info; 219 ci->ci_cpl = IPL_HIGH; 220 ci->ci_idepth = -1; 221 ci->ci_pmap_kern_segtab = curcpu()->ci_pmap_kern_segtab; 222 } 223 #endif /* MULTIPROCESSOR */ 224 } 225 226 static void 227 dumpsys(void) 228 { 229 230 printf("dumpsys: TBD\n"); 231 } 232 233 /* 234 * Halt or reboot the machine after syncing/dumping according to howto. 235 */ 236 void 237 cpu_reboot(int howto, char *what) 238 { 239 static int syncing; 240 static char str[256]; 241 char *ap = str, *ap1 = ap; 242 243 boothowto = howto; 244 if (!cold && !(howto & RB_NOSYNC) && !syncing) { 245 syncing = 1; 246 vfs_shutdown(); /* sync */ 247 resettodr(); /* set wall clock */ 248 } 249 250 splhigh(); 251 252 if (!cold && (howto & RB_DUMP)) 253 dumpsys(); 254 255 doshutdownhooks(); 256 257 pmf_system_shutdown(boothowto); 258 259 if ((howto & RB_POWERDOWN) == RB_POWERDOWN) { 260 /* Power off here if we know how...*/ 261 } 262 263 if (howto & RB_HALT) { 264 printf("halted\n\n"); 265 266 goto reboot; /* XXX for now... */ 267 268 #ifdef DDB 269 printf("dropping to debugger\n"); 270 while(1) 271 Debugger(); 272 #endif 273 } 274 275 printf("rebooting\n\n"); 276 if (what && *what) { 277 if (strlen(what) > sizeof str - 5) 278 printf("boot string too large, ignored\n"); 279 else { 280 strcpy(str, what); 281 ap1 = ap = str + strlen(str); 282 *ap++ = ' '; 283 } 284 } 285 *ap++ = '-'; 286 if (howto & RB_SINGLE) 287 *ap++ = 's'; 288 if (howto & RB_KDB) 289 *ap++ = 'd'; 290 *ap++ = 0; 291 if (ap[-2] == '-') 292 *ap1 = 0; 293 294 /* flush cache for msgbuf */ 295 dcache_wb(msgbuf_paddr, round_page(MSGBUFSIZE)); 296 297 reboot: 298 __asm volatile("msync; isync"); 299 (*cpu_md_ops.md_cpu_reset)(); 300 301 printf("%s: md_cpu_reset() failed!\n", __func__); 302 #ifdef DDB 303 for (;;) 304 Debugger(); 305 #else 306 for (;;) 307 /* nothing */; 308 #endif 309 } 310 311 /* 312 * mapiodev: 313 * 314 * Allocate vm space and mapin the I/O address. Use reserved TLB 315 * mapping if one is found. 316 */ 317 void * 318 mapiodev(paddr_t pa, psize_t len) 319 { 320 const vsize_t off = pa & PAGE_MASK; 321 322 /* 323 * See if we have reserved TLB entry for the pa. This needs to be 324 * true for console as we can't use uvm during early bootstrap. 325 */ 326 void * const p = tlb_mapiodev(pa, len, false); 327 if (p != NULL) 328 return p; 329 330 if (fake_mapiodev) 331 panic("mapiodev: no TLB entry reserved for %llx+%llx", 332 (long long)pa, (long long)len); 333 334 pa = trunc_page(pa); 335 len = round_page(off + len); 336 vaddr_t va = uvm_km_alloc(kernel_map, len, 0, UVM_KMF_VAONLY); 337 338 if (va == 0) 339 return NULL; 340 341 for (va += len, pa += len; len > 0; len -= PAGE_SIZE) { 342 va -= PAGE_SIZE; 343 pa -= PAGE_SIZE; 344 pmap_kenter_pa(va, pa, VM_PROT_READ|VM_PROT_WRITE|PMAP_NOCACHE); 345 } 346 pmap_update(pmap_kernel()); 347 return (void *)(va + off); 348 } 349 350 void 351 unmapiodev(vaddr_t va, vsize_t len) 352 { 353 /* Nothing to do for reserved (ie. not uvm_km_alloc'd) mappings. */ 354 if (va < VM_MIN_KERNEL_ADDRESS || va > VM_MAX_KERNEL_ADDRESS) { 355 tlb_unmapiodev(va, len); 356 return; 357 } 358 359 len = round_page((va & PAGE_MASK) + len); 360 va = trunc_page(va); 361 362 pmap_kremove(va, len); 363 uvm_km_free(kernel_map, va, len, UVM_KMF_VAONLY); 364 } 365 366 void 367 cpu_evcnt_attach(struct cpu_info *ci) 368 { 369 struct cpu_softc * const cpu = ci->ci_softc; 370 const char * const xname = device_xname(ci->ci_dev); 371 372 evcnt_attach_dynamic_nozero(&ci->ci_ev_clock, EVCNT_TYPE_INTR, 373 NULL, xname, "clock"); 374 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_late_clock, EVCNT_TYPE_INTR, 375 NULL, xname, "late clock"); 376 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_exec_trap_sync, EVCNT_TYPE_TRAP, 377 NULL, xname, "exec pages synced (trap)"); 378 evcnt_attach_dynamic_nozero(&ci->ci_ev_traps, EVCNT_TYPE_TRAP, 379 NULL, xname, "traps"); 380 evcnt_attach_dynamic_nozero(&ci->ci_ev_kdsi, EVCNT_TYPE_TRAP, 381 &ci->ci_ev_traps, xname, "kernel DSI traps"); 382 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi, EVCNT_TYPE_TRAP, 383 &ci->ci_ev_traps, xname, "user DSI traps"); 384 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi_fatal, EVCNT_TYPE_TRAP, 385 &ci->ci_ev_udsi, xname, "user DSI failures"); 386 evcnt_attach_dynamic_nozero(&ci->ci_ev_kisi, EVCNT_TYPE_TRAP, 387 &ci->ci_ev_traps, xname, "kernel ISI traps"); 388 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi, EVCNT_TYPE_TRAP, 389 &ci->ci_ev_traps, xname, "user ISI traps"); 390 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi_fatal, EVCNT_TYPE_TRAP, 391 &ci->ci_ev_isi, xname, "user ISI failures"); 392 evcnt_attach_dynamic_nozero(&ci->ci_ev_scalls, EVCNT_TYPE_TRAP, 393 &ci->ci_ev_traps, xname, "system call traps"); 394 evcnt_attach_dynamic_nozero(&ci->ci_ev_pgm, EVCNT_TYPE_TRAP, 395 &ci->ci_ev_traps, xname, "PGM traps"); 396 evcnt_attach_dynamic_nozero(&ci->ci_ev_debug, EVCNT_TYPE_TRAP, 397 &ci->ci_ev_traps, xname, "debug traps"); 398 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpu, EVCNT_TYPE_TRAP, 399 &ci->ci_ev_traps, xname, "FPU unavailable traps"); 400 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpusw, EVCNT_TYPE_MISC, 401 &ci->ci_ev_fpu, xname, "FPU context switches"); 402 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali, EVCNT_TYPE_TRAP, 403 &ci->ci_ev_traps, xname, "user alignment traps"); 404 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali_fatal, EVCNT_TYPE_TRAP, 405 &ci->ci_ev_ali, xname, "user alignment traps"); 406 evcnt_attach_dynamic_nozero(&ci->ci_ev_umchk, EVCNT_TYPE_TRAP, 407 &ci->ci_ev_umchk, xname, "user MCHK failures"); 408 evcnt_attach_dynamic_nozero(&ci->ci_ev_vec, EVCNT_TYPE_TRAP, 409 &ci->ci_ev_traps, xname, "SPE unavailable"); 410 evcnt_attach_dynamic_nozero(&ci->ci_ev_vecsw, EVCNT_TYPE_MISC, 411 &ci->ci_ev_vec, xname, "SPE context switches"); 412 evcnt_attach_dynamic_nozero(&ci->ci_ev_ipi, EVCNT_TYPE_INTR, 413 NULL, xname, "IPIs"); 414 evcnt_attach_dynamic_nozero(&ci->ci_ev_tlbmiss_soft, EVCNT_TYPE_TRAP, 415 &ci->ci_ev_traps, xname, "soft tlb misses"); 416 evcnt_attach_dynamic_nozero(&ci->ci_ev_dtlbmiss_hard, EVCNT_TYPE_TRAP, 417 &ci->ci_ev_traps, xname, "data tlb misses"); 418 evcnt_attach_dynamic_nozero(&ci->ci_ev_itlbmiss_hard, EVCNT_TYPE_TRAP, 419 &ci->ci_ev_traps, xname, "inst tlb misses"); 420 } 421 422 #ifdef MULTIPROCESSOR 423 register_t 424 cpu_hatch(void) 425 { 426 volatile struct cpuset_info * const csi = &cpuset_info; 427 const size_t id = cpu_number(); 428 429 /* 430 * We've hatched so tell the spinup code. 431 */ 432 CPUSET_ADD(csi->cpus_hatched, id); 433 434 /* 435 * Loop until running bit for this cpu is set. 436 */ 437 while (!CPUSET_HAS_P(csi->cpus_running, id)) { 438 continue; 439 } 440 441 /* 442 * Now that we are active, start the clocks. 443 */ 444 cpu_initclocks(); 445 446 /* 447 * Return sp of the idlelwp. Which we should be already using but ... 448 */ 449 return curcpu()->ci_curpcb->pcb_sp; 450 } 451 452 void 453 cpu_boot_secondary_processors(void) 454 { 455 volatile struct cpuset_info * const csi = &cpuset_info; 456 CPU_INFO_ITERATOR cii; 457 struct cpu_info *ci; 458 __cpuset_t running = CPUSET_NULLSET; 459 460 for (CPU_INFO_FOREACH(cii, ci)) { 461 /* 462 * Skip this CPU if it didn't sucessfully hatch. 463 */ 464 if (! CPUSET_HAS_P(csi->cpus_hatched, cpu_index(ci))) 465 continue; 466 467 KASSERT(!CPU_IS_PRIMARY(ci)); 468 KASSERT(ci->ci_data.cpu_idlelwp); 469 470 CPUSET_ADD(running, cpu_index(ci)); 471 } 472 KASSERT(CPUSET_EQUAL_P(csi->cpus_hatched, running)); 473 if (!CPUSET_EMPTY_P(running)) { 474 CPUSET_ADDSET(csi->cpus_running, running); 475 } 476 } 477 #endif 478 479 uint32_t 480 cpu_read_4(bus_addr_t a) 481 { 482 struct cpu_softc * const cpu = curcpu()->ci_softc; 483 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a); 484 return bus_space_read_4(cpu->cpu_bst, cpu->cpu_bsh, a); 485 } 486 487 uint8_t 488 cpu_read_1(bus_addr_t a) 489 { 490 struct cpu_softc * const cpu = curcpu()->ci_softc; 491 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a); 492 return bus_space_read_1(cpu->cpu_bst, cpu->cpu_bsh, a); 493 } 494 495 void 496 cpu_write_4(bus_addr_t a, uint32_t v) 497 { 498 struct cpu_softc * const cpu = curcpu()->ci_softc; 499 bus_space_write_4(cpu->cpu_bst, cpu->cpu_bsh, a, v); 500 } 501 502 void 503 cpu_write_1(bus_addr_t a, uint8_t v) 504 { 505 struct cpu_softc * const cpu = curcpu()->ci_softc; 506 bus_space_write_1(cpu->cpu_bst, cpu->cpu_bsh, a, v); 507 } 508 509 void 510 booke_sstep(struct trapframe *tf) 511 { 512 KASSERT(tf->tf_srr1 & PSL_DE); 513 const uint32_t insn = ufetch_32((const void *)tf->tf_srr0); 514 register_t dbcr0 = DBCR0_IAC1 | DBCR0_IDM; 515 register_t dbcr1 = DBCR1_IAC1US_USER | DBCR1_IAC1ER_DS1; 516 if ((insn >> 28) == 4) { 517 uint32_t iac2 = 0; 518 if ((insn >> 26) == 0x12) { 519 const int32_t off = (((int32_t)insn << 6) >> 6) & ~3; 520 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off; 521 dbcr0 |= DBCR0_IAC2; 522 } else if ((insn >> 26) == 0x10) { 523 const int16_t off = insn & ~3; 524 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off; 525 dbcr0 |= DBCR0_IAC2; 526 } else if ((insn & 0xfc00ffde) == 0x4c000420) { 527 iac2 = tf->tf_ctr; 528 dbcr0 |= DBCR0_IAC2; 529 } else if ((insn & 0xfc00ffde) == 0x4c000020) { 530 iac2 = tf->tf_lr; 531 dbcr0 |= DBCR0_IAC2; 532 } 533 if (dbcr0 & DBCR0_IAC2) { 534 dbcr1 |= DBCR1_IAC2US_USER | DBCR1_IAC2ER_DS1; 535 mtspr(SPR_IAC2, iac2); 536 } 537 } 538 mtspr(SPR_IAC1, tf->tf_srr0 + 4); 539 mtspr(SPR_DBCR1, dbcr1); 540 mtspr(SPR_DBCR0, dbcr0); 541 } 542
Indexes created Mon Oct 20 16:09:52 GMT 2025