booke_machdep.c revision 1.24
1 /* $NetBSD: booke_machdep.c,v 1.24 2016/07/11 16:06:52 matt Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #define __INTR_PRIVATE 38 #define _POWERPC_BUS_DMA_PRIVATE 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: booke_machdep.c,v 1.24 2016/07/11 16:06:52 matt Exp $"); 42 43 #include "opt_modular.h" 44 45 #include <sys/param.h> 46 #include <sys/cpu.h> 47 #include <sys/device.h> 48 #include <sys/intr.h> 49 #include <sys/mount.h> 50 #include <sys/msgbuf.h> 51 #include <sys/kernel.h> 52 #include <sys/reboot.h> 53 #include <sys/bus.h> 54 #include <sys/cpu.h> 55 56 #include <uvm/uvm_extern.h> 57 58 #include <powerpc/pcb.h> 59 #include <powerpc/spr.h> 60 #include <powerpc/booke/spr.h> 61 #include <powerpc/booke/cpuvar.h> 62 63 /* 64 * Global variables used here and there 65 */ 66 paddr_t msgbuf_paddr; 67 psize_t pmemsize; 68 struct vm_map *phys_map; 69 70 #ifdef MODULAR 71 register_t cpu_psluserset = PSL_USERSET; 72 register_t cpu_pslusermod = PSL_USERMOD; 73 register_t cpu_pslusermask = PSL_USERMASK; 74 #endif 75 76 static bus_addr_t booke_dma_phys_to_bus_mem(bus_dma_tag_t, bus_addr_t); 77 static bus_addr_t booke_dma_bus_mem_to_phys(bus_dma_tag_t, bus_addr_t); 78 79 80 struct powerpc_bus_dma_tag booke_bus_dma_tag = { 81 ._dmamap_create = _bus_dmamap_create, 82 ._dmamap_destroy = _bus_dmamap_destroy, 83 ._dmamap_load = _bus_dmamap_load, 84 ._dmamap_load_mbuf = _bus_dmamap_load_mbuf, 85 ._dmamap_load_uio = _bus_dmamap_load_uio, 86 ._dmamap_load_raw = _bus_dmamap_load_raw, 87 ._dmamap_unload = _bus_dmamap_unload, 88 /* 89 * The caches on BookE are coherent so we don't need to do any special 90 * cache synchronization. 91 */ 92 //._dmamap_sync = _bus_dmamap_sync, 93 ._dmamem_alloc = _bus_dmamem_alloc, 94 ._dmamem_free = _bus_dmamem_free, 95 ._dmamem_map = _bus_dmamem_map, 96 ._dmamem_unmap = _bus_dmamem_unmap, 97 ._dmamem_mmap = _bus_dmamem_mmap, 98 ._dma_phys_to_bus_mem = booke_dma_phys_to_bus_mem, 99 ._dma_bus_mem_to_phys = booke_dma_bus_mem_to_phys, 100 }; 101 102 static bus_addr_t 103 booke_dma_phys_to_bus_mem(bus_dma_tag_t t, bus_addr_t a) 104 { 105 return a; 106 } 107 108 static bus_addr_t 109 booke_dma_bus_mem_to_phys(bus_dma_tag_t t, bus_addr_t a) 110 { 111 return a; 112 } 113 114 struct cpu_md_ops cpu_md_ops; 115 116 struct cpu_softc cpu_softc[] = { 117 [0] = { 118 .cpu_ci = &cpu_info[0], 119 }, 120 #ifdef MULTIPROCESSOR 121 [CPU_MAXNUM-1] = { 122 .cpu_ci = &cpu_info[CPU_MAXNUM-1], 123 }, 124 #endif 125 }; 126 struct cpu_info cpu_info[] = { 127 [0] = { 128 .ci_curlwp = &lwp0, 129 .ci_tlb_info = &pmap_tlb0_info, 130 .ci_softc = &cpu_softc[0], 131 .ci_cpl = IPL_HIGH, 132 .ci_idepth = -1, 133 .ci_pmap_kern_segtab = &pmap_kern_segtab, 134 }, 135 #ifdef MULTIPROCESSOR 136 [CPU_MAXNUM-1] = { 137 .ci_curlwp = NULL, 138 .ci_tlb_info = &pmap_tlb0_info, 139 .ci_softc = &cpu_softc[CPU_MAXNUM-1], 140 .ci_cpl = IPL_HIGH, 141 .ci_idepth = -1, 142 .ci_pmap_kern_segtab = &pmap_kern_segtab, 143 }, 144 #endif 145 }; 146 __CTASSERT(__arraycount(cpu_info) == __arraycount(cpu_softc)); 147 148 /* 149 * This should probably be in autoconf! XXX 150 */ 151 char machine[] = MACHINE; /* from <machine/param.h> */ 152 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */ 153 154 char bootpath[256]; 155 156 #if NKSYMS || defined(DDB) || defined(MODULAR) 157 void *startsym, *endsym; 158 #endif 159 160 #if defined(MULTIPROCESSOR) 161 volatile struct cpu_hatch_data cpu_hatch_data __cacheline_aligned; 162 #endif 163 164 int fake_mapiodev = 1; 165 166 void 167 booke_cpu_startup(const char *model) 168 { 169 vaddr_t minaddr, maxaddr; 170 char pbuf[9]; 171 172 cpu_setmodel("%s", model); 173 174 printf("%s%s", copyright, version); 175 176 format_bytes(pbuf, sizeof(pbuf), ctob((uint64_t)physmem)); 177 printf("total memory = %s\n", pbuf); 178 179 minaddr = 0; 180 /* 181 * Allocate a submap for physio 182 */ 183 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 184 VM_PHYS_SIZE, 0, false, NULL); 185 186 /* 187 * No need to allocate an mbuf cluster submap. Mbuf clusters 188 * are allocated via the pool allocator, and we use direct-mapped 189 * pool pages. 190 */ 191 192 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 193 printf("avail memory = %s\n", pbuf); 194 195 /* 196 * Register the tlb's evcnts 197 */ 198 pmap_tlb_info_evcnt_attach(curcpu()->ci_tlb_info); 199 200 /* 201 * Set up the board properties database. 202 */ 203 board_info_init(); 204 205 /* 206 * Now that we have VM, malloc()s are OK in bus_space. 207 */ 208 bus_space_mallocok(); 209 fake_mapiodev = 0; 210 211 #ifdef MULTIPROCESSOR 212 pmap_kernel()->pm_active = kcpuset_running; 213 pmap_kernel()->pm_onproc = kcpuset_running; 214 215 for (size_t i = 1; i < __arraycount(cpu_info); i++) { 216 struct cpu_info * const ci = &cpu_info[i]; 217 struct cpu_softc * const cpu = &cpu_softc[i]; 218 cpu->cpu_ci = ci; 219 cpu->cpu_bst = cpu_softc[0].cpu_bst; 220 cpu->cpu_le_bst = cpu_softc[0].cpu_le_bst; 221 cpu->cpu_bsh = cpu_softc[0].cpu_bsh; 222 cpu->cpu_highmem = cpu_softc[0].cpu_highmem; 223 ci->ci_softc = cpu; 224 ci->ci_tlb_info = &pmap_tlb0_info; 225 ci->ci_cpl = IPL_HIGH; 226 ci->ci_idepth = -1; 227 ci->ci_pmap_kern_segtab = curcpu()->ci_pmap_kern_segtab; 228 } 229 230 kcpuset_create(&cpuset_info.cpus_running, true); 231 kcpuset_create(&cpuset_info.cpus_hatched, true); 232 kcpuset_create(&cpuset_info.cpus_paused, true); 233 kcpuset_create(&cpuset_info.cpus_resumed, true); 234 kcpuset_create(&cpuset_info.cpus_halted, true); 235 236 kcpuset_set(cpuset_info.cpus_running, cpu_number()); 237 #endif /* MULTIPROCESSOR */ 238 } 239 240 static void 241 dumpsys(void) 242 { 243 244 printf("dumpsys: TBD\n"); 245 } 246 247 /* 248 * Halt or reboot the machine after syncing/dumping according to howto. 249 */ 250 void 251 cpu_reboot(int howto, char *what) 252 { 253 static int syncing; 254 static char str[256]; 255 char *ap = str, *ap1 = ap; 256 257 boothowto = howto; 258 if (!cold && !(howto & RB_NOSYNC) && !syncing) { 259 syncing = 1; 260 vfs_shutdown(); /* sync */ 261 resettodr(); /* set wall clock */ 262 } 263 264 splhigh(); 265 266 if (!cold && (howto & RB_DUMP)) 267 dumpsys(); 268 269 doshutdownhooks(); 270 271 pmf_system_shutdown(boothowto); 272 273 if ((howto & RB_POWERDOWN) == RB_POWERDOWN) { 274 /* Power off here if we know how...*/ 275 } 276 277 if (howto & RB_HALT) { 278 printf("halted\n\n"); 279 280 goto reboot; /* XXX for now... */ 281 282 #ifdef DDB 283 printf("dropping to debugger\n"); 284 while(1) 285 Debugger(); 286 #endif 287 } 288 289 printf("rebooting\n\n"); 290 if (what && *what) { 291 if (strlen(what) > sizeof str - 5) 292 printf("boot string too large, ignored\n"); 293 else { 294 strcpy(str, what); 295 ap1 = ap = str + strlen(str); 296 *ap++ = ' '; 297 } 298 } 299 *ap++ = '-'; 300 if (howto & RB_SINGLE) 301 *ap++ = 's'; 302 if (howto & RB_KDB) 303 *ap++ = 'd'; 304 *ap++ = 0; 305 if (ap[-2] == '-') 306 *ap1 = 0; 307 308 /* flush cache for msgbuf */ 309 dcache_wb(msgbuf_paddr, round_page(MSGBUFSIZE)); 310 311 reboot: 312 __asm volatile("msync; isync"); 313 (*cpu_md_ops.md_cpu_reset)(); 314 315 printf("%s: md_cpu_reset() failed!\n", __func__); 316 #ifdef DDB 317 for (;;) 318 Debugger(); 319 #else 320 for (;;) 321 /* nothing */; 322 #endif 323 } 324 325 /* 326 * mapiodev: 327 * 328 * Allocate vm space and mapin the I/O address. Use reserved TLB 329 * mapping if one is found. 330 */ 331 void * 332 mapiodev(paddr_t pa, psize_t len, bool prefetchable) 333 { 334 const vsize_t off = pa & PAGE_MASK; 335 336 /* 337 * See if we have reserved TLB entry for the pa. This needs to be 338 * true for console as we can't use uvm during early bootstrap. 339 */ 340 void * const p = tlb_mapiodev(pa, len, prefetchable); 341 if (p != NULL) 342 return p; 343 344 if (fake_mapiodev) 345 panic("mapiodev: no TLB entry reserved for %llx+%llx", 346 (long long)pa, (long long)len); 347 348 const paddr_t orig_pa = pa; 349 const psize_t orig_len = len; 350 vsize_t align = 0; 351 pa = trunc_page(pa); 352 len = round_page(off + len); 353 /* 354 * If we are allocating a large amount (>= 1MB) try to get an 355 * aligned VA region for it so try to do a large mapping for it. 356 */ 357 if ((len & (len - 1)) == 0 && len >= 0x100000) 358 align = len; 359 360 vaddr_t va = uvm_km_alloc(kernel_map, len, align, UVM_KMF_VAONLY); 361 362 if (va == 0 && align > 0) { 363 /* 364 * Large aligned request failed. Let's just get anything. 365 */ 366 align = 0; 367 va = uvm_km_alloc(kernel_map, len, align, UVM_KMF_VAONLY); 368 } 369 if (va == 0) 370 return NULL; 371 372 if (align) { 373 /* 374 * Now try to map that via one big TLB entry. 375 */ 376 pt_entry_t pte = pte_make_kenter_pa(pa, NULL, 377 VM_PROT_READ|VM_PROT_WRITE, 378 prefetchable ? 0 : PMAP_NOCACHE); 379 if (!tlb_ioreserve(va, len, pte)) { 380 void * const p0 = tlb_mapiodev(orig_pa, orig_len, 381 prefetchable); 382 KASSERT(p0 != NULL); 383 return p0; 384 } 385 } 386 387 for (va += len, pa += len; len > 0; len -= PAGE_SIZE) { 388 va -= PAGE_SIZE; 389 pa -= PAGE_SIZE; 390 pmap_kenter_pa(va, pa, VM_PROT_READ|VM_PROT_WRITE, 391 prefetchable ? 0 : PMAP_NOCACHE); 392 } 393 pmap_update(pmap_kernel()); 394 return (void *)(va + off); 395 } 396 397 void 398 unmapiodev(vaddr_t va, vsize_t len) 399 { 400 /* Nothing to do for reserved (ie. not uvm_km_alloc'd) mappings. */ 401 if (va < VM_MIN_KERNEL_ADDRESS || va > VM_MAX_KERNEL_ADDRESS) { 402 tlb_unmapiodev(va, len); 403 return; 404 } 405 406 len = round_page((va & PAGE_MASK) + len); 407 va = trunc_page(va); 408 409 pmap_kremove(va, len); 410 uvm_km_free(kernel_map, va, len, UVM_KMF_VAONLY); 411 } 412 413 void 414 cpu_evcnt_attach(struct cpu_info *ci) 415 { 416 struct cpu_softc * const cpu = ci->ci_softc; 417 const char * const xname = ci->ci_data.cpu_name; 418 419 evcnt_attach_dynamic_nozero(&ci->ci_ev_clock, EVCNT_TYPE_INTR, 420 NULL, xname, "clock"); 421 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_late_clock, EVCNT_TYPE_INTR, 422 NULL, xname, "late clock"); 423 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_exec_trap_sync, EVCNT_TYPE_TRAP, 424 NULL, xname, "exec pages synced (trap)"); 425 evcnt_attach_dynamic_nozero(&ci->ci_ev_traps, EVCNT_TYPE_TRAP, 426 NULL, xname, "traps"); 427 evcnt_attach_dynamic_nozero(&ci->ci_ev_kdsi, EVCNT_TYPE_TRAP, 428 &ci->ci_ev_traps, xname, "kernel DSI traps"); 429 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi, EVCNT_TYPE_TRAP, 430 &ci->ci_ev_traps, xname, "user DSI traps"); 431 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi_fatal, EVCNT_TYPE_TRAP, 432 &ci->ci_ev_udsi, xname, "user DSI failures"); 433 evcnt_attach_dynamic_nozero(&ci->ci_ev_kisi, EVCNT_TYPE_TRAP, 434 &ci->ci_ev_traps, xname, "kernel ISI traps"); 435 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi, EVCNT_TYPE_TRAP, 436 &ci->ci_ev_traps, xname, "user ISI traps"); 437 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi_fatal, EVCNT_TYPE_TRAP, 438 &ci->ci_ev_isi, xname, "user ISI failures"); 439 evcnt_attach_dynamic_nozero(&ci->ci_ev_scalls, EVCNT_TYPE_TRAP, 440 &ci->ci_ev_traps, xname, "system call traps"); 441 evcnt_attach_dynamic_nozero(&ci->ci_ev_pgm, EVCNT_TYPE_TRAP, 442 &ci->ci_ev_traps, xname, "PGM traps"); 443 evcnt_attach_dynamic_nozero(&ci->ci_ev_debug, EVCNT_TYPE_TRAP, 444 &ci->ci_ev_traps, xname, "debug traps"); 445 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpu, EVCNT_TYPE_TRAP, 446 &ci->ci_ev_traps, xname, "FPU unavailable traps"); 447 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpusw, EVCNT_TYPE_MISC, 448 &ci->ci_ev_fpu, xname, "FPU context switches"); 449 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali, EVCNT_TYPE_TRAP, 450 &ci->ci_ev_traps, xname, "user alignment traps"); 451 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali_fatal, EVCNT_TYPE_TRAP, 452 &ci->ci_ev_ali, xname, "user alignment traps"); 453 evcnt_attach_dynamic_nozero(&ci->ci_ev_umchk, EVCNT_TYPE_TRAP, 454 &ci->ci_ev_umchk, xname, "user MCHK failures"); 455 evcnt_attach_dynamic_nozero(&ci->ci_ev_vec, EVCNT_TYPE_TRAP, 456 &ci->ci_ev_traps, xname, "SPE unavailable"); 457 evcnt_attach_dynamic_nozero(&ci->ci_ev_vecsw, EVCNT_TYPE_MISC, 458 &ci->ci_ev_vec, xname, "SPE context switches"); 459 evcnt_attach_dynamic_nozero(&ci->ci_ev_ipi, EVCNT_TYPE_INTR, 460 NULL, xname, "IPIs"); 461 evcnt_attach_dynamic_nozero(&ci->ci_ev_tlbmiss_soft, EVCNT_TYPE_TRAP, 462 &ci->ci_ev_traps, xname, "soft tlb misses"); 463 evcnt_attach_dynamic_nozero(&ci->ci_ev_dtlbmiss_hard, EVCNT_TYPE_TRAP, 464 &ci->ci_ev_traps, xname, "data tlb misses"); 465 evcnt_attach_dynamic_nozero(&ci->ci_ev_itlbmiss_hard, EVCNT_TYPE_TRAP, 466 &ci->ci_ev_traps, xname, "inst tlb misses"); 467 } 468 469 #ifdef MULTIPROCESSOR 470 register_t 471 cpu_hatch(void) 472 { 473 struct cpuset_info * const csi = &cpuset_info; 474 const size_t id = cpu_number(); 475 476 /* 477 * We've hatched so tell the spinup code. 478 */ 479 kcpuset_set(csi->cpus_hatched, id); 480 481 /* 482 * Loop until running bit for this cpu is set. 483 */ 484 while (!kcpuset_isset(csi->cpus_running, id)) { 485 continue; 486 } 487 488 /* 489 * Now that we are active, start the clocks. 490 */ 491 cpu_initclocks(); 492 493 /* 494 * Return sp of the idlelwp. Which we should be already using but ... 495 */ 496 return curcpu()->ci_curpcb->pcb_sp; 497 } 498 499 void 500 cpu_boot_secondary_processors(void) 501 { 502 volatile struct cpuset_info * const csi = &cpuset_info; 503 CPU_INFO_ITERATOR cii; 504 struct cpu_info *ci; 505 kcpuset_t *running; 506 507 kcpuset_create(&running, true); 508 509 for (CPU_INFO_FOREACH(cii, ci)) { 510 /* 511 * Skip this CPU if it didn't sucessfully hatch. 512 */ 513 if (!kcpuset_isset(csi->cpus_hatched, cpu_index(ci))) 514 continue; 515 516 KASSERT(!CPU_IS_PRIMARY(ci)); 517 KASSERT(ci->ci_data.cpu_idlelwp); 518 519 kcpuset_set(running, cpu_index(ci)); 520 } 521 KASSERT(kcpuset_match(csi->cpus_hatched, running)); 522 if (!kcpuset_iszero(running)) { 523 kcpuset_merge(csi->cpus_running, running); 524 } 525 kcpuset_destroy(running); 526 } 527 #endif 528 529 uint32_t 530 cpu_read_4(bus_addr_t a) 531 { 532 struct cpu_softc * const cpu = curcpu()->ci_softc; 533 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a); 534 return bus_space_read_4(cpu->cpu_bst, cpu->cpu_bsh, a); 535 } 536 537 uint8_t 538 cpu_read_1(bus_addr_t a) 539 { 540 struct cpu_softc * const cpu = curcpu()->ci_softc; 541 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a); 542 return bus_space_read_1(cpu->cpu_bst, cpu->cpu_bsh, a); 543 } 544 545 void 546 cpu_write_4(bus_addr_t a, uint32_t v) 547 { 548 struct cpu_softc * const cpu = curcpu()->ci_softc; 549 bus_space_write_4(cpu->cpu_bst, cpu->cpu_bsh, a, v); 550 } 551 552 void 553 cpu_write_1(bus_addr_t a, uint8_t v) 554 { 555 struct cpu_softc * const cpu = curcpu()->ci_softc; 556 bus_space_write_1(cpu->cpu_bst, cpu->cpu_bsh, a, v); 557 } 558 559 void 560 booke_sstep(struct trapframe *tf) 561 { 562 KASSERT(tf->tf_srr1 & PSL_DE); 563 const uint32_t insn = ufetch_32((const void *)tf->tf_srr0); 564 register_t dbcr0 = DBCR0_IAC1 | DBCR0_IDM; 565 register_t dbcr1 = DBCR1_IAC1US_USER | DBCR1_IAC1ER_DS1; 566 if ((insn >> 28) == 4) { 567 uint32_t iac2 = 0; 568 if ((insn >> 26) == 0x12) { 569 const int32_t off = (((int32_t)insn << 6) >> 6) & ~3; 570 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off; 571 dbcr0 |= DBCR0_IAC2; 572 } else if ((insn >> 26) == 0x10) { 573 const int16_t off = insn & ~3; 574 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off; 575 dbcr0 |= DBCR0_IAC2; 576 } else if ((insn & 0xfc00fffe) == 0x4c000420) { 577 iac2 = tf->tf_ctr; 578 dbcr0 |= DBCR0_IAC2; 579 } else if ((insn & 0xfc00fffe) == 0x4c000020) { 580 iac2 = tf->tf_lr; 581 dbcr0 |= DBCR0_IAC2; 582 } 583 if (dbcr0 & DBCR0_IAC2) { 584 dbcr1 |= DBCR1_IAC2US_USER | DBCR1_IAC2ER_DS1; 585 mtspr(SPR_IAC2, iac2); 586 } 587 } 588 mtspr(SPR_IAC1, tf->tf_srr0 + 4); 589 mtspr(SPR_DBCR1, dbcr1); 590 mtspr(SPR_DBCR0, dbcr0); 591 } 592 593 #ifdef DIAGNOSTIC 594 static inline void 595 swap_data(uint64_t *data, size_t a, size_t b) 596 { 597 uint64_t swap = data[a]; 598 data[a] = data[b]; 599 data[b] = swap; 600 } 601 602 static void 603 sort_data(uint64_t *data, size_t count) 604 { 605 #if 0 606 /* 607 * Mostly classic bubble sort 608 */ 609 do { 610 size_t new_count = 0; 611 for (size_t i = 1; i < count; i++) { 612 if (tbs[i - 1] > tbs[i]) { 613 swap_tbs(tbs, i - 1, i); 614 new_count = i; 615 } 616 } 617 count = new_count; 618 } while (count > 0); 619 #else 620 /* 621 * Comb sort 622 */ 623 size_t gap = count; 624 bool swapped = false; 625 while (gap > 1 || swapped) { 626 if (gap > 1) { 627 /* 628 * phi = (1 + sqrt(5)) / 2 [golden ratio] 629 * N = 1 / (1 - e^-phi)) = 1.247330950103979 630 * 631 * We want to but can't use floating point to calculate 632 * gap = (size_t)((double)gap / N) 633 * 634 * So we will use the multicative inverse of N 635 * (module 65536) to achieve the division. 636 * 637 * iN = 2^16 / 1.24733... = 52540 638 * x / N == (x * iN) / 65536 639 */ 640 gap = (gap * 52540) / 65536; 641 } 642 643 swapped = false; 644 645 for (size_t i = 0; gap + i < count; i++) { 646 if (data[i] > data[i + gap]) { 647 swap_data(data, i, i + gap); 648 swapped = true; 649 } 650 } 651 } 652 #endif 653 } 654 #endif 655 656 void 657 dump_splhist(struct cpu_info *ci, void (*pr)(const char *, ...)) 658 { 659 #ifdef DIAGNOSTIC 660 struct cpu_softc * const cpu = ci->ci_softc; 661 uint64_t tbs[NIPL*NIPL]; 662 size_t ntbs = 0; 663 for (size_t to = 0; to < NIPL; to++) { 664 for (size_t from = 0; from < NIPL; from++) { 665 uint64_t tb = cpu->cpu_spl_tb[to][from]; 666 if (tb == 0) 667 continue; 668 tbs[ntbs++] = (tb << 8) | (to << 4) | from; 669 } 670 } 671 sort_data(tbs, ntbs); 672 673 if (pr == NULL) 674 pr = printf; 675 uint64_t last_tb = 0; 676 for (size_t i = 0; i < ntbs; i++) { 677 uint64_t tb = tbs[i]; 678 size_t from = tb & 15; 679 size_t to = (tb >> 4) & 15; 680 tb >>= 8; 681 (*pr)("%s(%zu) from %zu at %"PRId64"", 682 from < to ? "splraise" : "splx", 683 to, from, tb); 684 if (last_tb && from != IPL_NONE) 685 (*pr)(" (+%"PRId64")", tb - last_tb); 686 (*pr)("\n"); 687 last_tb = tb; 688 } 689 #endif 690 } 691
Indexes created Tue Sep 30 07:10:03 GMT 2025