booke_machdep.c revision 1.26
1 /* $NetBSD: booke_machdep.c,v 1.26 2019/04/07 05:25:55 thorpej Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #define __INTR_PRIVATE 38 #define _POWERPC_BUS_DMA_PRIVATE 39 40 #include <sys/cdefs.h> 41 __KERNEL_RCSID(0, "$NetBSD: booke_machdep.c,v 1.26 2019/04/07 05:25:55 thorpej Exp $"); 42 43 #include "opt_modular.h" 44 45 #include <sys/param.h> 46 #include <sys/cpu.h> 47 #include <sys/device.h> 48 #include <sys/intr.h> 49 #include <sys/mount.h> 50 #include <sys/msgbuf.h> 51 #include <sys/kernel.h> 52 #include <sys/reboot.h> 53 #include <sys/bus.h> 54 #include <sys/cpu.h> 55 56 #include <uvm/uvm_extern.h> 57 58 #include <dev/cons.h> 59 60 #include <powerpc/pcb.h> 61 #include <powerpc/spr.h> 62 #include <powerpc/booke/spr.h> 63 #include <powerpc/booke/cpuvar.h> 64 65 /* 66 * Global variables used here and there 67 */ 68 paddr_t msgbuf_paddr; 69 psize_t pmemsize; 70 struct vm_map *phys_map; 71 72 #ifdef MODULAR 73 register_t cpu_psluserset = PSL_USERSET; 74 register_t cpu_pslusermod = PSL_USERMOD; 75 register_t cpu_pslusermask = PSL_USERMASK; 76 #endif 77 78 static bus_addr_t booke_dma_phys_to_bus_mem(bus_dma_tag_t, bus_addr_t); 79 static bus_addr_t booke_dma_bus_mem_to_phys(bus_dma_tag_t, bus_addr_t); 80 81 82 struct powerpc_bus_dma_tag booke_bus_dma_tag = { 83 ._dmamap_create = _bus_dmamap_create, 84 ._dmamap_destroy = _bus_dmamap_destroy, 85 ._dmamap_load = _bus_dmamap_load, 86 ._dmamap_load_mbuf = _bus_dmamap_load_mbuf, 87 ._dmamap_load_uio = _bus_dmamap_load_uio, 88 ._dmamap_load_raw = _bus_dmamap_load_raw, 89 ._dmamap_unload = _bus_dmamap_unload, 90 /* 91 * The caches on BookE are coherent so we don't need to do any special 92 * cache synchronization. 93 */ 94 //._dmamap_sync = _bus_dmamap_sync, 95 ._dmamem_alloc = _bus_dmamem_alloc, 96 ._dmamem_free = _bus_dmamem_free, 97 ._dmamem_map = _bus_dmamem_map, 98 ._dmamem_unmap = _bus_dmamem_unmap, 99 ._dmamem_mmap = _bus_dmamem_mmap, 100 ._dma_phys_to_bus_mem = booke_dma_phys_to_bus_mem, 101 ._dma_bus_mem_to_phys = booke_dma_bus_mem_to_phys, 102 }; 103 104 static bus_addr_t 105 booke_dma_phys_to_bus_mem(bus_dma_tag_t t, bus_addr_t a) 106 { 107 return a; 108 } 109 110 static bus_addr_t 111 booke_dma_bus_mem_to_phys(bus_dma_tag_t t, bus_addr_t a) 112 { 113 return a; 114 } 115 116 struct cpu_md_ops cpu_md_ops; 117 118 struct cpu_softc cpu_softc[] = { 119 [0] = { 120 .cpu_ci = &cpu_info[0], 121 }, 122 #ifdef MULTIPROCESSOR 123 [CPU_MAXNUM-1] = { 124 .cpu_ci = &cpu_info[CPU_MAXNUM-1], 125 }, 126 #endif 127 }; 128 struct cpu_info cpu_info[] = { 129 [0] = { 130 .ci_curlwp = &lwp0, 131 .ci_tlb_info = &pmap_tlb0_info, 132 .ci_softc = &cpu_softc[0], 133 .ci_cpl = IPL_HIGH, 134 .ci_idepth = -1, 135 .ci_pmap_kern_segtab = &pmap_kern_segtab, 136 }, 137 #ifdef MULTIPROCESSOR 138 [CPU_MAXNUM-1] = { 139 .ci_curlwp = NULL, 140 .ci_tlb_info = &pmap_tlb0_info, 141 .ci_softc = &cpu_softc[CPU_MAXNUM-1], 142 .ci_cpl = IPL_HIGH, 143 .ci_idepth = -1, 144 .ci_pmap_kern_segtab = &pmap_kern_segtab, 145 }, 146 #endif 147 }; 148 __CTASSERT(__arraycount(cpu_info) == __arraycount(cpu_softc)); 149 150 /* 151 * This should probably be in autoconf! XXX 152 */ 153 char machine[] = MACHINE; /* from <machine/param.h> */ 154 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */ 155 156 char bootpath[256]; 157 158 #if NKSYMS || defined(DDB) || defined(MODULAR) 159 void *startsym, *endsym; 160 #endif 161 162 #if defined(MULTIPROCESSOR) 163 volatile struct cpu_hatch_data cpu_hatch_data __cacheline_aligned; 164 #endif 165 166 int fake_mapiodev = 1; 167 168 void 169 booke_cpu_startup(const char *model) 170 { 171 vaddr_t minaddr, maxaddr; 172 char pbuf[9]; 173 174 cpu_setmodel("%s", model); 175 176 printf("%s%s", copyright, version); 177 178 format_bytes(pbuf, sizeof(pbuf), ctob((uint64_t)physmem)); 179 printf("total memory = %s\n", pbuf); 180 181 minaddr = 0; 182 /* 183 * Allocate a submap for physio 184 */ 185 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 186 VM_PHYS_SIZE, 0, false, NULL); 187 188 /* 189 * No need to allocate an mbuf cluster submap. Mbuf clusters 190 * are allocated via the pool allocator, and we use direct-mapped 191 * pool pages. 192 */ 193 194 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 195 printf("avail memory = %s\n", pbuf); 196 197 /* 198 * Register the tlb's evcnts 199 */ 200 pmap_tlb_info_evcnt_attach(curcpu()->ci_tlb_info); 201 202 /* 203 * Set up the board properties database. 204 */ 205 board_info_init(); 206 207 /* 208 * Now that we have VM, malloc()s are OK in bus_space. 209 */ 210 bus_space_mallocok(); 211 fake_mapiodev = 0; 212 213 #ifdef MULTIPROCESSOR 214 pmap_kernel()->pm_active = kcpuset_running; 215 pmap_kernel()->pm_onproc = kcpuset_running; 216 217 for (size_t i = 1; i < __arraycount(cpu_info); i++) { 218 struct cpu_info * const ci = &cpu_info[i]; 219 struct cpu_softc * const cpu = &cpu_softc[i]; 220 cpu->cpu_ci = ci; 221 cpu->cpu_bst = cpu_softc[0].cpu_bst; 222 cpu->cpu_le_bst = cpu_softc[0].cpu_le_bst; 223 cpu->cpu_bsh = cpu_softc[0].cpu_bsh; 224 cpu->cpu_highmem = cpu_softc[0].cpu_highmem; 225 ci->ci_softc = cpu; 226 ci->ci_tlb_info = &pmap_tlb0_info; 227 ci->ci_cpl = IPL_HIGH; 228 ci->ci_idepth = -1; 229 ci->ci_pmap_kern_segtab = curcpu()->ci_pmap_kern_segtab; 230 } 231 232 kcpuset_create(&cpuset_info.cpus_running, true); 233 kcpuset_create(&cpuset_info.cpus_hatched, true); 234 kcpuset_create(&cpuset_info.cpus_paused, true); 235 kcpuset_create(&cpuset_info.cpus_resumed, true); 236 kcpuset_create(&cpuset_info.cpus_halted, true); 237 238 kcpuset_set(cpuset_info.cpus_running, cpu_number()); 239 #endif /* MULTIPROCESSOR */ 240 } 241 242 static void 243 dumpsys(void) 244 { 245 246 printf("dumpsys: TBD\n"); 247 } 248 249 /* 250 * Halt or reboot the machine after syncing/dumping according to howto. 251 */ 252 void 253 cpu_reboot(int howto, char *what) 254 { 255 static int syncing; 256 static char str[256]; 257 char *ap = str, *ap1 = ap; 258 259 boothowto = howto; 260 if (!cold && !(howto & RB_NOSYNC) && !syncing) { 261 syncing = 1; 262 vfs_shutdown(); /* sync */ 263 resettodr(); /* set wall clock */ 264 } 265 266 splhigh(); 267 268 if (!cold && (howto & RB_DUMP)) 269 dumpsys(); 270 271 doshutdownhooks(); 272 273 pmf_system_shutdown(boothowto); 274 275 if ((howto & RB_POWERDOWN) == RB_POWERDOWN) { 276 /* Power off here if we know how...*/ 277 } 278 279 if (howto & RB_HALT) { 280 printf("The operating system has halted.\n" 281 "Press any key to reboot.\n\n"); 282 cnpollc(1); /* For proper keyboard command handling */ 283 cngetc(); 284 cnpollc(0); 285 286 printf("rebooting...\n\n"); 287 goto reboot; /* XXX for now... */ 288 289 #ifdef DDB 290 printf("dropping to debugger\n"); 291 while(1) 292 Debugger(); 293 #endif 294 } 295 296 printf("rebooting\n\n"); 297 if (what && *what) { 298 if (strlen(what) > sizeof str - 5) 299 printf("boot string too large, ignored\n"); 300 else { 301 strcpy(str, what); 302 ap1 = ap = str + strlen(str); 303 *ap++ = ' '; 304 } 305 } 306 *ap++ = '-'; 307 if (howto & RB_SINGLE) 308 *ap++ = 's'; 309 if (howto & RB_KDB) 310 *ap++ = 'd'; 311 *ap++ = 0; 312 if (ap[-2] == '-') 313 *ap1 = 0; 314 315 /* flush cache for msgbuf */ 316 dcache_wb(msgbuf_paddr, round_page(MSGBUFSIZE)); 317 318 reboot: 319 __asm volatile("msync; isync"); 320 (*cpu_md_ops.md_cpu_reset)(); 321 322 printf("%s: md_cpu_reset() failed!\n", __func__); 323 #ifdef DDB 324 for (;;) 325 Debugger(); 326 #else 327 for (;;) 328 /* nothing */; 329 #endif 330 } 331 332 /* 333 * mapiodev: 334 * 335 * Allocate vm space and mapin the I/O address. Use reserved TLB 336 * mapping if one is found. 337 */ 338 void * 339 mapiodev(paddr_t pa, psize_t len, bool prefetchable) 340 { 341 const vsize_t off = pa & PAGE_MASK; 342 343 /* 344 * See if we have reserved TLB entry for the pa. This needs to be 345 * true for console as we can't use uvm during early bootstrap. 346 */ 347 void * const p = tlb_mapiodev(pa, len, prefetchable); 348 if (p != NULL) 349 return p; 350 351 if (fake_mapiodev) 352 panic("mapiodev: no TLB entry reserved for %llx+%llx", 353 (long long)pa, (long long)len); 354 355 const paddr_t orig_pa = pa; 356 const psize_t orig_len = len; 357 vsize_t align = 0; 358 pa = trunc_page(pa); 359 len = round_page(off + len); 360 /* 361 * If we are allocating a large amount (>= 1MB) try to get an 362 * aligned VA region for it so try to do a large mapping for it. 363 */ 364 if ((len & (len - 1)) == 0 && len >= 0x100000) 365 align = len; 366 367 vaddr_t va = uvm_km_alloc(kernel_map, len, align, UVM_KMF_VAONLY); 368 369 if (va == 0 && align > 0) { 370 /* 371 * Large aligned request failed. Let's just get anything. 372 */ 373 align = 0; 374 va = uvm_km_alloc(kernel_map, len, align, UVM_KMF_VAONLY); 375 } 376 if (va == 0) 377 return NULL; 378 379 if (align) { 380 /* 381 * Now try to map that via one big TLB entry. 382 */ 383 pt_entry_t pte = pte_make_kenter_pa(pa, NULL, 384 VM_PROT_READ|VM_PROT_WRITE, 385 prefetchable ? 0 : PMAP_NOCACHE); 386 if (!tlb_ioreserve(va, len, pte)) { 387 void * const p0 = tlb_mapiodev(orig_pa, orig_len, 388 prefetchable); 389 KASSERT(p0 != NULL); 390 return p0; 391 } 392 } 393 394 for (va += len, pa += len; len > 0; len -= PAGE_SIZE) { 395 va -= PAGE_SIZE; 396 pa -= PAGE_SIZE; 397 pmap_kenter_pa(va, pa, VM_PROT_READ|VM_PROT_WRITE, 398 prefetchable ? 0 : PMAP_NOCACHE); 399 } 400 pmap_update(pmap_kernel()); 401 return (void *)(va + off); 402 } 403 404 void 405 unmapiodev(vaddr_t va, vsize_t len) 406 { 407 /* Nothing to do for reserved (ie. not uvm_km_alloc'd) mappings. */ 408 if (va < VM_MIN_KERNEL_ADDRESS || va > VM_MAX_KERNEL_ADDRESS) { 409 tlb_unmapiodev(va, len); 410 return; 411 } 412 413 len = round_page((va & PAGE_MASK) + len); 414 va = trunc_page(va); 415 416 pmap_kremove(va, len); 417 uvm_km_free(kernel_map, va, len, UVM_KMF_VAONLY); 418 } 419 420 void 421 cpu_evcnt_attach(struct cpu_info *ci) 422 { 423 struct cpu_softc * const cpu = ci->ci_softc; 424 const char * const xname = ci->ci_data.cpu_name; 425 426 evcnt_attach_dynamic_nozero(&ci->ci_ev_clock, EVCNT_TYPE_INTR, 427 NULL, xname, "clock"); 428 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_late_clock, EVCNT_TYPE_INTR, 429 NULL, xname, "late clock"); 430 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_exec_trap_sync, EVCNT_TYPE_TRAP, 431 NULL, xname, "exec pages synced (trap)"); 432 evcnt_attach_dynamic_nozero(&ci->ci_ev_traps, EVCNT_TYPE_TRAP, 433 NULL, xname, "traps"); 434 evcnt_attach_dynamic_nozero(&ci->ci_ev_kdsi, EVCNT_TYPE_TRAP, 435 &ci->ci_ev_traps, xname, "kernel DSI traps"); 436 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi, EVCNT_TYPE_TRAP, 437 &ci->ci_ev_traps, xname, "user DSI traps"); 438 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi_fatal, EVCNT_TYPE_TRAP, 439 &ci->ci_ev_udsi, xname, "user DSI failures"); 440 evcnt_attach_dynamic_nozero(&ci->ci_ev_kisi, EVCNT_TYPE_TRAP, 441 &ci->ci_ev_traps, xname, "kernel ISI traps"); 442 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi, EVCNT_TYPE_TRAP, 443 &ci->ci_ev_traps, xname, "user ISI traps"); 444 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi_fatal, EVCNT_TYPE_TRAP, 445 &ci->ci_ev_isi, xname, "user ISI failures"); 446 evcnt_attach_dynamic_nozero(&ci->ci_ev_scalls, EVCNT_TYPE_TRAP, 447 &ci->ci_ev_traps, xname, "system call traps"); 448 evcnt_attach_dynamic_nozero(&ci->ci_ev_pgm, EVCNT_TYPE_TRAP, 449 &ci->ci_ev_traps, xname, "PGM traps"); 450 evcnt_attach_dynamic_nozero(&ci->ci_ev_debug, EVCNT_TYPE_TRAP, 451 &ci->ci_ev_traps, xname, "debug traps"); 452 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpu, EVCNT_TYPE_TRAP, 453 &ci->ci_ev_traps, xname, "FPU unavailable traps"); 454 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpusw, EVCNT_TYPE_MISC, 455 &ci->ci_ev_fpu, xname, "FPU context switches"); 456 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali, EVCNT_TYPE_TRAP, 457 &ci->ci_ev_traps, xname, "user alignment traps"); 458 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali_fatal, EVCNT_TYPE_TRAP, 459 &ci->ci_ev_ali, xname, "user alignment traps"); 460 evcnt_attach_dynamic_nozero(&ci->ci_ev_umchk, EVCNT_TYPE_TRAP, 461 &ci->ci_ev_umchk, xname, "user MCHK failures"); 462 evcnt_attach_dynamic_nozero(&ci->ci_ev_vec, EVCNT_TYPE_TRAP, 463 &ci->ci_ev_traps, xname, "SPE unavailable"); 464 evcnt_attach_dynamic_nozero(&ci->ci_ev_vecsw, EVCNT_TYPE_MISC, 465 &ci->ci_ev_vec, xname, "SPE context switches"); 466 evcnt_attach_dynamic_nozero(&ci->ci_ev_ipi, EVCNT_TYPE_INTR, 467 NULL, xname, "IPIs"); 468 evcnt_attach_dynamic_nozero(&ci->ci_ev_tlbmiss_soft, EVCNT_TYPE_TRAP, 469 &ci->ci_ev_traps, xname, "soft tlb misses"); 470 evcnt_attach_dynamic_nozero(&ci->ci_ev_dtlbmiss_hard, EVCNT_TYPE_TRAP, 471 &ci->ci_ev_traps, xname, "data tlb misses"); 472 evcnt_attach_dynamic_nozero(&ci->ci_ev_itlbmiss_hard, EVCNT_TYPE_TRAP, 473 &ci->ci_ev_traps, xname, "inst tlb misses"); 474 } 475 476 #ifdef MULTIPROCESSOR 477 register_t 478 cpu_hatch(void) 479 { 480 struct cpuset_info * const csi = &cpuset_info; 481 const size_t id = cpu_number(); 482 483 /* 484 * We've hatched so tell the spinup code. 485 */ 486 kcpuset_set(csi->cpus_hatched, id); 487 488 /* 489 * Loop until running bit for this cpu is set. 490 */ 491 while (!kcpuset_isset(csi->cpus_running, id)) { 492 continue; 493 } 494 495 /* 496 * Now that we are active, start the clocks. 497 */ 498 cpu_initclocks(); 499 500 /* 501 * Return sp of the idlelwp. Which we should be already using but ... 502 */ 503 return curcpu()->ci_curpcb->pcb_sp; 504 } 505 506 void 507 cpu_boot_secondary_processors(void) 508 { 509 volatile struct cpuset_info * const csi = &cpuset_info; 510 CPU_INFO_ITERATOR cii; 511 struct cpu_info *ci; 512 kcpuset_t *running; 513 514 kcpuset_create(&running, true); 515 516 for (CPU_INFO_FOREACH(cii, ci)) { 517 /* 518 * Skip this CPU if it didn't sucessfully hatch. 519 */ 520 if (!kcpuset_isset(csi->cpus_hatched, cpu_index(ci))) 521 continue; 522 523 KASSERT(!CPU_IS_PRIMARY(ci)); 524 KASSERT(ci->ci_data.cpu_idlelwp); 525 526 kcpuset_set(running, cpu_index(ci)); 527 } 528 KASSERT(kcpuset_match(csi->cpus_hatched, running)); 529 if (!kcpuset_iszero(running)) { 530 kcpuset_merge(csi->cpus_running, running); 531 } 532 kcpuset_destroy(running); 533 } 534 #endif 535 536 uint32_t 537 cpu_read_4(bus_addr_t a) 538 { 539 struct cpu_softc * const cpu = curcpu()->ci_softc; 540 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a); 541 return bus_space_read_4(cpu->cpu_bst, cpu->cpu_bsh, a); 542 } 543 544 uint8_t 545 cpu_read_1(bus_addr_t a) 546 { 547 struct cpu_softc * const cpu = curcpu()->ci_softc; 548 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a); 549 return bus_space_read_1(cpu->cpu_bst, cpu->cpu_bsh, a); 550 } 551 552 void 553 cpu_write_4(bus_addr_t a, uint32_t v) 554 { 555 struct cpu_softc * const cpu = curcpu()->ci_softc; 556 bus_space_write_4(cpu->cpu_bst, cpu->cpu_bsh, a, v); 557 } 558 559 void 560 cpu_write_1(bus_addr_t a, uint8_t v) 561 { 562 struct cpu_softc * const cpu = curcpu()->ci_softc; 563 bus_space_write_1(cpu->cpu_bst, cpu->cpu_bsh, a, v); 564 } 565 566 void 567 booke_sstep(struct trapframe *tf) 568 { 569 uint32_t insn; 570 571 KASSERT(tf->tf_srr1 & PSL_DE); 572 if (ufetch_32((const void *)tf->tf_srr0, &insn) != 0) 573 return; 574 575 register_t dbcr0 = DBCR0_IAC1 | DBCR0_IDM; 576 register_t dbcr1 = DBCR1_IAC1US_USER | DBCR1_IAC1ER_DS1; 577 if ((insn >> 28) == 4) { 578 uint32_t iac2 = 0; 579 if ((insn >> 26) == 0x12) { 580 const int32_t off = (((int32_t)insn << 6) >> 6) & ~3; 581 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off; 582 dbcr0 |= DBCR0_IAC2; 583 } else if ((insn >> 26) == 0x10) { 584 const int16_t off = insn & ~3; 585 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off; 586 dbcr0 |= DBCR0_IAC2; 587 } else if ((insn & 0xfc00fffe) == 0x4c000420) { 588 iac2 = tf->tf_ctr; 589 dbcr0 |= DBCR0_IAC2; 590 } else if ((insn & 0xfc00fffe) == 0x4c000020) { 591 iac2 = tf->tf_lr; 592 dbcr0 |= DBCR0_IAC2; 593 } 594 if (dbcr0 & DBCR0_IAC2) { 595 dbcr1 |= DBCR1_IAC2US_USER | DBCR1_IAC2ER_DS1; 596 mtspr(SPR_IAC2, iac2); 597 } 598 } 599 mtspr(SPR_IAC1, tf->tf_srr0 + 4); 600 mtspr(SPR_DBCR1, dbcr1); 601 mtspr(SPR_DBCR0, dbcr0); 602 } 603 604 #ifdef DIAGNOSTIC 605 static inline void 606 swap_data(uint64_t *data, size_t a, size_t b) 607 { 608 uint64_t swap = data[a]; 609 data[a] = data[b]; 610 data[b] = swap; 611 } 612 613 static void 614 sort_data(uint64_t *data, size_t count) 615 { 616 #if 0 617 /* 618 * Mostly classic bubble sort 619 */ 620 do { 621 size_t new_count = 0; 622 for (size_t i = 1; i < count; i++) { 623 if (tbs[i - 1] > tbs[i]) { 624 swap_tbs(tbs, i - 1, i); 625 new_count = i; 626 } 627 } 628 count = new_count; 629 } while (count > 0); 630 #else 631 /* 632 * Comb sort 633 */ 634 size_t gap = count; 635 bool swapped = false; 636 while (gap > 1 || swapped) { 637 if (gap > 1) { 638 /* 639 * phi = (1 + sqrt(5)) / 2 [golden ratio] 640 * N = 1 / (1 - e^-phi)) = 1.247330950103979 641 * 642 * We want to but can't use floating point to calculate 643 * gap = (size_t)((double)gap / N) 644 * 645 * So we will use the multicative inverse of N 646 * (module 65536) to achieve the division. 647 * 648 * iN = 2^16 / 1.24733... = 52540 649 * x / N == (x * iN) / 65536 650 */ 651 gap = (gap * 52540) / 65536; 652 } 653 654 swapped = false; 655 656 for (size_t i = 0; gap + i < count; i++) { 657 if (data[i] > data[i + gap]) { 658 swap_data(data, i, i + gap); 659 swapped = true; 660 } 661 } 662 } 663 #endif 664 } 665 #endif 666 667 void 668 dump_splhist(struct cpu_info *ci, void (*pr)(const char *, ...)) 669 { 670 #ifdef DIAGNOSTIC 671 struct cpu_softc * const cpu = ci->ci_softc; 672 uint64_t tbs[NIPL*NIPL]; 673 size_t ntbs = 0; 674 for (size_t to = 0; to < NIPL; to++) { 675 for (size_t from = 0; from < NIPL; from++) { 676 uint64_t tb = cpu->cpu_spl_tb[to][from]; 677 if (tb == 0) 678 continue; 679 tbs[ntbs++] = (tb << 8) | (to << 4) | from; 680 } 681 } 682 sort_data(tbs, ntbs); 683 684 if (pr == NULL) 685 pr = printf; 686 uint64_t last_tb = 0; 687 for (size_t i = 0; i < ntbs; i++) { 688 uint64_t tb = tbs[i]; 689 size_t from = tb & 15; 690 size_t to = (tb >> 4) & 15; 691 tb >>= 8; 692 (*pr)("%s(%zu) from %zu at %"PRId64"", 693 from < to ? "splraise" : "splx", 694 to, from, tb); 695 if (last_tb && from != IPL_NONE) 696 (*pr)(" (+%"PRId64")", tb - last_tb); 697 (*pr)("\n"); 698 last_tb = tb; 699 } 700 #endif 701 } 702
Indexes created Mon Sep 29 21:09:56 GMT 2025