booke_machdep.c revision 1.3 1 /*-
2 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
3 * All rights reserved.
4 *
5 * This code is derived from software contributed to The NetBSD Foundation
6 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects
7 * Agency and which was developed by Matt Thomas of 3am Software Foundry.
8 *
9 * This material is based upon work supported by the Defense Advanced Research
10 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under
11 * Contract No. N66001-09-C-2073.
12 * Approved for Public Release, Distribution Unlimited
13 *
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * 1. Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * 2. Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in the
21 * documentation and/or other materials provided with the distribution.
22 *
23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 * POSSIBILITY OF SUCH DAMAGE.
34 */
35
36 #define __INTR_PRIVATE
37 #define _POWERPC_BUS_DMA_PRIVATE
38
39 #include <sys/cdefs.h>
40
41 #include <sys/param.h>
42 #include <sys/cpu.h>
43 #include <sys/device.h>
44 #include <sys/intr.h>
45 #include <sys/mount.h>
46 #include <sys/msgbuf.h>
47 #include <sys/kernel.h>
48 #include <sys/reboot.h>
49 #include <sys/bus.h>
50
51 #include <uvm/uvm_extern.h>
52
53 #include <powerpc/altivec.h>
54
55 /*
56 * Global variables used here and there
57 */
58 paddr_t msgbuf_paddr;
59 psize_t pmemsize;
60 struct vm_map *phys_map;
61
62 static bus_addr_t booke_dma_phys_to_bus_mem(bus_dma_tag_t, bus_addr_t);
63 static bus_addr_t booke_dma_bus_mem_to_phys(bus_dma_tag_t, bus_addr_t);
64
65
66 struct powerpc_bus_dma_tag booke_bus_dma_tag = {
67 ._dmamap_create = _bus_dmamap_create,
68 ._dmamap_destroy = _bus_dmamap_destroy,
69 ._dmamap_load = _bus_dmamap_load,
70 ._dmamap_load_mbuf = _bus_dmamap_load_mbuf,
71 ._dmamap_load_uio = _bus_dmamap_load_uio,
72 ._dmamap_load_raw = _bus_dmamap_load_raw,
73 ._dmamap_unload = _bus_dmamap_unload,
74 ._dmamap_sync = _bus_dmamap_sync,
75 ._dmamem_alloc = _bus_dmamem_alloc,
76 ._dmamem_free = _bus_dmamem_free,
77 ._dmamem_map = _bus_dmamem_map,
78 ._dmamem_unmap = _bus_dmamem_unmap,
79 ._dmamem_mmap = _bus_dmamem_mmap,
80 ._dma_phys_to_bus_mem = booke_dma_phys_to_bus_mem,
81 ._dma_bus_mem_to_phys = booke_dma_bus_mem_to_phys,
82 };
83
84 static bus_addr_t
85 booke_dma_phys_to_bus_mem(bus_dma_tag_t t, bus_addr_t a)
86 {
87 return a;
88 }
89
90 static bus_addr_t
91 booke_dma_bus_mem_to_phys(bus_dma_tag_t t, bus_addr_t a)
92 {
93 return a;
94 }
95
96 static int
97 null_splraise(int ipl)
98 {
99 int cpl = curcpu()->ci_cpl;
100 curcpu()->ci_cpl = ipl;
101 return cpl;
102 }
103
104 static void
105 null_splx(int ipl)
106 {
107 curcpu()->ci_cpl = ipl;
108 }
109
110 static const struct intrsw null_intrsw = {
111 .intrsw_splraise = null_splraise,
112 .intrsw_splx = null_splx,
113 };
114
115 const struct intrsw *powerpc_intrsw = &null_intrsw;
116 struct cpu_md_ops cpu_md_ops;
117 extern struct cpu_info cpu_info[1];
118
119 #if 0
120 pt_entry_t ptp0[NPTEPG] = {
121 [(0x20000 & SEGOFSET) >> PGSHIFT] = 0x00020000|PTE_xR|PTE_xX|PTE_M,
122 };
123
124 struct pmap_segtab pmap_kern_segtab = {
125 .seg_tab[0x20000 >> SEGSHIFT] = ptp0,
126 };
127 #endif
128
129 struct cpu_softc cpu_softc[1] = {
130 [0] = {
131 .cpu_ci = cpu_info,
132 },
133 };
134 struct cpu_info cpu_info[1] = {
135 [0] = {
136 .ci_curlwp = &lwp0,
137 .ci_tlb_info = &pmap_tlb0_info,
138 .ci_softc = cpu_softc,
139 .ci_cpl = IPL_HIGH,
140 .ci_fpulwp = &lwp0,
141 .ci_veclwp = &lwp0,
142 #if 0
143 .ci_pmap_kern_segtab = &pmap_kern_segtab,
144 #endif
145 },
146 };
147
148 /*
149 * This should probably be in autoconf! XXX
150 */
151 char cpu_model[80];
152 char machine[] = MACHINE; /* from <machine/param.h> */
153 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */
154
155 char bootpath[256];
156
157 #if NKSYMS || defined(DDB) || defined(MODULAR)
158 void *startsym, *endsym;
159 #endif
160
161 int fake_mapiodev = 1;
162
163 void lcsplx(int);
164
165 void
166 booke_cpu_startup(const char *model)
167 {
168 vaddr_t minaddr, maxaddr;
169 char pbuf[9];
170
171 strlcpy(cpu_model, model, sizeof(cpu_model));
172
173 printf("%s%s", copyright, version);
174
175 format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
176 printf("total memory = %s\n", pbuf);
177
178 minaddr = 0;
179 /*
180 * Allocate a submap for physio
181 */
182 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
183 VM_PHYS_SIZE, 0, false, NULL);
184
185 /*
186 * No need to allocate an mbuf cluster submap. Mbuf clusters
187 * are allocated via the pool allocator, and we use direct-mapped
188 * pool pages.
189 */
190
191 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
192 printf("avail memory = %s\n", pbuf);
193
194 /*
195 * Set up the board properties database.
196 */
197 board_info_init();
198
199 /*
200 * Now that we have VM, malloc()s are OK in bus_space.
201 */
202 bus_space_mallocok();
203 fake_mapiodev = 0;
204 }
205
206 static void
207 dumpsys(void)
208 {
209
210 printf("dumpsys: TBD\n");
211 }
212
213 /*
214 * Halt or reboot the machine after syncing/dumping according to howto.
215 */
216 void
217 cpu_reboot(int howto, char *what)
218 {
219 static int syncing;
220 static char str[256];
221 char *ap = str, *ap1 = ap;
222
223 boothowto = howto;
224 if (!cold && !(howto & RB_NOSYNC) && !syncing) {
225 syncing = 1;
226 vfs_shutdown(); /* sync */
227 resettodr(); /* set wall clock */
228 }
229
230 splhigh();
231
232 if (!cold && (howto & RB_DUMP))
233 dumpsys();
234
235 doshutdownhooks();
236
237 pmf_system_shutdown(boothowto);
238
239 if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
240 /* Power off here if we know how...*/
241 }
242
243 if (howto & RB_HALT) {
244 printf("halted\n\n");
245
246 goto reboot; /* XXX for now... */
247
248 #ifdef DDB
249 printf("dropping to debugger\n");
250 while(1)
251 Debugger();
252 #endif
253 }
254
255 printf("rebooting\n\n");
256 if (what && *what) {
257 if (strlen(what) > sizeof str - 5)
258 printf("boot string too large, ignored\n");
259 else {
260 strcpy(str, what);
261 ap1 = ap = str + strlen(str);
262 *ap++ = ' ';
263 }
264 }
265 *ap++ = '-';
266 if (howto & RB_SINGLE)
267 *ap++ = 's';
268 if (howto & RB_KDB)
269 *ap++ = 'd';
270 *ap++ = 0;
271 if (ap[-2] == '-')
272 *ap1 = 0;
273
274 /* flush cache for msgbuf */
275 dcache_wb(msgbuf_paddr, round_page(MSGBUFSIZE));
276
277 reboot:
278 __asm volatile("msync; isync");
279 (*cpu_md_ops.md_cpu_reset)();
280
281 printf("%s: md_cpu_reset() failed!\n", __func__);
282 #ifdef DDB
283 for (;;)
284 Debugger();
285 #else
286 for (;;)
287 /* nothing */;
288 #endif
289 }
290 void
291 lcsplx(int spl)
292 {
293 splx(spl);
294 }
295
296 /*
297 * mapiodev:
298 *
299 * Allocate vm space and mapin the I/O address. Use reserved TLB
300 * mapping if one is found.
301 */
302 void *
303 mapiodev(paddr_t pa, psize_t len)
304 {
305 const vsize_t off = pa & PAGE_MASK;
306
307 /*
308 * See if we have reserved TLB entry for the pa. This needs to be
309 * true for console as we can't use uvm during early bootstrap.
310 */
311 void * const p = tlb_mapiodev(pa, len);
312 if (p != NULL)
313 return p;
314
315 if (fake_mapiodev)
316 panic("mapiodev: no TLB entry reserved for %llx+%llx",
317 (long long)pa, (long long)len);
318
319 pa = trunc_page(pa);
320 len = round_page(off + len);
321 vaddr_t va = uvm_km_alloc(kernel_map, len, 0, UVM_KMF_VAONLY);
322
323 if (va == 0)
324 return NULL;
325
326 for (va += len, pa += len; len > 0; len -= PAGE_SIZE) {
327 va -= PAGE_SIZE;
328 pa -= PAGE_SIZE;
329 pmap_kenter_pa(va, pa, VM_PROT_READ|VM_PROT_WRITE,
330 PMAP_NOCACHE);
331 }
332 pmap_update(pmap_kernel());
333 return (void *)(va + off);
334 }
335
336 void
337 unmapiodev(vaddr_t va, vsize_t len)
338 {
339 /* Nothing to do for reserved (ie. not uvm_km_alloc'd) mappings. */
340 if (va < VM_MIN_KERNEL_ADDRESS || va > VM_MAX_KERNEL_ADDRESS) {
341 tlb_unmapiodev(va, len);
342 return;
343 }
344
345 len = round_page((va & PAGE_MASK) + len);
346 va = trunc_page(va);
347
348 pmap_kremove(va, len);
349 uvm_km_free(kernel_map, va, len, UVM_KMF_VAONLY);
350 }
351
352 void
353 cpu_evcnt_attach(struct cpu_info *ci)
354 {
355 struct cpu_softc * const cpu = ci->ci_softc;
356 const char * const xname = device_xname(ci->ci_dev);
357
358 evcnt_attach_dynamic_nozero(&ci->ci_ev_clock, EVCNT_TYPE_INTR,
359 NULL, xname, "clock");
360 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_late_clock, EVCNT_TYPE_INTR,
361 NULL, xname, "late clock");
362 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_exec_trap_sync, EVCNT_TYPE_TRAP,
363 NULL, xname, "exec pages synced (trap)");
364 #ifndef __HAVE_FAST_SOFTINTS
365 evcnt_attach_dynamic_nozero(&ci->ci_ev_softclock, EVCNT_TYPE_INTR,
366 NULL, xname, "soft clock");
367 evcnt_attach_dynamic_nozero(&ci->ci_ev_softnet, EVCNT_TYPE_INTR,
368 NULL, xname, "soft net");
369 evcnt_attach_dynamic_nozero(&ci->ci_ev_softserial, EVCNT_TYPE_INTR,
370 NULL, xname, "soft serial");
371 #endif
372 evcnt_attach_dynamic_nozero(&ci->ci_ev_traps, EVCNT_TYPE_TRAP,
373 NULL, xname, "traps");
374 evcnt_attach_dynamic_nozero(&ci->ci_ev_kdsi, EVCNT_TYPE_TRAP,
375 &ci->ci_ev_traps, xname, "kernel DSI traps");
376 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi, EVCNT_TYPE_TRAP,
377 &ci->ci_ev_traps, xname, "user DSI traps");
378 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi_fatal, EVCNT_TYPE_TRAP,
379 &ci->ci_ev_udsi, xname, "user DSI failures");
380 evcnt_attach_dynamic_nozero(&ci->ci_ev_kisi, EVCNT_TYPE_TRAP,
381 &ci->ci_ev_traps, xname, "kernel ISI traps");
382 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi, EVCNT_TYPE_TRAP,
383 &ci->ci_ev_traps, xname, "user ISI traps");
384 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi_fatal, EVCNT_TYPE_TRAP,
385 &ci->ci_ev_isi, xname, "user ISI failures");
386 evcnt_attach_dynamic_nozero(&ci->ci_ev_scalls, EVCNT_TYPE_TRAP,
387 &ci->ci_ev_traps, xname, "system call traps");
388 evcnt_attach_dynamic_nozero(&ci->ci_ev_pgm, EVCNT_TYPE_TRAP,
389 &ci->ci_ev_traps, xname, "PGM traps");
390 evcnt_attach_dynamic_nozero(&ci->ci_ev_debug, EVCNT_TYPE_TRAP,
391 &ci->ci_ev_traps, xname, "debug traps");
392 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpu, EVCNT_TYPE_TRAP,
393 &ci->ci_ev_traps, xname, "FPU unavailable traps");
394 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpusw, EVCNT_TYPE_MISC,
395 &ci->ci_ev_fpu, xname, "FPU context switches");
396 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali, EVCNT_TYPE_TRAP,
397 &ci->ci_ev_traps, xname, "user alignment traps");
398 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali_fatal, EVCNT_TYPE_TRAP,
399 &ci->ci_ev_ali, xname, "user alignment traps");
400 evcnt_attach_dynamic_nozero(&ci->ci_ev_umchk, EVCNT_TYPE_TRAP,
401 &ci->ci_ev_umchk, xname, "user MCHK failures");
402 evcnt_attach_dynamic_nozero(&ci->ci_ev_vec, EVCNT_TYPE_TRAP,
403 &ci->ci_ev_traps, xname, "SPE unavailable");
404 evcnt_attach_dynamic_nozero(&ci->ci_ev_vecsw, EVCNT_TYPE_MISC,
405 &ci->ci_ev_vec, xname, "SPE context switches");
406 evcnt_attach_dynamic_nozero(&ci->ci_ev_ipi, EVCNT_TYPE_INTR,
407 NULL, xname, "IPIs");
408 evcnt_attach_dynamic_nozero(&ci->ci_ev_tlbmiss_soft, EVCNT_TYPE_TRAP,
409 &ci->ci_ev_traps, xname, "soft tlb misses");
410 evcnt_attach_dynamic_nozero(&ci->ci_ev_dtlbmiss_hard, EVCNT_TYPE_TRAP,
411 &ci->ci_ev_traps, xname, "data tlb misses");
412 evcnt_attach_dynamic_nozero(&ci->ci_ev_itlbmiss_hard, EVCNT_TYPE_TRAP,
413 &ci->ci_ev_traps, xname, "inst tlb misses");
414 }
415
416 uint32_t
417 cpu_read_4(bus_addr_t a)
418 {
419 struct cpu_softc * const cpu = curcpu()->ci_softc;
420 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a);
421 return bus_space_read_4(cpu->cpu_bst, cpu->cpu_bsh, a);
422 }
423
424 uint8_t
425 cpu_read_1(bus_addr_t a)
426 {
427 struct cpu_softc * const cpu = curcpu()->ci_softc;
428 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a);
429 return bus_space_read_1(cpu->cpu_bst, cpu->cpu_bsh, a);
430 }
431
432 void
433 cpu_write_4(bus_addr_t a, uint32_t v)
434 {
435 struct cpu_softc * const cpu = curcpu()->ci_softc;
436 bus_space_write_4(cpu->cpu_bst, cpu->cpu_bsh, a, v);
437 }
438
439 void
440 cpu_write_1(bus_addr_t a, uint8_t v)
441 {
442 struct cpu_softc * const cpu = curcpu()->ci_softc;
443 bus_space_write_1(cpu->cpu_bst, cpu->cpu_bsh, a, v);
444 }
445