booke_machdep.c revision 1.7
1 /*- 2 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 7 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 8 * 9 * This material is based upon work supported by the Defense Advanced Research 10 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 11 * Contract No. N66001-09-C-2073. 12 * Approved for Public Release, Distribution Unlimited 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 #define __INTR_PRIVATE 37 #define _POWERPC_BUS_DMA_PRIVATE 38 39 #include <sys/cdefs.h> 40 41 #include <sys/param.h> 42 #include <sys/cpu.h> 43 #include <sys/device.h> 44 #include <sys/intr.h> 45 #include <sys/mount.h> 46 #include <sys/msgbuf.h> 47 #include <sys/kernel.h> 48 #include <sys/reboot.h> 49 #include <sys/bus.h> 50 51 #include <uvm/uvm_extern.h> 52 53 #include <powerpc/spr.h> 54 #include <powerpc/booke/spr.h> 55 #include <powerpc/booke/cpuvar.h> 56 57 /* 58 * Global variables used here and there 59 */ 60 paddr_t msgbuf_paddr; 61 psize_t pmemsize; 62 struct vm_map *phys_map; 63 64 static bus_addr_t booke_dma_phys_to_bus_mem(bus_dma_tag_t, bus_addr_t); 65 static bus_addr_t booke_dma_bus_mem_to_phys(bus_dma_tag_t, bus_addr_t); 66 67 68 struct powerpc_bus_dma_tag booke_bus_dma_tag = { 69 ._dmamap_create = _bus_dmamap_create, 70 ._dmamap_destroy = _bus_dmamap_destroy, 71 ._dmamap_load = _bus_dmamap_load, 72 ._dmamap_load_mbuf = _bus_dmamap_load_mbuf, 73 ._dmamap_load_uio = _bus_dmamap_load_uio, 74 ._dmamap_load_raw = _bus_dmamap_load_raw, 75 ._dmamap_unload = _bus_dmamap_unload, 76 ._dmamap_sync = _bus_dmamap_sync, 77 ._dmamem_alloc = _bus_dmamem_alloc, 78 ._dmamem_free = _bus_dmamem_free, 79 ._dmamem_map = _bus_dmamem_map, 80 ._dmamem_unmap = _bus_dmamem_unmap, 81 ._dmamem_mmap = _bus_dmamem_mmap, 82 ._dma_phys_to_bus_mem = booke_dma_phys_to_bus_mem, 83 ._dma_bus_mem_to_phys = booke_dma_bus_mem_to_phys, 84 }; 85 86 static bus_addr_t 87 booke_dma_phys_to_bus_mem(bus_dma_tag_t t, bus_addr_t a) 88 { 89 return a; 90 } 91 92 static bus_addr_t 93 booke_dma_bus_mem_to_phys(bus_dma_tag_t t, bus_addr_t a) 94 { 95 return a; 96 } 97 98 static int 99 null_splraise(int ipl) 100 { 101 int cpl = curcpu()->ci_cpl; 102 curcpu()->ci_cpl = ipl; 103 return cpl; 104 } 105 106 static void 107 null_splx(int ipl) 108 { 109 curcpu()->ci_cpl = ipl; 110 } 111 112 static const struct intrsw null_intrsw = { 113 .intrsw_splraise = null_splraise, 114 .intrsw_splx = null_splx, 115 }; 116 117 const struct intrsw *powerpc_intrsw = &null_intrsw; 118 struct cpu_md_ops cpu_md_ops; 119 120 struct cpu_softc cpu_softc[] = { 121 [0] = { 122 .cpu_ci = &cpu_info[0], 123 }, 124 #ifdef MULTIPROCESSOR 125 [CPU_MAXNUM-1] = { 126 .cpu_ci = &cpu_info[CPU_MAXNUM-1], 127 }, 128 #endif 129 }; 130 struct cpu_info cpu_info[] = { 131 [0] = { 132 .ci_curlwp = &lwp0, 133 .ci_tlb_info = &pmap_tlb0_info, 134 .ci_softc = &cpu_softc[0], 135 .ci_cpl = IPL_HIGH, 136 }, 137 #ifdef MULTIPROCESSOR 138 [CPU_MAXNUM-1] = { 139 .ci_curlwp = NULL, 140 .ci_tlb_info = &pmap_tlb0_info, 141 .ci_softc = &cpu_softc[CPU_MAXNUM-1], 142 .ci_cpl = IPL_HIGH, 143 }, 144 #endif 145 }; 146 147 /* 148 * This should probably be in autoconf! XXX 149 */ 150 char cpu_model[80]; 151 char machine[] = MACHINE; /* from <machine/param.h> */ 152 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */ 153 154 char bootpath[256]; 155 156 #if NKSYMS || defined(DDB) || defined(MODULAR) 157 void *startsym, *endsym; 158 #endif 159 160 int fake_mapiodev = 1; 161 162 void 163 booke_cpu_startup(const char *model) 164 { 165 vaddr_t minaddr, maxaddr; 166 char pbuf[9]; 167 168 strlcpy(cpu_model, model, sizeof(cpu_model)); 169 170 printf("%s%s", copyright, version); 171 172 format_bytes(pbuf, sizeof(pbuf), ctob((uint64_t)physmem)); 173 printf("total memory = %s\n", pbuf); 174 175 minaddr = 0; 176 /* 177 * Allocate a submap for physio 178 */ 179 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 180 VM_PHYS_SIZE, 0, false, NULL); 181 182 /* 183 * No need to allocate an mbuf cluster submap. Mbuf clusters 184 * are allocated via the pool allocator, and we use direct-mapped 185 * pool pages. 186 */ 187 188 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 189 printf("avail memory = %s\n", pbuf); 190 191 /* 192 * Set up the board properties database. 193 */ 194 board_info_init(); 195 196 /* 197 * Now that we have VM, malloc()s are OK in bus_space. 198 */ 199 bus_space_mallocok(); 200 fake_mapiodev = 0; 201 } 202 203 static void 204 dumpsys(void) 205 { 206 207 printf("dumpsys: TBD\n"); 208 } 209 210 /* 211 * Halt or reboot the machine after syncing/dumping according to howto. 212 */ 213 void 214 cpu_reboot(int howto, char *what) 215 { 216 static int syncing; 217 static char str[256]; 218 char *ap = str, *ap1 = ap; 219 220 boothowto = howto; 221 if (!cold && !(howto & RB_NOSYNC) && !syncing) { 222 syncing = 1; 223 vfs_shutdown(); /* sync */ 224 resettodr(); /* set wall clock */ 225 } 226 227 splhigh(); 228 229 if (!cold && (howto & RB_DUMP)) 230 dumpsys(); 231 232 doshutdownhooks(); 233 234 pmf_system_shutdown(boothowto); 235 236 if ((howto & RB_POWERDOWN) == RB_POWERDOWN) { 237 /* Power off here if we know how...*/ 238 } 239 240 if (howto & RB_HALT) { 241 printf("halted\n\n"); 242 243 goto reboot; /* XXX for now... */ 244 245 #ifdef DDB 246 printf("dropping to debugger\n"); 247 while(1) 248 Debugger(); 249 #endif 250 } 251 252 printf("rebooting\n\n"); 253 if (what && *what) { 254 if (strlen(what) > sizeof str - 5) 255 printf("boot string too large, ignored\n"); 256 else { 257 strcpy(str, what); 258 ap1 = ap = str + strlen(str); 259 *ap++ = ' '; 260 } 261 } 262 *ap++ = '-'; 263 if (howto & RB_SINGLE) 264 *ap++ = 's'; 265 if (howto & RB_KDB) 266 *ap++ = 'd'; 267 *ap++ = 0; 268 if (ap[-2] == '-') 269 *ap1 = 0; 270 271 /* flush cache for msgbuf */ 272 dcache_wb(msgbuf_paddr, round_page(MSGBUFSIZE)); 273 274 reboot: 275 __asm volatile("msync; isync"); 276 (*cpu_md_ops.md_cpu_reset)(); 277 278 printf("%s: md_cpu_reset() failed!\n", __func__); 279 #ifdef DDB 280 for (;;) 281 Debugger(); 282 #else 283 for (;;) 284 /* nothing */; 285 #endif 286 } 287 288 /* 289 * mapiodev: 290 * 291 * Allocate vm space and mapin the I/O address. Use reserved TLB 292 * mapping if one is found. 293 */ 294 void * 295 mapiodev(paddr_t pa, psize_t len) 296 { 297 const vsize_t off = pa & PAGE_MASK; 298 299 /* 300 * See if we have reserved TLB entry for the pa. This needs to be 301 * true for console as we can't use uvm during early bootstrap. 302 */ 303 void * const p = tlb_mapiodev(pa, len); 304 if (p != NULL) 305 return p; 306 307 if (fake_mapiodev) 308 panic("mapiodev: no TLB entry reserved for %llx+%llx", 309 (long long)pa, (long long)len); 310 311 pa = trunc_page(pa); 312 len = round_page(off + len); 313 vaddr_t va = uvm_km_alloc(kernel_map, len, 0, UVM_KMF_VAONLY); 314 315 if (va == 0) 316 return NULL; 317 318 for (va += len, pa += len; len > 0; len -= PAGE_SIZE) { 319 va -= PAGE_SIZE; 320 pa -= PAGE_SIZE; 321 pmap_kenter_pa(va, pa, VM_PROT_READ|VM_PROT_WRITE, 322 PMAP_NOCACHE); 323 } 324 pmap_update(pmap_kernel()); 325 return (void *)(va + off); 326 } 327 328 void 329 unmapiodev(vaddr_t va, vsize_t len) 330 { 331 /* Nothing to do for reserved (ie. not uvm_km_alloc'd) mappings. */ 332 if (va < VM_MIN_KERNEL_ADDRESS || va > VM_MAX_KERNEL_ADDRESS) { 333 tlb_unmapiodev(va, len); 334 return; 335 } 336 337 len = round_page((va & PAGE_MASK) + len); 338 va = trunc_page(va); 339 340 pmap_kremove(va, len); 341 uvm_km_free(kernel_map, va, len, UVM_KMF_VAONLY); 342 } 343 344 void 345 cpu_evcnt_attach(struct cpu_info *ci) 346 { 347 struct cpu_softc * const cpu = ci->ci_softc; 348 const char * const xname = device_xname(ci->ci_dev); 349 350 evcnt_attach_dynamic_nozero(&ci->ci_ev_clock, EVCNT_TYPE_INTR, 351 NULL, xname, "clock"); 352 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_late_clock, EVCNT_TYPE_INTR, 353 NULL, xname, "late clock"); 354 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_exec_trap_sync, EVCNT_TYPE_TRAP, 355 NULL, xname, "exec pages synced (trap)"); 356 #ifndef __HAVE_FAST_SOFTINTS 357 evcnt_attach_dynamic_nozero(&ci->ci_ev_softclock, EVCNT_TYPE_INTR, 358 NULL, xname, "soft clock"); 359 evcnt_attach_dynamic_nozero(&ci->ci_ev_softnet, EVCNT_TYPE_INTR, 360 NULL, xname, "soft net"); 361 evcnt_attach_dynamic_nozero(&ci->ci_ev_softserial, EVCNT_TYPE_INTR, 362 NULL, xname, "soft serial"); 363 #endif 364 evcnt_attach_dynamic_nozero(&ci->ci_ev_traps, EVCNT_TYPE_TRAP, 365 NULL, xname, "traps"); 366 evcnt_attach_dynamic_nozero(&ci->ci_ev_kdsi, EVCNT_TYPE_TRAP, 367 &ci->ci_ev_traps, xname, "kernel DSI traps"); 368 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi, EVCNT_TYPE_TRAP, 369 &ci->ci_ev_traps, xname, "user DSI traps"); 370 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi_fatal, EVCNT_TYPE_TRAP, 371 &ci->ci_ev_udsi, xname, "user DSI failures"); 372 evcnt_attach_dynamic_nozero(&ci->ci_ev_kisi, EVCNT_TYPE_TRAP, 373 &ci->ci_ev_traps, xname, "kernel ISI traps"); 374 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi, EVCNT_TYPE_TRAP, 375 &ci->ci_ev_traps, xname, "user ISI traps"); 376 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi_fatal, EVCNT_TYPE_TRAP, 377 &ci->ci_ev_isi, xname, "user ISI failures"); 378 evcnt_attach_dynamic_nozero(&ci->ci_ev_scalls, EVCNT_TYPE_TRAP, 379 &ci->ci_ev_traps, xname, "system call traps"); 380 evcnt_attach_dynamic_nozero(&ci->ci_ev_pgm, EVCNT_TYPE_TRAP, 381 &ci->ci_ev_traps, xname, "PGM traps"); 382 evcnt_attach_dynamic_nozero(&ci->ci_ev_debug, EVCNT_TYPE_TRAP, 383 &ci->ci_ev_traps, xname, "debug traps"); 384 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpu, EVCNT_TYPE_TRAP, 385 &ci->ci_ev_traps, xname, "FPU unavailable traps"); 386 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpusw, EVCNT_TYPE_MISC, 387 &ci->ci_ev_fpu, xname, "FPU context switches"); 388 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali, EVCNT_TYPE_TRAP, 389 &ci->ci_ev_traps, xname, "user alignment traps"); 390 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali_fatal, EVCNT_TYPE_TRAP, 391 &ci->ci_ev_ali, xname, "user alignment traps"); 392 evcnt_attach_dynamic_nozero(&ci->ci_ev_umchk, EVCNT_TYPE_TRAP, 393 &ci->ci_ev_umchk, xname, "user MCHK failures"); 394 evcnt_attach_dynamic_nozero(&ci->ci_ev_vec, EVCNT_TYPE_TRAP, 395 &ci->ci_ev_traps, xname, "SPE unavailable"); 396 evcnt_attach_dynamic_nozero(&ci->ci_ev_vecsw, EVCNT_TYPE_MISC, 397 &ci->ci_ev_vec, xname, "SPE context switches"); 398 evcnt_attach_dynamic_nozero(&ci->ci_ev_ipi, EVCNT_TYPE_INTR, 399 NULL, xname, "IPIs"); 400 evcnt_attach_dynamic_nozero(&ci->ci_ev_tlbmiss_soft, EVCNT_TYPE_TRAP, 401 &ci->ci_ev_traps, xname, "soft tlb misses"); 402 evcnt_attach_dynamic_nozero(&ci->ci_ev_dtlbmiss_hard, EVCNT_TYPE_TRAP, 403 &ci->ci_ev_traps, xname, "data tlb misses"); 404 evcnt_attach_dynamic_nozero(&ci->ci_ev_itlbmiss_hard, EVCNT_TYPE_TRAP, 405 &ci->ci_ev_traps, xname, "inst tlb misses"); 406 } 407 408 uint32_t 409 cpu_read_4(bus_addr_t a) 410 { 411 struct cpu_softc * const cpu = curcpu()->ci_softc; 412 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a); 413 return bus_space_read_4(cpu->cpu_bst, cpu->cpu_bsh, a); 414 } 415 416 uint8_t 417 cpu_read_1(bus_addr_t a) 418 { 419 struct cpu_softc * const cpu = curcpu()->ci_softc; 420 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a); 421 return bus_space_read_1(cpu->cpu_bst, cpu->cpu_bsh, a); 422 } 423 424 void 425 cpu_write_4(bus_addr_t a, uint32_t v) 426 { 427 struct cpu_softc * const cpu = curcpu()->ci_softc; 428 bus_space_write_4(cpu->cpu_bst, cpu->cpu_bsh, a, v); 429 } 430 431 void 432 cpu_write_1(bus_addr_t a, uint8_t v) 433 { 434 struct cpu_softc * const cpu = curcpu()->ci_softc; 435 bus_space_write_1(cpu->cpu_bst, cpu->cpu_bsh, a, v); 436 } 437 438 void 439 booke_sstep(struct trapframe *tf) 440 { 441 KASSERT(tf->tf_srr1 & PSL_DE); 442 const uint32_t insn = ufetch_32((const void *)tf->tf_srr0); 443 register_t dbcr0 = DBCR0_IAC1 | DBCR0_IDM; 444 register_t dbcr1 = DBCR1_IAC1US_USER | DBCR1_IAC1ER_DS1; 445 if ((insn >> 28) == 4) { 446 uint32_t iac2 = 0; 447 if ((insn >> 26) == 0x12) { 448 const int32_t off = (((int32_t)insn << 6) >> 6) & ~3; 449 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off; 450 dbcr0 |= DBCR0_IAC2; 451 } else if ((insn >> 26) == 0x10) { 452 const int16_t off = insn & ~3; 453 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off; 454 dbcr0 |= DBCR0_IAC2; 455 } else if ((insn & 0xfc00ffde) == 0x4c000420) { 456 iac2 = tf->tf_ctr; 457 dbcr0 |= DBCR0_IAC2; 458 } else if ((insn & 0xfc00ffde) == 0x4c000020) { 459 iac2 = tf->tf_lr; 460 dbcr0 |= DBCR0_IAC2; 461 } 462 if (dbcr0 & DBCR0_IAC2) { 463 dbcr1 |= DBCR1_IAC2US_USER | DBCR1_IAC2ER_DS1; 464 mtspr(SPR_IAC2, iac2); 465 } 466 } 467 mtspr(SPR_IAC1, tf->tf_srr0 + 4); 468 mtspr(SPR_DBCR1, dbcr1); 469 mtspr(SPR_DBCR0, dbcr0); 470 } 471
Indexes created Sat Oct 18 08:10:09 GMT 2025