booke_machdep.c revision 1.8
1 /*- 2 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 7 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 8 * 9 * This material is based upon work supported by the Defense Advanced Research 10 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 11 * Contract No. N66001-09-C-2073. 12 * Approved for Public Release, Distribution Unlimited 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 #define __INTR_PRIVATE 37 #define _POWERPC_BUS_DMA_PRIVATE 38 39 #include <sys/cdefs.h> 40 41 #include <sys/param.h> 42 #include <sys/cpu.h> 43 #include <sys/device.h> 44 #include <sys/intr.h> 45 #include <sys/mount.h> 46 #include <sys/msgbuf.h> 47 #include <sys/kernel.h> 48 #include <sys/reboot.h> 49 #include <sys/bus.h> 50 51 #include <uvm/uvm_extern.h> 52 53 #include <powerpc/spr.h> 54 #include <powerpc/booke/spr.h> 55 #include <powerpc/booke/cpuvar.h> 56 57 /* 58 * Global variables used here and there 59 */ 60 paddr_t msgbuf_paddr; 61 psize_t pmemsize; 62 struct vm_map *phys_map; 63 64 static bus_addr_t booke_dma_phys_to_bus_mem(bus_dma_tag_t, bus_addr_t); 65 static bus_addr_t booke_dma_bus_mem_to_phys(bus_dma_tag_t, bus_addr_t); 66 67 68 struct powerpc_bus_dma_tag booke_bus_dma_tag = { 69 ._dmamap_create = _bus_dmamap_create, 70 ._dmamap_destroy = _bus_dmamap_destroy, 71 ._dmamap_load = _bus_dmamap_load, 72 ._dmamap_load_mbuf = _bus_dmamap_load_mbuf, 73 ._dmamap_load_uio = _bus_dmamap_load_uio, 74 ._dmamap_load_raw = _bus_dmamap_load_raw, 75 ._dmamap_unload = _bus_dmamap_unload, 76 ._dmamap_sync = _bus_dmamap_sync, 77 ._dmamem_alloc = _bus_dmamem_alloc, 78 ._dmamem_free = _bus_dmamem_free, 79 ._dmamem_map = _bus_dmamem_map, 80 ._dmamem_unmap = _bus_dmamem_unmap, 81 ._dmamem_mmap = _bus_dmamem_mmap, 82 ._dma_phys_to_bus_mem = booke_dma_phys_to_bus_mem, 83 ._dma_bus_mem_to_phys = booke_dma_bus_mem_to_phys, 84 }; 85 86 static bus_addr_t 87 booke_dma_phys_to_bus_mem(bus_dma_tag_t t, bus_addr_t a) 88 { 89 return a; 90 } 91 92 static bus_addr_t 93 booke_dma_bus_mem_to_phys(bus_dma_tag_t t, bus_addr_t a) 94 { 95 return a; 96 } 97 98 struct cpu_md_ops cpu_md_ops; 99 100 struct cpu_softc cpu_softc[] = { 101 [0] = { 102 .cpu_ci = &cpu_info[0], 103 }, 104 #ifdef MULTIPROCESSOR 105 [CPU_MAXNUM-1] = { 106 .cpu_ci = &cpu_info[CPU_MAXNUM-1], 107 }, 108 #endif 109 }; 110 struct cpu_info cpu_info[] = { 111 [0] = { 112 .ci_curlwp = &lwp0, 113 .ci_tlb_info = &pmap_tlb0_info, 114 .ci_softc = &cpu_softc[0], 115 .ci_cpl = IPL_HIGH, 116 }, 117 #ifdef MULTIPROCESSOR 118 [CPU_MAXNUM-1] = { 119 .ci_curlwp = NULL, 120 .ci_tlb_info = &pmap_tlb0_info, 121 .ci_softc = &cpu_softc[CPU_MAXNUM-1], 122 .ci_cpl = IPL_HIGH, 123 }, 124 #endif 125 }; 126 127 /* 128 * This should probably be in autoconf! XXX 129 */ 130 char cpu_model[80]; 131 char machine[] = MACHINE; /* from <machine/param.h> */ 132 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */ 133 134 char bootpath[256]; 135 136 #if NKSYMS || defined(DDB) || defined(MODULAR) 137 void *startsym, *endsym; 138 #endif 139 140 int fake_mapiodev = 1; 141 142 void 143 booke_cpu_startup(const char *model) 144 { 145 vaddr_t minaddr, maxaddr; 146 char pbuf[9]; 147 148 strlcpy(cpu_model, model, sizeof(cpu_model)); 149 150 printf("%s%s", copyright, version); 151 152 format_bytes(pbuf, sizeof(pbuf), ctob((uint64_t)physmem)); 153 printf("total memory = %s\n", pbuf); 154 155 minaddr = 0; 156 /* 157 * Allocate a submap for physio 158 */ 159 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 160 VM_PHYS_SIZE, 0, false, NULL); 161 162 /* 163 * No need to allocate an mbuf cluster submap. Mbuf clusters 164 * are allocated via the pool allocator, and we use direct-mapped 165 * pool pages. 166 */ 167 168 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 169 printf("avail memory = %s\n", pbuf); 170 171 /* 172 * Set up the board properties database. 173 */ 174 board_info_init(); 175 176 /* 177 * Now that we have VM, malloc()s are OK in bus_space. 178 */ 179 bus_space_mallocok(); 180 fake_mapiodev = 0; 181 } 182 183 static void 184 dumpsys(void) 185 { 186 187 printf("dumpsys: TBD\n"); 188 } 189 190 /* 191 * Halt or reboot the machine after syncing/dumping according to howto. 192 */ 193 void 194 cpu_reboot(int howto, char *what) 195 { 196 static int syncing; 197 static char str[256]; 198 char *ap = str, *ap1 = ap; 199 200 boothowto = howto; 201 if (!cold && !(howto & RB_NOSYNC) && !syncing) { 202 syncing = 1; 203 vfs_shutdown(); /* sync */ 204 resettodr(); /* set wall clock */ 205 } 206 207 splhigh(); 208 209 if (!cold && (howto & RB_DUMP)) 210 dumpsys(); 211 212 doshutdownhooks(); 213 214 pmf_system_shutdown(boothowto); 215 216 if ((howto & RB_POWERDOWN) == RB_POWERDOWN) { 217 /* Power off here if we know how...*/ 218 } 219 220 if (howto & RB_HALT) { 221 printf("halted\n\n"); 222 223 goto reboot; /* XXX for now... */ 224 225 #ifdef DDB 226 printf("dropping to debugger\n"); 227 while(1) 228 Debugger(); 229 #endif 230 } 231 232 printf("rebooting\n\n"); 233 if (what && *what) { 234 if (strlen(what) > sizeof str - 5) 235 printf("boot string too large, ignored\n"); 236 else { 237 strcpy(str, what); 238 ap1 = ap = str + strlen(str); 239 *ap++ = ' '; 240 } 241 } 242 *ap++ = '-'; 243 if (howto & RB_SINGLE) 244 *ap++ = 's'; 245 if (howto & RB_KDB) 246 *ap++ = 'd'; 247 *ap++ = 0; 248 if (ap[-2] == '-') 249 *ap1 = 0; 250 251 /* flush cache for msgbuf */ 252 dcache_wb(msgbuf_paddr, round_page(MSGBUFSIZE)); 253 254 reboot: 255 __asm volatile("msync; isync"); 256 (*cpu_md_ops.md_cpu_reset)(); 257 258 printf("%s: md_cpu_reset() failed!\n", __func__); 259 #ifdef DDB 260 for (;;) 261 Debugger(); 262 #else 263 for (;;) 264 /* nothing */; 265 #endif 266 } 267 268 /* 269 * mapiodev: 270 * 271 * Allocate vm space and mapin the I/O address. Use reserved TLB 272 * mapping if one is found. 273 */ 274 void * 275 mapiodev(paddr_t pa, psize_t len) 276 { 277 const vsize_t off = pa & PAGE_MASK; 278 279 /* 280 * See if we have reserved TLB entry for the pa. This needs to be 281 * true for console as we can't use uvm during early bootstrap. 282 */ 283 void * const p = tlb_mapiodev(pa, len); 284 if (p != NULL) 285 return p; 286 287 if (fake_mapiodev) 288 panic("mapiodev: no TLB entry reserved for %llx+%llx", 289 (long long)pa, (long long)len); 290 291 pa = trunc_page(pa); 292 len = round_page(off + len); 293 vaddr_t va = uvm_km_alloc(kernel_map, len, 0, UVM_KMF_VAONLY); 294 295 if (va == 0) 296 return NULL; 297 298 for (va += len, pa += len; len > 0; len -= PAGE_SIZE) { 299 va -= PAGE_SIZE; 300 pa -= PAGE_SIZE; 301 pmap_kenter_pa(va, pa, VM_PROT_READ|VM_PROT_WRITE, 302 PMAP_NOCACHE); 303 } 304 pmap_update(pmap_kernel()); 305 return (void *)(va + off); 306 } 307 308 void 309 unmapiodev(vaddr_t va, vsize_t len) 310 { 311 /* Nothing to do for reserved (ie. not uvm_km_alloc'd) mappings. */ 312 if (va < VM_MIN_KERNEL_ADDRESS || va > VM_MAX_KERNEL_ADDRESS) { 313 tlb_unmapiodev(va, len); 314 return; 315 } 316 317 len = round_page((va & PAGE_MASK) + len); 318 va = trunc_page(va); 319 320 pmap_kremove(va, len); 321 uvm_km_free(kernel_map, va, len, UVM_KMF_VAONLY); 322 } 323 324 void 325 cpu_evcnt_attach(struct cpu_info *ci) 326 { 327 struct cpu_softc * const cpu = ci->ci_softc; 328 const char * const xname = device_xname(ci->ci_dev); 329 330 evcnt_attach_dynamic_nozero(&ci->ci_ev_clock, EVCNT_TYPE_INTR, 331 NULL, xname, "clock"); 332 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_late_clock, EVCNT_TYPE_INTR, 333 NULL, xname, "late clock"); 334 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_exec_trap_sync, EVCNT_TYPE_TRAP, 335 NULL, xname, "exec pages synced (trap)"); 336 #ifndef __HAVE_FAST_SOFTINTS 337 evcnt_attach_dynamic_nozero(&ci->ci_ev_softclock, EVCNT_TYPE_INTR, 338 NULL, xname, "soft clock"); 339 evcnt_attach_dynamic_nozero(&ci->ci_ev_softnet, EVCNT_TYPE_INTR, 340 NULL, xname, "soft net"); 341 evcnt_attach_dynamic_nozero(&ci->ci_ev_softserial, EVCNT_TYPE_INTR, 342 NULL, xname, "soft serial"); 343 #endif 344 evcnt_attach_dynamic_nozero(&ci->ci_ev_traps, EVCNT_TYPE_TRAP, 345 NULL, xname, "traps"); 346 evcnt_attach_dynamic_nozero(&ci->ci_ev_kdsi, EVCNT_TYPE_TRAP, 347 &ci->ci_ev_traps, xname, "kernel DSI traps"); 348 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi, EVCNT_TYPE_TRAP, 349 &ci->ci_ev_traps, xname, "user DSI traps"); 350 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi_fatal, EVCNT_TYPE_TRAP, 351 &ci->ci_ev_udsi, xname, "user DSI failures"); 352 evcnt_attach_dynamic_nozero(&ci->ci_ev_kisi, EVCNT_TYPE_TRAP, 353 &ci->ci_ev_traps, xname, "kernel ISI traps"); 354 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi, EVCNT_TYPE_TRAP, 355 &ci->ci_ev_traps, xname, "user ISI traps"); 356 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi_fatal, EVCNT_TYPE_TRAP, 357 &ci->ci_ev_isi, xname, "user ISI failures"); 358 evcnt_attach_dynamic_nozero(&ci->ci_ev_scalls, EVCNT_TYPE_TRAP, 359 &ci->ci_ev_traps, xname, "system call traps"); 360 evcnt_attach_dynamic_nozero(&ci->ci_ev_pgm, EVCNT_TYPE_TRAP, 361 &ci->ci_ev_traps, xname, "PGM traps"); 362 evcnt_attach_dynamic_nozero(&ci->ci_ev_debug, EVCNT_TYPE_TRAP, 363 &ci->ci_ev_traps, xname, "debug traps"); 364 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpu, EVCNT_TYPE_TRAP, 365 &ci->ci_ev_traps, xname, "FPU unavailable traps"); 366 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpusw, EVCNT_TYPE_MISC, 367 &ci->ci_ev_fpu, xname, "FPU context switches"); 368 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali, EVCNT_TYPE_TRAP, 369 &ci->ci_ev_traps, xname, "user alignment traps"); 370 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali_fatal, EVCNT_TYPE_TRAP, 371 &ci->ci_ev_ali, xname, "user alignment traps"); 372 evcnt_attach_dynamic_nozero(&ci->ci_ev_umchk, EVCNT_TYPE_TRAP, 373 &ci->ci_ev_umchk, xname, "user MCHK failures"); 374 evcnt_attach_dynamic_nozero(&ci->ci_ev_vec, EVCNT_TYPE_TRAP, 375 &ci->ci_ev_traps, xname, "SPE unavailable"); 376 evcnt_attach_dynamic_nozero(&ci->ci_ev_vecsw, EVCNT_TYPE_MISC, 377 &ci->ci_ev_vec, xname, "SPE context switches"); 378 evcnt_attach_dynamic_nozero(&ci->ci_ev_ipi, EVCNT_TYPE_INTR, 379 NULL, xname, "IPIs"); 380 evcnt_attach_dynamic_nozero(&ci->ci_ev_tlbmiss_soft, EVCNT_TYPE_TRAP, 381 &ci->ci_ev_traps, xname, "soft tlb misses"); 382 evcnt_attach_dynamic_nozero(&ci->ci_ev_dtlbmiss_hard, EVCNT_TYPE_TRAP, 383 &ci->ci_ev_traps, xname, "data tlb misses"); 384 evcnt_attach_dynamic_nozero(&ci->ci_ev_itlbmiss_hard, EVCNT_TYPE_TRAP, 385 &ci->ci_ev_traps, xname, "inst tlb misses"); 386 } 387 388 uint32_t 389 cpu_read_4(bus_addr_t a) 390 { 391 struct cpu_softc * const cpu = curcpu()->ci_softc; 392 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a); 393 return bus_space_read_4(cpu->cpu_bst, cpu->cpu_bsh, a); 394 } 395 396 uint8_t 397 cpu_read_1(bus_addr_t a) 398 { 399 struct cpu_softc * const cpu = curcpu()->ci_softc; 400 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a); 401 return bus_space_read_1(cpu->cpu_bst, cpu->cpu_bsh, a); 402 } 403 404 void 405 cpu_write_4(bus_addr_t a, uint32_t v) 406 { 407 struct cpu_softc * const cpu = curcpu()->ci_softc; 408 bus_space_write_4(cpu->cpu_bst, cpu->cpu_bsh, a, v); 409 } 410 411 void 412 cpu_write_1(bus_addr_t a, uint8_t v) 413 { 414 struct cpu_softc * const cpu = curcpu()->ci_softc; 415 bus_space_write_1(cpu->cpu_bst, cpu->cpu_bsh, a, v); 416 } 417 418 void 419 booke_sstep(struct trapframe *tf) 420 { 421 KASSERT(tf->tf_srr1 & PSL_DE); 422 const uint32_t insn = ufetch_32((const void *)tf->tf_srr0); 423 register_t dbcr0 = DBCR0_IAC1 | DBCR0_IDM; 424 register_t dbcr1 = DBCR1_IAC1US_USER | DBCR1_IAC1ER_DS1; 425 if ((insn >> 28) == 4) { 426 uint32_t iac2 = 0; 427 if ((insn >> 26) == 0x12) { 428 const int32_t off = (((int32_t)insn << 6) >> 6) & ~3; 429 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off; 430 dbcr0 |= DBCR0_IAC2; 431 } else if ((insn >> 26) == 0x10) { 432 const int16_t off = insn & ~3; 433 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off; 434 dbcr0 |= DBCR0_IAC2; 435 } else if ((insn & 0xfc00ffde) == 0x4c000420) { 436 iac2 = tf->tf_ctr; 437 dbcr0 |= DBCR0_IAC2; 438 } else if ((insn & 0xfc00ffde) == 0x4c000020) { 439 iac2 = tf->tf_lr; 440 dbcr0 |= DBCR0_IAC2; 441 } 442 if (dbcr0 & DBCR0_IAC2) { 443 dbcr1 |= DBCR1_IAC2US_USER | DBCR1_IAC2ER_DS1; 444 mtspr(SPR_IAC2, iac2); 445 } 446 } 447 mtspr(SPR_IAC1, tf->tf_srr0 + 4); 448 mtspr(SPR_DBCR1, dbcr1); 449 mtspr(SPR_DBCR0, dbcr0); 450 } 451
Indexes created Mon Oct 20 03:09:53 GMT 2025