booke_machdep.c revision 1.9
1 /*- 2 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 7 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 8 * 9 * This material is based upon work supported by the Defense Advanced Research 10 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 11 * Contract No. N66001-09-C-2073. 12 * Approved for Public Release, Distribution Unlimited 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 25 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 26 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 27 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 28 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 29 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 30 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 31 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 32 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 33 * POSSIBILITY OF SUCH DAMAGE. 34 */ 35 36 #define __INTR_PRIVATE 37 #define _POWERPC_BUS_DMA_PRIVATE 38 39 #include <sys/cdefs.h> 40 41 #include "opt_modular.h" 42 43 #include <sys/param.h> 44 #include <sys/cpu.h> 45 #include <sys/device.h> 46 #include <sys/intr.h> 47 #include <sys/mount.h> 48 #include <sys/msgbuf.h> 49 #include <sys/kernel.h> 50 #include <sys/reboot.h> 51 #include <sys/bus.h> 52 53 #include <uvm/uvm_extern.h> 54 55 #include <powerpc/spr.h> 56 #include <powerpc/booke/spr.h> 57 #include <powerpc/booke/cpuvar.h> 58 59 /* 60 * Global variables used here and there 61 */ 62 paddr_t msgbuf_paddr; 63 psize_t pmemsize; 64 struct vm_map *phys_map; 65 66 #ifdef MODULAR 67 register_t cpu_psluserset = PSL_USERSET; 68 register_t cpu_pslusermod = PSL_USERMOD; 69 register_t cpu_pslusermask = PSL_USERMASK; 70 #endif 71 72 static bus_addr_t booke_dma_phys_to_bus_mem(bus_dma_tag_t, bus_addr_t); 73 static bus_addr_t booke_dma_bus_mem_to_phys(bus_dma_tag_t, bus_addr_t); 74 75 76 struct powerpc_bus_dma_tag booke_bus_dma_tag = { 77 ._dmamap_create = _bus_dmamap_create, 78 ._dmamap_destroy = _bus_dmamap_destroy, 79 ._dmamap_load = _bus_dmamap_load, 80 ._dmamap_load_mbuf = _bus_dmamap_load_mbuf, 81 ._dmamap_load_uio = _bus_dmamap_load_uio, 82 ._dmamap_load_raw = _bus_dmamap_load_raw, 83 ._dmamap_unload = _bus_dmamap_unload, 84 ._dmamap_sync = _bus_dmamap_sync, 85 ._dmamem_alloc = _bus_dmamem_alloc, 86 ._dmamem_free = _bus_dmamem_free, 87 ._dmamem_map = _bus_dmamem_map, 88 ._dmamem_unmap = _bus_dmamem_unmap, 89 ._dmamem_mmap = _bus_dmamem_mmap, 90 ._dma_phys_to_bus_mem = booke_dma_phys_to_bus_mem, 91 ._dma_bus_mem_to_phys = booke_dma_bus_mem_to_phys, 92 }; 93 94 static bus_addr_t 95 booke_dma_phys_to_bus_mem(bus_dma_tag_t t, bus_addr_t a) 96 { 97 return a; 98 } 99 100 static bus_addr_t 101 booke_dma_bus_mem_to_phys(bus_dma_tag_t t, bus_addr_t a) 102 { 103 return a; 104 } 105 106 struct cpu_md_ops cpu_md_ops; 107 108 struct cpu_softc cpu_softc[] = { 109 [0] = { 110 .cpu_ci = &cpu_info[0], 111 }, 112 #ifdef MULTIPROCESSOR 113 [CPU_MAXNUM-1] = { 114 .cpu_ci = &cpu_info[CPU_MAXNUM-1], 115 }, 116 #endif 117 }; 118 struct cpu_info cpu_info[] = { 119 [0] = { 120 .ci_curlwp = &lwp0, 121 .ci_tlb_info = &pmap_tlb0_info, 122 .ci_softc = &cpu_softc[0], 123 .ci_cpl = IPL_HIGH, 124 }, 125 #ifdef MULTIPROCESSOR 126 [CPU_MAXNUM-1] = { 127 .ci_curlwp = NULL, 128 .ci_tlb_info = &pmap_tlb0_info, 129 .ci_softc = &cpu_softc[CPU_MAXNUM-1], 130 .ci_cpl = IPL_HIGH, 131 }, 132 #endif 133 }; 134 135 /* 136 * This should probably be in autoconf! XXX 137 */ 138 char cpu_model[80]; 139 char machine[] = MACHINE; /* from <machine/param.h> */ 140 char machine_arch[] = MACHINE_ARCH; /* from <machine/param.h> */ 141 142 char bootpath[256]; 143 144 #if NKSYMS || defined(DDB) || defined(MODULAR) 145 void *startsym, *endsym; 146 #endif 147 148 int fake_mapiodev = 1; 149 150 void 151 booke_cpu_startup(const char *model) 152 { 153 vaddr_t minaddr, maxaddr; 154 char pbuf[9]; 155 156 strlcpy(cpu_model, model, sizeof(cpu_model)); 157 158 printf("%s%s", copyright, version); 159 160 format_bytes(pbuf, sizeof(pbuf), ctob((uint64_t)physmem)); 161 printf("total memory = %s\n", pbuf); 162 163 minaddr = 0; 164 /* 165 * Allocate a submap for physio 166 */ 167 phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr, 168 VM_PHYS_SIZE, 0, false, NULL); 169 170 /* 171 * No need to allocate an mbuf cluster submap. Mbuf clusters 172 * are allocated via the pool allocator, and we use direct-mapped 173 * pool pages. 174 */ 175 176 format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free)); 177 printf("avail memory = %s\n", pbuf); 178 179 /* 180 * Set up the board properties database. 181 */ 182 board_info_init(); 183 184 /* 185 * Now that we have VM, malloc()s are OK in bus_space. 186 */ 187 bus_space_mallocok(); 188 fake_mapiodev = 0; 189 } 190 191 static void 192 dumpsys(void) 193 { 194 195 printf("dumpsys: TBD\n"); 196 } 197 198 /* 199 * Halt or reboot the machine after syncing/dumping according to howto. 200 */ 201 void 202 cpu_reboot(int howto, char *what) 203 { 204 static int syncing; 205 static char str[256]; 206 char *ap = str, *ap1 = ap; 207 208 boothowto = howto; 209 if (!cold && !(howto & RB_NOSYNC) && !syncing) { 210 syncing = 1; 211 vfs_shutdown(); /* sync */ 212 resettodr(); /* set wall clock */ 213 } 214 215 splhigh(); 216 217 if (!cold && (howto & RB_DUMP)) 218 dumpsys(); 219 220 doshutdownhooks(); 221 222 pmf_system_shutdown(boothowto); 223 224 if ((howto & RB_POWERDOWN) == RB_POWERDOWN) { 225 /* Power off here if we know how...*/ 226 } 227 228 if (howto & RB_HALT) { 229 printf("halted\n\n"); 230 231 goto reboot; /* XXX for now... */ 232 233 #ifdef DDB 234 printf("dropping to debugger\n"); 235 while(1) 236 Debugger(); 237 #endif 238 } 239 240 printf("rebooting\n\n"); 241 if (what && *what) { 242 if (strlen(what) > sizeof str - 5) 243 printf("boot string too large, ignored\n"); 244 else { 245 strcpy(str, what); 246 ap1 = ap = str + strlen(str); 247 *ap++ = ' '; 248 } 249 } 250 *ap++ = '-'; 251 if (howto & RB_SINGLE) 252 *ap++ = 's'; 253 if (howto & RB_KDB) 254 *ap++ = 'd'; 255 *ap++ = 0; 256 if (ap[-2] == '-') 257 *ap1 = 0; 258 259 /* flush cache for msgbuf */ 260 dcache_wb(msgbuf_paddr, round_page(MSGBUFSIZE)); 261 262 reboot: 263 __asm volatile("msync; isync"); 264 (*cpu_md_ops.md_cpu_reset)(); 265 266 printf("%s: md_cpu_reset() failed!\n", __func__); 267 #ifdef DDB 268 for (;;) 269 Debugger(); 270 #else 271 for (;;) 272 /* nothing */; 273 #endif 274 } 275 276 /* 277 * mapiodev: 278 * 279 * Allocate vm space and mapin the I/O address. Use reserved TLB 280 * mapping if one is found. 281 */ 282 void * 283 mapiodev(paddr_t pa, psize_t len) 284 { 285 const vsize_t off = pa & PAGE_MASK; 286 287 /* 288 * See if we have reserved TLB entry for the pa. This needs to be 289 * true for console as we can't use uvm during early bootstrap. 290 */ 291 void * const p = tlb_mapiodev(pa, len); 292 if (p != NULL) 293 return p; 294 295 if (fake_mapiodev) 296 panic("mapiodev: no TLB entry reserved for %llx+%llx", 297 (long long)pa, (long long)len); 298 299 pa = trunc_page(pa); 300 len = round_page(off + len); 301 vaddr_t va = uvm_km_alloc(kernel_map, len, 0, UVM_KMF_VAONLY); 302 303 if (va == 0) 304 return NULL; 305 306 for (va += len, pa += len; len > 0; len -= PAGE_SIZE) { 307 va -= PAGE_SIZE; 308 pa -= PAGE_SIZE; 309 pmap_kenter_pa(va, pa, VM_PROT_READ|VM_PROT_WRITE, 310 PMAP_NOCACHE); 311 } 312 pmap_update(pmap_kernel()); 313 return (void *)(va + off); 314 } 315 316 void 317 unmapiodev(vaddr_t va, vsize_t len) 318 { 319 /* Nothing to do for reserved (ie. not uvm_km_alloc'd) mappings. */ 320 if (va < VM_MIN_KERNEL_ADDRESS || va > VM_MAX_KERNEL_ADDRESS) { 321 tlb_unmapiodev(va, len); 322 return; 323 } 324 325 len = round_page((va & PAGE_MASK) + len); 326 va = trunc_page(va); 327 328 pmap_kremove(va, len); 329 uvm_km_free(kernel_map, va, len, UVM_KMF_VAONLY); 330 } 331 332 void 333 cpu_evcnt_attach(struct cpu_info *ci) 334 { 335 struct cpu_softc * const cpu = ci->ci_softc; 336 const char * const xname = device_xname(ci->ci_dev); 337 338 evcnt_attach_dynamic_nozero(&ci->ci_ev_clock, EVCNT_TYPE_INTR, 339 NULL, xname, "clock"); 340 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_late_clock, EVCNT_TYPE_INTR, 341 NULL, xname, "late clock"); 342 evcnt_attach_dynamic_nozero(&cpu->cpu_ev_exec_trap_sync, EVCNT_TYPE_TRAP, 343 NULL, xname, "exec pages synced (trap)"); 344 #ifndef __HAVE_FAST_SOFTINTS 345 evcnt_attach_dynamic_nozero(&ci->ci_ev_softclock, EVCNT_TYPE_INTR, 346 NULL, xname, "soft clock"); 347 evcnt_attach_dynamic_nozero(&ci->ci_ev_softnet, EVCNT_TYPE_INTR, 348 NULL, xname, "soft net"); 349 evcnt_attach_dynamic_nozero(&ci->ci_ev_softserial, EVCNT_TYPE_INTR, 350 NULL, xname, "soft serial"); 351 #endif 352 evcnt_attach_dynamic_nozero(&ci->ci_ev_traps, EVCNT_TYPE_TRAP, 353 NULL, xname, "traps"); 354 evcnt_attach_dynamic_nozero(&ci->ci_ev_kdsi, EVCNT_TYPE_TRAP, 355 &ci->ci_ev_traps, xname, "kernel DSI traps"); 356 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi, EVCNT_TYPE_TRAP, 357 &ci->ci_ev_traps, xname, "user DSI traps"); 358 evcnt_attach_dynamic_nozero(&ci->ci_ev_udsi_fatal, EVCNT_TYPE_TRAP, 359 &ci->ci_ev_udsi, xname, "user DSI failures"); 360 evcnt_attach_dynamic_nozero(&ci->ci_ev_kisi, EVCNT_TYPE_TRAP, 361 &ci->ci_ev_traps, xname, "kernel ISI traps"); 362 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi, EVCNT_TYPE_TRAP, 363 &ci->ci_ev_traps, xname, "user ISI traps"); 364 evcnt_attach_dynamic_nozero(&ci->ci_ev_isi_fatal, EVCNT_TYPE_TRAP, 365 &ci->ci_ev_isi, xname, "user ISI failures"); 366 evcnt_attach_dynamic_nozero(&ci->ci_ev_scalls, EVCNT_TYPE_TRAP, 367 &ci->ci_ev_traps, xname, "system call traps"); 368 evcnt_attach_dynamic_nozero(&ci->ci_ev_pgm, EVCNT_TYPE_TRAP, 369 &ci->ci_ev_traps, xname, "PGM traps"); 370 evcnt_attach_dynamic_nozero(&ci->ci_ev_debug, EVCNT_TYPE_TRAP, 371 &ci->ci_ev_traps, xname, "debug traps"); 372 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpu, EVCNT_TYPE_TRAP, 373 &ci->ci_ev_traps, xname, "FPU unavailable traps"); 374 evcnt_attach_dynamic_nozero(&ci->ci_ev_fpusw, EVCNT_TYPE_MISC, 375 &ci->ci_ev_fpu, xname, "FPU context switches"); 376 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali, EVCNT_TYPE_TRAP, 377 &ci->ci_ev_traps, xname, "user alignment traps"); 378 evcnt_attach_dynamic_nozero(&ci->ci_ev_ali_fatal, EVCNT_TYPE_TRAP, 379 &ci->ci_ev_ali, xname, "user alignment traps"); 380 evcnt_attach_dynamic_nozero(&ci->ci_ev_umchk, EVCNT_TYPE_TRAP, 381 &ci->ci_ev_umchk, xname, "user MCHK failures"); 382 evcnt_attach_dynamic_nozero(&ci->ci_ev_vec, EVCNT_TYPE_TRAP, 383 &ci->ci_ev_traps, xname, "SPE unavailable"); 384 evcnt_attach_dynamic_nozero(&ci->ci_ev_vecsw, EVCNT_TYPE_MISC, 385 &ci->ci_ev_vec, xname, "SPE context switches"); 386 evcnt_attach_dynamic_nozero(&ci->ci_ev_ipi, EVCNT_TYPE_INTR, 387 NULL, xname, "IPIs"); 388 evcnt_attach_dynamic_nozero(&ci->ci_ev_tlbmiss_soft, EVCNT_TYPE_TRAP, 389 &ci->ci_ev_traps, xname, "soft tlb misses"); 390 evcnt_attach_dynamic_nozero(&ci->ci_ev_dtlbmiss_hard, EVCNT_TYPE_TRAP, 391 &ci->ci_ev_traps, xname, "data tlb misses"); 392 evcnt_attach_dynamic_nozero(&ci->ci_ev_itlbmiss_hard, EVCNT_TYPE_TRAP, 393 &ci->ci_ev_traps, xname, "inst tlb misses"); 394 } 395 396 uint32_t 397 cpu_read_4(bus_addr_t a) 398 { 399 struct cpu_softc * const cpu = curcpu()->ci_softc; 400 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a); 401 return bus_space_read_4(cpu->cpu_bst, cpu->cpu_bsh, a); 402 } 403 404 uint8_t 405 cpu_read_1(bus_addr_t a) 406 { 407 struct cpu_softc * const cpu = curcpu()->ci_softc; 408 // printf(" %s(%p, %x, %x)", __func__, cpu->cpu_bst, cpu->cpu_bsh, a); 409 return bus_space_read_1(cpu->cpu_bst, cpu->cpu_bsh, a); 410 } 411 412 void 413 cpu_write_4(bus_addr_t a, uint32_t v) 414 { 415 struct cpu_softc * const cpu = curcpu()->ci_softc; 416 bus_space_write_4(cpu->cpu_bst, cpu->cpu_bsh, a, v); 417 } 418 419 void 420 cpu_write_1(bus_addr_t a, uint8_t v) 421 { 422 struct cpu_softc * const cpu = curcpu()->ci_softc; 423 bus_space_write_1(cpu->cpu_bst, cpu->cpu_bsh, a, v); 424 } 425 426 void 427 booke_sstep(struct trapframe *tf) 428 { 429 KASSERT(tf->tf_srr1 & PSL_DE); 430 const uint32_t insn = ufetch_32((const void *)tf->tf_srr0); 431 register_t dbcr0 = DBCR0_IAC1 | DBCR0_IDM; 432 register_t dbcr1 = DBCR1_IAC1US_USER | DBCR1_IAC1ER_DS1; 433 if ((insn >> 28) == 4) { 434 uint32_t iac2 = 0; 435 if ((insn >> 26) == 0x12) { 436 const int32_t off = (((int32_t)insn << 6) >> 6) & ~3; 437 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off; 438 dbcr0 |= DBCR0_IAC2; 439 } else if ((insn >> 26) == 0x10) { 440 const int16_t off = insn & ~3; 441 iac2 = ((insn & 2) ? 0 : tf->tf_srr0) + off; 442 dbcr0 |= DBCR0_IAC2; 443 } else if ((insn & 0xfc00ffde) == 0x4c000420) { 444 iac2 = tf->tf_ctr; 445 dbcr0 |= DBCR0_IAC2; 446 } else if ((insn & 0xfc00ffde) == 0x4c000020) { 447 iac2 = tf->tf_lr; 448 dbcr0 |= DBCR0_IAC2; 449 } 450 if (dbcr0 & DBCR0_IAC2) { 451 dbcr1 |= DBCR1_IAC2US_USER | DBCR1_IAC2ER_DS1; 452 mtspr(SPR_IAC2, iac2); 453 } 454 } 455 mtspr(SPR_IAC1, tf->tf_srr0 + 4); 456 mtspr(SPR_DBCR1, dbcr1); 457 mtspr(SPR_DBCR0, dbcr0); 458 } 459
Indexes created Mon Sep 29 21:09:56 GMT 2025