booke_pmap.c revision 1.39 1 1.39 skrll /* $NetBSD: booke_pmap.c,v 1.39 2024/09/24 07:29:55 skrll Exp $ */
2 1.2 matt /*-
3 1.2 matt * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
4 1.2 matt * All rights reserved.
5 1.2 matt *
6 1.2 matt * This code is derived from software contributed to The NetBSD Foundation
7 1.2 matt * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects
8 1.2 matt * Agency and which was developed by Matt Thomas of 3am Software Foundry.
9 1.2 matt *
10 1.2 matt * This material is based upon work supported by the Defense Advanced Research
11 1.2 matt * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under
12 1.2 matt * Contract No. N66001-09-C-2073.
13 1.2 matt * Approved for Public Release, Distribution Unlimited
14 1.2 matt *
15 1.2 matt * Redistribution and use in source and binary forms, with or without
16 1.2 matt * modification, are permitted provided that the following conditions
17 1.2 matt * are met:
18 1.2 matt * 1. Redistributions of source code must retain the above copyright
19 1.2 matt * notice, this list of conditions and the following disclaimer.
20 1.2 matt * 2. Redistributions in binary form must reproduce the above copyright
21 1.2 matt * notice, this list of conditions and the following disclaimer in the
22 1.2 matt * documentation and/or other materials provided with the distribution.
23 1.2 matt *
24 1.2 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 1.2 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 1.2 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 1.2 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 1.2 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 1.2 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 1.2 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 1.2 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 1.2 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 1.2 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 1.2 matt * POSSIBILITY OF SUCH DAMAGE.
35 1.2 matt */
36 1.2 matt
37 1.4 matt #define __PMAP_PRIVATE
38 1.3 matt
39 1.2 matt #include <sys/cdefs.h>
40 1.39 skrll __KERNEL_RCSID(0, "$NetBSD: booke_pmap.c,v 1.39 2024/09/24 07:29:55 skrll Exp $");
41 1.2 matt
42 1.29 rin #ifdef _KERNEL_OPT
43 1.29 rin #include "opt_multiprocessor.h"
44 1.29 rin #include "opt_pmap.h"
45 1.29 rin #endif
46 1.29 rin
47 1.2 matt #include <sys/param.h>
48 1.2 matt #include <sys/kcore.h>
49 1.2 matt #include <sys/buf.h>
50 1.22 nonaka #include <sys/mutex.h>
51 1.2 matt
52 1.6 matt #include <uvm/uvm.h>
53 1.2 matt
54 1.2 matt #include <machine/pmap.h>
55 1.2 matt
56 1.24 matt PMAP_COUNTER(zeroed_pages, "pages zeroed");
57 1.24 matt PMAP_COUNTER(copied_pages, "pages copied");
58 1.2 matt
59 1.15 matt CTASSERT(sizeof(pmap_segtab_t) == NBPG);
60 1.2 matt
61 1.2 matt void
62 1.2 matt pmap_procwr(struct proc *p, vaddr_t va, size_t len)
63 1.2 matt {
64 1.2 matt struct pmap * const pmap = p->p_vmspace->vm_map.pmap;
65 1.31 rin vsize_t off = va & PAGE_MASK;
66 1.2 matt
67 1.2 matt kpreempt_disable();
68 1.2 matt for (const vaddr_t eva = va + len; va < eva; off = 0) {
69 1.26 riastrad const vaddr_t segeva = uimin(va + len, va - off + PAGE_SIZE);
70 1.2 matt pt_entry_t * const ptep = pmap_pte_lookup(pmap, va);
71 1.2 matt if (ptep == NULL) {
72 1.2 matt va = segeva;
73 1.2 matt continue;
74 1.2 matt }
75 1.2 matt pt_entry_t pt_entry = *ptep;
76 1.2 matt if (!pte_valid_p(pt_entry) || !pte_exec_p(pt_entry)) {
77 1.2 matt va = segeva;
78 1.2 matt continue;
79 1.2 matt }
80 1.2 matt kpreempt_enable();
81 1.31 rin dcache_wb(pte_to_paddr(pt_entry) + off, segeva - va);
82 1.31 rin icache_inv(pte_to_paddr(pt_entry) + off, segeva - va);
83 1.2 matt kpreempt_disable();
84 1.2 matt va = segeva;
85 1.2 matt }
86 1.2 matt kpreempt_enable();
87 1.2 matt }
88 1.2 matt
89 1.2 matt void
90 1.30 skrll pmap_md_page_syncicache(struct vm_page_md *mdpg, const kcpuset_t *onproc)
91 1.2 matt {
92 1.30 skrll KASSERT(VM_PAGEMD_VMPAGE_P(mdpg));
93 1.30 skrll
94 1.30 skrll struct vm_page * const pg = VM_MD_TO_PAGE(mdpg);
95 1.30 skrll
96 1.4 matt /*
97 1.4 matt * If onproc is empty, we could do a
98 1.4 matt * pmap_page_protect(pg, VM_PROT_NONE) and remove all
99 1.4 matt * mappings of the page and clear its execness. Then
100 1.4 matt * the next time page is faulted, it will get icache
101 1.4 matt * synched. But this is easier. :)
102 1.4 matt */
103 1.36 skrll const paddr_t pa = VM_PAGE_TO_PHYS(pg);
104 1.2 matt dcache_wb_page(pa);
105 1.2 matt icache_inv_page(pa);
106 1.2 matt }
107 1.2 matt
108 1.2 matt vaddr_t
109 1.2 matt pmap_md_direct_map_paddr(paddr_t pa)
110 1.2 matt {
111 1.2 matt return (vaddr_t) pa;
112 1.2 matt }
113 1.2 matt
114 1.2 matt bool
115 1.2 matt pmap_md_direct_mapped_vaddr_p(vaddr_t va)
116 1.2 matt {
117 1.2 matt return va < VM_MIN_KERNEL_ADDRESS || VM_MAX_KERNEL_ADDRESS <= va;
118 1.2 matt }
119 1.2 matt
120 1.2 matt paddr_t
121 1.2 matt pmap_md_direct_mapped_vaddr_to_paddr(vaddr_t va)
122 1.2 matt {
123 1.2 matt return (paddr_t) va;
124 1.2 matt }
125 1.2 matt
126 1.13 matt #ifdef PMAP_MINIMALTLB
127 1.13 matt static pt_entry_t *
128 1.39 skrll pmap_kvtopte(const pmap_segtab_t *stb, vaddr_t va)
129 1.13 matt {
130 1.39 skrll const vaddr_t segtab_mask = PMAP_SEGTABSIZE - 1;
131 1.39 skrll const size_t idx = (va >> SEGSHIFT) & segtab_mask;
132 1.39 skrll pmap_ptpage_t * const ppg = stb->seg_ppg[idx];
133 1.39 skrll if (ppg == NULL)
134 1.13 matt return NULL;
135 1.39 skrll const size_t pte_idx = (va >> PGSHIFT) & (NPTEPG - 1);
136 1.39 skrll
137 1.39 skrll return &ppg->ppg_ptes[pte_idx];
138 1.13 matt }
139 1.13 matt
140 1.13 matt vaddr_t
141 1.13 matt pmap_kvptefill(vaddr_t sva, vaddr_t eva, pt_entry_t pt_entry)
142 1.13 matt {
143 1.35 skrll pmap_segtab_t * const stb = &pmap_kern_segtab;
144 1.13 matt KASSERT(sva == trunc_page(sva));
145 1.39 skrll pt_entry_t *ptep = pmap_kvtopte(stb, sva);
146 1.13 matt for (; sva < eva; sva += NBPG) {
147 1.13 matt *ptep++ = pt_entry ? (sva | pt_entry) : 0;
148 1.13 matt }
149 1.13 matt return sva;
150 1.13 matt }
151 1.13 matt #endif
152 1.13 matt
153 1.2 matt /*
154 1.2 matt * Bootstrap the system enough to run with virtual memory.
155 1.2 matt * firstaddr is the first unused kseg0 address (not page aligned).
156 1.2 matt */
157 1.13 matt vaddr_t
158 1.2 matt pmap_bootstrap(vaddr_t startkernel, vaddr_t endkernel,
159 1.13 matt phys_ram_seg_t *avail, size_t cnt)
160 1.2 matt {
161 1.39 skrll pmap_segtab_t * const stb = &pmap_kern_segtab;
162 1.2 matt
163 1.13 matt KASSERT(endkernel == trunc_page(endkernel));
164 1.2 matt
165 1.27 thorpej /* common initialization */
166 1.27 thorpej pmap_bootstrap_common();
167 1.27 thorpej
168 1.19 nonaka /* init the lock */
169 1.19 nonaka pmap_tlb_info_init(&pmap_tlb0_info);
170 1.19 nonaka
171 1.2 matt /*
172 1.12 para * Compute the number of pages kmem_arena will have.
173 1.12 para */
174 1.12 para kmeminit_nkmempages();
175 1.12 para
176 1.12 para /*
177 1.2 matt * Figure out how many PTE's are necessary to map the kernel.
178 1.2 matt * We also reserve space for kmem_alloc_pageable() for vm_fork().
179 1.2 matt */
180 1.2 matt
181 1.2 matt /* Get size of buffer cache and set an upper limit */
182 1.2 matt buf_setvalimit((VM_MAX_KERNEL_ADDRESS - VM_MIN_KERNEL_ADDRESS) / 8);
183 1.2 matt vsize_t bufsz = buf_memcalc();
184 1.2 matt buf_setvalimit(bufsz);
185 1.2 matt
186 1.13 matt vsize_t kv_nsegtabs = pmap_round_seg(VM_PHYS_SIZE
187 1.2 matt + (ubc_nwins << ubc_winshift)
188 1.2 matt + bufsz
189 1.2 matt + 16 * NCARGS
190 1.2 matt + pager_map_size
191 1.2 matt + maxproc * USPACE
192 1.13 matt + NBPG * nkmempages) >> SEGSHIFT;
193 1.2 matt
194 1.2 matt /*
195 1.2 matt * Initialize `FYI' variables. Note we're relying on
196 1.2 matt * the fact that BSEARCH sorts the vm_physmem[] array
197 1.2 matt * for us. Must do this before uvm_pageboot_alloc()
198 1.2 matt * can be called.
199 1.2 matt */
200 1.25 cherry pmap_limits.avail_start = uvm_physseg_get_start(uvm_physseg_get_first()) << PGSHIFT;
201 1.25 cherry pmap_limits.avail_end = uvm_physseg_get_end(uvm_physseg_get_last()) << PGSHIFT;
202 1.13 matt const size_t max_nsegtabs =
203 1.2 matt (pmap_round_seg(VM_MAX_KERNEL_ADDRESS)
204 1.2 matt - pmap_trunc_seg(VM_MIN_KERNEL_ADDRESS)) / NBSEG;
205 1.13 matt if (kv_nsegtabs >= max_nsegtabs) {
206 1.2 matt pmap_limits.virtual_end = VM_MAX_KERNEL_ADDRESS;
207 1.13 matt kv_nsegtabs = max_nsegtabs;
208 1.2 matt } else {
209 1.2 matt pmap_limits.virtual_end = VM_MIN_KERNEL_ADDRESS
210 1.13 matt + kv_nsegtabs * NBSEG;
211 1.2 matt }
212 1.2 matt
213 1.32 skrll /* update the top of the kernel VM - pmap_growkernel not required */
214 1.32 skrll pmap_curmaxkvaddr = pmap_limits.virtual_end;
215 1.32 skrll
216 1.2 matt /*
217 1.2 matt * Now actually allocate the kernel PTE array (must be done
218 1.2 matt * after virtual_end is initialized).
219 1.2 matt */
220 1.13 matt const vaddr_t kv_segtabs = avail[0].start;
221 1.13 matt KASSERT(kv_segtabs == endkernel);
222 1.13 matt KASSERT(avail[0].size >= NBPG * kv_nsegtabs);
223 1.13 matt printf(" kv_nsegtabs=%#"PRIxVSIZE, kv_nsegtabs);
224 1.13 matt printf(" kv_segtabs=%#"PRIxVADDR, kv_segtabs);
225 1.13 matt avail[0].start += NBPG * kv_nsegtabs;
226 1.13 matt avail[0].size -= NBPG * kv_nsegtabs;
227 1.13 matt endkernel += NBPG * kv_nsegtabs;
228 1.2 matt
229 1.2 matt /*
230 1.2 matt * Initialize the kernel's two-level page level. This only wastes
231 1.2 matt * an extra page for the segment table and allows the user/kernel
232 1.2 matt * access to be common.
233 1.2 matt */
234 1.36 skrll
235 1.39 skrll pmap_ptpage_t **ppg_p = &stb->seg_ppg[VM_MIN_KERNEL_ADDRESS >> SEGSHIFT];
236 1.36 skrll pmap_ptpage_t *ppg = (void *)kv_segtabs;
237 1.36 skrll memset(ppg, 0, NBPG * kv_nsegtabs);
238 1.36 skrll for (size_t i = 0; i < kv_nsegtabs; i++, ppg++) {
239 1.36 skrll *ppg_p++ = ppg;
240 1.2 matt }
241 1.2 matt
242 1.39 skrll #ifdef PMAP_MINIMALTLB
243 1.13 matt const vsize_t dm_nsegtabs = (physmem + NPTEPG - 1) / NPTEPG;
244 1.13 matt const vaddr_t dm_segtabs = avail[0].start;
245 1.13 matt printf(" dm_nsegtabs=%#"PRIxVSIZE, dm_nsegtabs);
246 1.13 matt printf(" dm_segtabs=%#"PRIxVADDR, dm_segtabs);
247 1.13 matt KASSERT(dm_segtabs == endkernel);
248 1.13 matt KASSERT(avail[0].size >= NBPG * dm_nsegtabs);
249 1.13 matt avail[0].start += NBPG * dm_nsegtabs;
250 1.13 matt avail[0].size -= NBPG * dm_nsegtabs;
251 1.13 matt endkernel += NBPG * dm_nsegtabs;
252 1.13 matt
253 1.39 skrll ppg_p = stb->seg_ppg;
254 1.36 skrll ppg = (void *)dm_segtabs;
255 1.36 skrll memset(ppg, 0, NBPG * dm_nsegtabs);
256 1.39 skrll for (size_t i = 0; i < dm_nsegtabs; i++, ppg_p++, ppg++) {
257 1.39 skrll *ppg_p = ppg;
258 1.2 matt }
259 1.2 matt
260 1.2 matt /*
261 1.2 matt */
262 1.13 matt extern uint32_t _fdata[], _etext[];
263 1.13 matt vaddr_t va;
264 1.13 matt
265 1.13 matt /* Now make everything before the kernel inaccessible. */
266 1.13 matt va = pmap_kvptefill(NBPG, startkernel, 0);
267 1.13 matt
268 1.13 matt /* Kernel text is readonly & executable */
269 1.13 matt va = pmap_kvptefill(va, round_page((vaddr_t)_etext),
270 1.13 matt PTE_M | PTE_xR | PTE_xX);
271 1.13 matt
272 1.13 matt /* Kernel .rdata is readonly */
273 1.13 matt va = pmap_kvptefill(va, trunc_page((vaddr_t)_fdata), PTE_M | PTE_xR);
274 1.13 matt
275 1.13 matt /* Kernel .data/.bss + page tables are read-write */
276 1.13 matt va = pmap_kvptefill(va, round_page(endkernel), PTE_M | PTE_xR | PTE_xW);
277 1.13 matt
278 1.13 matt /* message buffer page table pages are read-write */
279 1.13 matt (void) pmap_kvptefill(msgbuf_paddr, msgbuf_paddr+round_page(MSGBUFSIZE),
280 1.13 matt PTE_M | PTE_xR | PTE_xW);
281 1.13 matt #endif
282 1.13 matt
283 1.13 matt for (size_t i = 0; i < cnt; i++) {
284 1.13 matt printf(" uvm_page_physload(%#lx,%#lx,%#lx,%#lx,%d)",
285 1.13 matt atop(avail[i].start),
286 1.13 matt atop(avail[i].start + avail[i].size) - 1,
287 1.13 matt atop(avail[i].start),
288 1.13 matt atop(avail[i].start + avail[i].size) - 1,
289 1.13 matt VM_FREELIST_DEFAULT);
290 1.13 matt uvm_page_physload(
291 1.13 matt atop(avail[i].start),
292 1.13 matt atop(avail[i].start + avail[i].size) - 1,
293 1.13 matt atop(avail[i].start),
294 1.13 matt atop(avail[i].start + avail[i].size) - 1,
295 1.13 matt VM_FREELIST_DEFAULT);
296 1.2 matt }
297 1.13 matt
298 1.13 matt pmap_pvlist_lock_init(curcpu()->ci_ci.dcache_line_size);
299 1.2 matt
300 1.2 matt /*
301 1.2 matt * Initialize the pools.
302 1.2 matt */
303 1.2 matt pool_init(&pmap_pmap_pool, PMAP_SIZE, 0, 0, 0, "pmappl",
304 1.2 matt &pool_allocator_nointr, IPL_NONE);
305 1.2 matt pool_init(&pmap_pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pvpl",
306 1.2 matt &pmap_pv_page_allocator, IPL_NONE);
307 1.2 matt
308 1.34 skrll tlb_set_asid(KERNEL_PID, pmap_kernel());
309 1.13 matt
310 1.13 matt return endkernel;
311 1.2 matt }
312 1.2 matt
313 1.2 matt struct vm_page *
314 1.2 matt pmap_md_alloc_poolpage(int flags)
315 1.2 matt {
316 1.36 skrll
317 1.2 matt /*
318 1.2 matt * Any managed page works for us.
319 1.2 matt */
320 1.2 matt return uvm_pagealloc(NULL, 0, NULL, flags);
321 1.2 matt }
322 1.2 matt
323 1.13 matt vaddr_t
324 1.13 matt pmap_md_map_poolpage(paddr_t pa, vsize_t size)
325 1.13 matt {
326 1.13 matt const vaddr_t sva = (vaddr_t) pa;
327 1.13 matt #ifdef PMAP_MINIMALTLB
328 1.13 matt const vaddr_t eva = sva + size;
329 1.13 matt pmap_kvptefill(sva, eva, PTE_M | PTE_xR | PTE_xW);
330 1.13 matt #endif
331 1.13 matt return sva;
332 1.13 matt }
333 1.13 matt
334 1.13 matt void
335 1.13 matt pmap_md_unmap_poolpage(vaddr_t va, vsize_t size)
336 1.13 matt {
337 1.13 matt #ifdef PMAP_MINIMALTLB
338 1.13 matt struct pmap * const pm = pmap_kernel();
339 1.13 matt const vaddr_t eva = va + size;
340 1.13 matt pmap_kvptefill(va, eva, 0);
341 1.13 matt for (;va < eva; va += NBPG) {
342 1.13 matt pmap_tlb_invalidate_addr(pm, va);
343 1.13 matt }
344 1.13 matt pmap_update(pm);
345 1.13 matt #endif
346 1.13 matt }
347 1.13 matt
348 1.2 matt void
349 1.2 matt pmap_zero_page(paddr_t pa)
350 1.2 matt {
351 1.24 matt PMAP_COUNT(zeroed_pages);
352 1.13 matt vaddr_t va = pmap_md_map_poolpage(pa, NBPG);
353 1.13 matt dcache_zero_page(va);
354 1.5 matt
355 1.13 matt KASSERT(!VM_PAGEMD_EXECPAGE_P(VM_PAGE_TO_MD(PHYS_TO_VM_PAGE(va))));
356 1.13 matt pmap_md_unmap_poolpage(va, NBPG);
357 1.2 matt }
358 1.2 matt
359 1.2 matt void
360 1.2 matt pmap_copy_page(paddr_t src, paddr_t dst)
361 1.2 matt {
362 1.2 matt const size_t line_size = curcpu()->ci_ci.dcache_line_size;
363 1.13 matt vaddr_t src_va = pmap_md_map_poolpage(src, NBPG);
364 1.13 matt vaddr_t dst_va = pmap_md_map_poolpage(dst, NBPG);
365 1.13 matt const vaddr_t end = src_va + PAGE_SIZE;
366 1.2 matt
367 1.24 matt PMAP_COUNT(copied_pages);
368 1.24 matt
369 1.13 matt while (src_va < end) {
370 1.20 nonaka __asm __volatile(
371 1.20 nonaka "dcbt %2,%0" "\n\t" /* touch next src cacheline */
372 1.2 matt "dcba 0,%1" "\n\t" /* don't fetch dst cacheline */
373 1.13 matt :: "b"(src_va), "b"(dst_va), "b"(line_size));
374 1.2 matt for (u_int i = 0;
375 1.2 matt i < line_size;
376 1.13 matt src_va += 32, dst_va += 32, i += 32) {
377 1.16 matt register_t tmp;
378 1.16 matt __asm __volatile(
379 1.16 matt "mr %[tmp],31" "\n\t"
380 1.16 matt "lmw 24,0(%[src])" "\n\t"
381 1.16 matt "stmw 24,0(%[dst])" "\n\t"
382 1.16 matt "mr 31,%[tmp]" "\n\t"
383 1.16 matt : [tmp] "=&r"(tmp)
384 1.16 matt : [src] "b"(src_va), [dst] "b"(dst_va)
385 1.2 matt : "r24", "r25", "r26", "r27",
386 1.16 matt "r28", "r29", "r30", "memory");
387 1.2 matt }
388 1.2 matt }
389 1.13 matt pmap_md_unmap_poolpage(src_va, NBPG);
390 1.13 matt pmap_md_unmap_poolpage(dst_va, NBPG);
391 1.5 matt
392 1.13 matt KASSERT(!VM_PAGEMD_EXECPAGE_P(VM_PAGE_TO_MD(PHYS_TO_VM_PAGE(dst))));
393 1.2 matt }
394 1.2 matt
395 1.2 matt void
396 1.2 matt pmap_md_init(void)
397 1.2 matt {
398 1.2 matt
399 1.2 matt /* nothing for now */
400 1.2 matt }
401 1.2 matt
402 1.2 matt bool
403 1.2 matt pmap_md_io_vaddr_p(vaddr_t va)
404 1.2 matt {
405 1.2 matt return va >= pmap_limits.avail_end
406 1.2 matt && !(VM_MIN_KERNEL_ADDRESS <= va && va < VM_MAX_KERNEL_ADDRESS);
407 1.2 matt }
408 1.2 matt
409 1.7 matt bool
410 1.7 matt pmap_md_tlb_check_entry(void *ctx, vaddr_t va, tlb_asid_t asid, pt_entry_t pte)
411 1.7 matt {
412 1.7 matt pmap_t pm = ctx;
413 1.37 skrll struct pmap_asid_info * const pai = PMAP_PAI(pm, curcpu()->ci_tlb_info);
414 1.7 matt
415 1.7 matt if (asid != pai->pai_asid)
416 1.7 matt return true;
417 1.7 matt
418 1.7 matt const pt_entry_t * const ptep = pmap_pte_lookup(pm, va);
419 1.7 matt KASSERT(ptep != NULL);
420 1.7 matt pt_entry_t xpte = *ptep;
421 1.7 matt xpte &= ~((xpte & (PTE_UNSYNCED|PTE_UNMODIFIED)) << 1);
422 1.7 matt xpte ^= xpte & (PTE_UNSYNCED|PTE_UNMODIFIED|PTE_WIRED);
423 1.7 matt
424 1.7 matt KASSERTMSG(pte == xpte,
425 1.10 jym "pm=%p va=%#"PRIxVADDR" asid=%u: TLB pte (%#x) != real pte (%#x/%#x)",
426 1.10 jym pm, va, asid, pte, xpte, *ptep);
427 1.7 matt
428 1.7 matt return true;
429 1.7 matt }
430 1.8 matt
431 1.8 matt #ifdef MULTIPROCESSOR
432 1.8 matt void
433 1.8 matt pmap_md_tlb_info_attach(struct pmap_tlb_info *ti, struct cpu_info *ci)
434 1.8 matt {
435 1.8 matt /* nothing */
436 1.8 matt }
437 1.8 matt #endif /* MULTIPROCESSOR */
438