pq3ehci.c revision 1.1.2.2 1 1.1.2.2 matt /* $NetBSD: pq3ehci.c,v 1.1.2.2 2011/08/02 01:34:36 matt Exp $ */
2 1.1.2.1 matt /*-
3 1.1.2.1 matt * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
4 1.1.2.1 matt * All rights reserved.
5 1.1.2.1 matt *
6 1.1.2.1 matt * This code is derived from software contributed to The NetBSD Foundation
7 1.1.2.1 matt * by Matt Thomas of 3am Software Foundry.
8 1.1.2.1 matt *
9 1.1.2.1 matt * Redistribution and use in source and binary forms, with or without
10 1.1.2.1 matt * modification, are permitted provided that the following conditions
11 1.1.2.1 matt * are met:
12 1.1.2.1 matt * 1. Redistributions of source code must retain the above copyright
13 1.1.2.1 matt * notice, this list of conditions and the following disclaimer.
14 1.1.2.1 matt * 2. Redistributions in binary form must reproduce the above copyright
15 1.1.2.1 matt * notice, this list of conditions and the following disclaimer in the
16 1.1.2.1 matt * documentation and/or other materials provided with the distribution.
17 1.1.2.1 matt *
18 1.1.2.1 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
19 1.1.2.1 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
20 1.1.2.1 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
21 1.1.2.1 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
22 1.1.2.1 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
23 1.1.2.1 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
24 1.1.2.1 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
25 1.1.2.1 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
26 1.1.2.1 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
27 1.1.2.1 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
28 1.1.2.1 matt * POSSIBILITY OF SUCH DAMAGE.
29 1.1.2.1 matt */
30 1.1.2.1 matt
31 1.1.2.1 matt #include <sys/cdefs.h>
32 1.1.2.2 matt __KERNEL_RCSID(0, "$NetBSD: pq3ehci.c,v 1.1.2.2 2011/08/02 01:34:36 matt Exp $");
33 1.1.2.2 matt
34 1.1.2.2 matt #include "opt_usb.h"
35 1.1.2.1 matt
36 1.1.2.1 matt #include <sys/param.h>
37 1.1.2.1 matt #include <sys/systm.h>
38 1.1.2.1 matt #include <sys/device.h>
39 1.1.2.1 matt #include <sys/kernel.h>
40 1.1.2.1 matt #include <sys/proc.h>
41 1.1.2.1 matt #include <sys/queue.h>
42 1.1.2.1 matt
43 1.1.2.1 matt #include <sys/bus.h>
44 1.1.2.1 matt
45 1.1.2.1 matt #include <powerpc/booke/cpuvar.h>
46 1.1.2.1 matt #include <powerpc/booke/e500var.h>
47 1.1.2.1 matt #include <powerpc/booke/e500reg.h>
48 1.1.2.1 matt
49 1.1.2.1 matt #include <dev/usb/usb.h>
50 1.1.2.1 matt #include <dev/usb/usbdi.h>
51 1.1.2.1 matt #include <dev/usb/usbdivar.h>
52 1.1.2.1 matt #include <dev/usb/usb_mem.h>
53 1.1.2.1 matt
54 1.1.2.1 matt #include <dev/usb/ehcireg.h>
55 1.1.2.1 matt #include <dev/usb/ehcivar.h>
56 1.1.2.1 matt
57 1.1.2.1 matt #ifdef EHCI_DEBUG
58 1.1.2.1 matt #define DPRINTF(x) if (ehcidebug) printf x
59 1.1.2.1 matt extern int ehcidebug;
60 1.1.2.1 matt #else
61 1.1.2.1 matt #define DPRINTF(x)
62 1.1.2.1 matt #endif
63 1.1.2.1 matt
64 1.1.2.1 matt static int pq3ehci_match(device_t, cfdata_t, void *);
65 1.1.2.1 matt static void pq3ehci_attach(device_t, device_t, void *);
66 1.1.2.1 matt
67 1.1.2.1 matt struct pq3ehci_softc {
68 1.1.2.1 matt ehci_softc_t sc;
69 1.1.2.1 matt void *sc_ih; /* interrupt vectoring */
70 1.1.2.1 matt };
71 1.1.2.1 matt
72 1.1.2.1 matt CFATTACH_DECL_NEW(pq3ehci, sizeof(struct pq3ehci_softc),
73 1.1.2.1 matt pq3ehci_match, pq3ehci_attach, NULL, NULL);
74 1.1.2.1 matt
75 1.1.2.1 matt static int
76 1.1.2.1 matt pq3ehci_match(device_t parent, cfdata_t cf, void *aux)
77 1.1.2.1 matt {
78 1.1.2.1 matt
79 1.1.2.1 matt if (!e500_cpunode_submatch(parent, cf, cf->cf_name, aux))
80 1.1.2.1 matt return 0;
81 1.1.2.1 matt
82 1.1.2.1 matt return 1;
83 1.1.2.1 matt }
84 1.1.2.1 matt
85 1.1.2.1 matt static void
86 1.1.2.1 matt pq3ehci_attach(device_t parent, device_t self, void *aux)
87 1.1.2.1 matt {
88 1.1.2.1 matt struct cpunode_softc * const psc = device_private(parent);
89 1.1.2.1 matt struct pq3ehci_softc * const sc = device_private(self);
90 1.1.2.1 matt struct cpunode_attach_args * const cna = aux;
91 1.1.2.1 matt struct cpunode_locators * const cnl = &cna->cna_locs;
92 1.1.2.1 matt int error;
93 1.1.2.1 matt
94 1.1.2.1 matt psc->sc_children |= cna->cna_childmask;
95 1.1.2.2 matt sc->sc.iot = cna->cna_le_memt; /* EHCI registers are little endian */
96 1.1.2.1 matt sc->sc.sc_dev = self;
97 1.1.2.1 matt sc->sc.sc_bus.dmatag = cna->cna_dmat;
98 1.1.2.1 matt sc->sc.sc_bus.hci_private = sc;
99 1.1.2.1 matt sc->sc.sc_bus.usbrev = USBREV_2_0;
100 1.1.2.1 matt sc->sc.sc_ncomp = 0;
101 1.1.2.1 matt sc->sc.sc_flags |= EHCIF_ETTF;
102 1.1.2.1 matt
103 1.1.2.1 matt aprint_naive(": USB controller\n");
104 1.1.2.1 matt aprint_normal(": USB controller\n");
105 1.1.2.1 matt
106 1.1.2.1 matt error = bus_space_map(sc->sc.iot, cnl->cnl_addr, cnl->cnl_size, 0,
107 1.1.2.1 matt &sc->sc.ioh);
108 1.1.2.1 matt if (error) {
109 1.1.2.1 matt aprint_error_dev(self,
110 1.1.2.1 matt "can't map registers for %s#%u: %d\n",
111 1.1.2.1 matt cnl->cnl_name, cnl->cnl_instance, error);
112 1.1.2.1 matt return;
113 1.1.2.1 matt }
114 1.1.2.1 matt sc->sc.sc_size = cnl->cnl_size;
115 1.1.2.1 matt
116 1.1.2.2 matt /*
117 1.1.2.2 matt * We need to tell the USB interface to snoop all off RAM starting
118 1.1.2.2 matt * at 0. Since it can do it by powers of 2, get the highest RAM
119 1.1.2.2 matt * address and roughly round it to the next power of 2 and find
120 1.1.2.2 matt * the number of leading zero bits.
121 1.1.2.2 matt */
122 1.1.2.2 matt cpu_write_4(cnl->cnl_addr + USB_SNOOP1,
123 1.1.2.2 matt SNOOP_2GB - __builtin_clz(curcpu()->ci_softc->cpu_highmem * 2 - 1));
124 1.1.2.2 matt cpu_write_4(cnl->cnl_addr + USB_CONTROL, USB_EN);
125 1.1.2.2 matt
126 1.1.2.2 matt sc->sc_ih = intr_establish(cnl->cnl_intrs[0], IPL_USB, IST_ONCHIP,
127 1.1.2.1 matt ehci_intr, sc);
128 1.1.2.1 matt if (sc->sc_ih == NULL) {
129 1.1.2.1 matt aprint_error_dev(self, "failed to establish interrupt %d\n",
130 1.1.2.1 matt cnl->cnl_intrs[0]);
131 1.1.2.1 matt goto fail;
132 1.1.2.1 matt }
133 1.1.2.1 matt aprint_normal_dev(self, "interrupting on irq %d\n",
134 1.1.2.1 matt cnl->cnl_intrs[0]);
135 1.1.2.1 matt
136 1.1.2.1 matt /* offs is needed for EOWRITEx */
137 1.1.2.1 matt sc->sc.sc_offs = EREAD1(&sc->sc, EHCI_CAPLENGTH);
138 1.1.2.1 matt
139 1.1.2.1 matt /* Disable interrupts, so we don't get any spurious ones. */
140 1.1.2.1 matt DPRINTF(("%s: offs=%d\n", device_xname(self), sc->sc.sc_offs));
141 1.1.2.1 matt EOWRITE2(&sc->sc, EHCI_USBINTR, 0);
142 1.1.2.1 matt
143 1.1.2.1 matt error = ehci_init(&sc->sc);
144 1.1.2.1 matt if (error != USBD_NORMAL_COMPLETION) {
145 1.1.2.1 matt aprint_error_dev(self, "init failed, error=%d\n", error);
146 1.1.2.1 matt goto fail;
147 1.1.2.1 matt }
148 1.1.2.1 matt
149 1.1.2.1 matt /* Attach usb device. */
150 1.1.2.1 matt sc->sc.sc_child = config_found(self, &sc->sc.sc_bus, usbctlprint);
151 1.1.2.1 matt return;
152 1.1.2.1 matt
153 1.1.2.1 matt fail:
154 1.1.2.1 matt if (sc->sc_ih) {
155 1.1.2.1 matt intr_disestablish(sc->sc_ih);
156 1.1.2.1 matt sc->sc_ih = NULL;
157 1.1.2.1 matt }
158 1.1.2.1 matt if (sc->sc.sc_size) {
159 1.1.2.1 matt bus_space_unmap(sc->sc.iot, sc->sc.ioh, sc->sc.sc_size);
160 1.1.2.1 matt sc->sc.sc_size = 0;
161 1.1.2.1 matt }
162 1.1.2.1 matt return;
163 1.1.2.1 matt }
164