e500_timer.c revision 1.2.4.2
1 1.2.4.2 rmind /* $NetBSD: e500_timer.c,v 1.2.4.2 2011/03/05 20:51:34 rmind Exp $ */ 2 1.2.4.2 rmind /*- 3 1.2.4.2 rmind * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 1.2.4.2 rmind * All rights reserved. 5 1.2.4.2 rmind * 6 1.2.4.2 rmind * This code is derived from software contributed to The NetBSD Foundation 7 1.2.4.2 rmind * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 1.2.4.2 rmind * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 1.2.4.2 rmind * 10 1.2.4.2 rmind * This material is based upon work supported by the Defense Advanced Research 11 1.2.4.2 rmind * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 1.2.4.2 rmind * Contract No. N66001-09-C-2073. 13 1.2.4.2 rmind * Approved for Public Release, Distribution Unlimited 14 1.2.4.2 rmind * 15 1.2.4.2 rmind * Redistribution and use in source and binary forms, with or without 16 1.2.4.2 rmind * modification, are permitted provided that the following conditions 17 1.2.4.2 rmind * are met: 18 1.2.4.2 rmind * 1. Redistributions of source code must retain the above copyright 19 1.2.4.2 rmind * notice, this list of conditions and the following disclaimer. 20 1.2.4.2 rmind * 2. Redistributions in binary form must reproduce the above copyright 21 1.2.4.2 rmind * notice, this list of conditions and the following disclaimer in the 22 1.2.4.2 rmind * documentation and/or other materials provided with the distribution. 23 1.2.4.2 rmind * 24 1.2.4.2 rmind * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 1.2.4.2 rmind * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 1.2.4.2 rmind * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 1.2.4.2 rmind * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 1.2.4.2 rmind * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 1.2.4.2 rmind * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 1.2.4.2 rmind * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 1.2.4.2 rmind * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 1.2.4.2 rmind * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 1.2.4.2 rmind * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 1.2.4.2 rmind * POSSIBILITY OF SUCH DAMAGE. 35 1.2.4.2 rmind */ 36 1.2.4.2 rmind 37 1.2.4.2 rmind #include <sys/cdefs.h> 38 1.2.4.2 rmind __KERNEL_RCSID(0, "$NetBSD: e500_timer.c,v 1.2.4.2 2011/03/05 20:51:34 rmind Exp $"); 39 1.2.4.2 rmind 40 1.2.4.2 rmind #include <sys/param.h> 41 1.2.4.2 rmind #include <sys/kernel.h> 42 1.2.4.2 rmind #include <sys/systm.h> 43 1.2.4.2 rmind #include <sys/timetc.h> 44 1.2.4.2 rmind #include <sys/intr.h> 45 1.2.4.2 rmind #include <sys/cpu.h> 46 1.2.4.2 rmind 47 1.2.4.2 rmind #include <uvm/uvm_extern.h> 48 1.2.4.2 rmind 49 1.2.4.2 rmind #include <powerpc/spr.h> 50 1.2.4.2 rmind #include <powerpc/booke/spr.h> 51 1.2.4.2 rmind #include <powerpc/booke/cpuvar.h> 52 1.2.4.2 rmind #include <powerpc/booke/e500reg.h> 53 1.2.4.2 rmind #include <powerpc/booke/e500var.h> 54 1.2.4.2 rmind #include <powerpc/booke/openpicreg.h> 55 1.2.4.2 rmind 56 1.2.4.2 rmind /* 57 1.2.4.2 rmind * Initially we assume a processor with a bus frequency of 12.5 MHz. 58 1.2.4.2 rmind */ 59 1.2.4.2 rmind static u_long ns_per_tick; 60 1.2.4.2 rmind 61 1.2.4.2 rmind static void init_ppcbooke_tc(void); 62 1.2.4.2 rmind static u_int get_ppcbooke_timecount(struct timecounter *); 63 1.2.4.2 rmind 64 1.2.4.2 rmind static struct timecounter ppcbooke_timecounter = { 65 1.2.4.2 rmind get_ppcbooke_timecount, /* get_timecount */ 66 1.2.4.2 rmind 0, /* no poll_pps */ 67 1.2.4.2 rmind ~0u, /* counter_mask */ 68 1.2.4.2 rmind 0, /* frequency */ 69 1.2.4.2 rmind "ppc_timebase", /* name */ 70 1.2.4.2 rmind 100, /* quality */ 71 1.2.4.2 rmind NULL, /* tc_priv */ 72 1.2.4.2 rmind NULL /* tc_next */ 73 1.2.4.2 rmind }; 74 1.2.4.2 rmind 75 1.2.4.2 rmind static inline uint32_t 76 1.2.4.2 rmind openpic_read(struct cpu_softc *cpu, bus_size_t offset) 77 1.2.4.2 rmind { 78 1.2.4.2 rmind 79 1.2.4.2 rmind return bus_space_read_4(cpu->cpu_bst, cpu->cpu_bsh, 80 1.2.4.2 rmind OPENPIC_BASE + offset); 81 1.2.4.2 rmind } 82 1.2.4.2 rmind 83 1.2.4.2 rmind static inline void 84 1.2.4.2 rmind openpic_write(struct cpu_softc *cpu, bus_size_t offset, uint32_t val) 85 1.2.4.2 rmind { 86 1.2.4.2 rmind 87 1.2.4.2 rmind return bus_space_write_4(cpu->cpu_bst, cpu->cpu_bsh, 88 1.2.4.2 rmind OPENPIC_BASE + offset, val); 89 1.2.4.2 rmind } 90 1.2.4.2 rmind 91 1.2.4.2 rmind int 92 1.2.4.2 rmind e500_clock_intr(void *v) 93 1.2.4.2 rmind { 94 1.2.4.2 rmind struct trapframe * const tf = v; 95 1.2.4.2 rmind struct cpu_info * const ci = curcpu(); 96 1.2.4.2 rmind struct cpu_softc * const cpu = ci->ci_softc; 97 1.2.4.2 rmind u_int nticks; 98 1.2.4.2 rmind 99 1.2.4.2 rmind /* 100 1.2.4.2 rmind * Check whether we are initialized. 101 1.2.4.2 rmind */ 102 1.2.4.2 rmind if (!cpu->cpu_ticks_per_clock_intr) 103 1.2.4.2 rmind return 0; 104 1.2.4.2 rmind 105 1.2.4.2 rmind /* 106 1.2.4.2 rmind * Now let's how delayed the clock interrupt was. Obviously it must 107 1.2.4.2 rmind * at least one clock tick since the clock interrupt. But it might 108 1.2.4.2 rmind * be more if interrupts were blocked for a long time. We keep 109 1.2.4.2 rmind * suubtracting an interrupts We should be 110 1.2.4.2 rmind * [well] within a single tick. 111 1.2.4.2 rmind * We add back one tick (which should put us back above 0). If we 112 1.2.4.2 rmind * are still below 0, keep adding ticks until we are above 0. 113 1.2.4.2 rmind */ 114 1.2.4.2 rmind const uint64_t now = mftb(); 115 1.2.4.2 rmind uint64_t latency = now - (ci->ci_lastintr + cpu->cpu_ticks_per_clock_intr); 116 1.2.4.2 rmind #if 0 117 1.2.4.2 rmind uint64_t orig_latency = latency; 118 1.2.4.2 rmind #endif 119 1.2.4.2 rmind if (now < ci->ci_lastintr + cpu->cpu_ticks_per_clock_intr) 120 1.2.4.2 rmind latency = 0; 121 1.2.4.2 rmind 122 1.2.4.2 rmind nticks = 1 + latency / cpu->cpu_ticks_per_clock_intr; 123 1.2.4.2 rmind latency %= cpu->cpu_ticks_per_clock_intr; 124 1.2.4.2 rmind #if 0 125 1.2.4.2 rmind for (nticks = 1; latency >= cpu->cpu_ticks_per_clock_intr; nticks++) { 126 1.2.4.2 rmind latency -= cpu->cpu_ticks_per_clock_intr; 127 1.2.4.2 rmind } 128 1.2.4.2 rmind #endif 129 1.2.4.2 rmind 130 1.2.4.2 rmind ci->ci_ev_clock.ev_count++; 131 1.2.4.2 rmind cpu->cpu_ev_late_clock.ev_count += nticks - 1; 132 1.2.4.2 rmind 133 1.2.4.2 rmind /* 134 1.2.4.2 rmind * lasttb is used during microtime. Set it to the virtual 135 1.2.4.2 rmind * start of this tick interval. 136 1.2.4.2 rmind */ 137 1.2.4.2 rmind #if 0 138 1.2.4.2 rmind if (nticks > 10 || now - ci->ci_lastintr < 7 * cpu->cpu_ticks_per_clock_intr / 8) 139 1.2.4.2 rmind printf("%s: nticks=%u lastintr=%#"PRIx64"(%#"PRIx64") now=%#"PRIx64" latency=%#"PRIx64" orig=%#"PRIx64"\n", __func__, 140 1.2.4.2 rmind nticks, ci->ci_lastintr, now - latency, now, latency, orig_latency); 141 1.2.4.2 rmind #endif 142 1.2.4.2 rmind ci->ci_lastintr = now - latency; 143 1.2.4.2 rmind ci->ci_lasttb = now; 144 1.2.4.2 rmind 145 1.2.4.2 rmind wrtee(PSL_EE); /* Reenable interrupts */ 146 1.2.4.2 rmind 147 1.2.4.2 rmind /* 148 1.2.4.2 rmind * Do standard timer interrupt stuff. 149 1.2.4.2 rmind */ 150 1.2.4.2 rmind while (nticks-- > 0) { 151 1.2.4.2 rmind hardclock(&tf->tf_cf); 152 1.2.4.2 rmind } 153 1.2.4.2 rmind 154 1.2.4.2 rmind wrtee(0); /* turn off interrupts */ 155 1.2.4.2 rmind 156 1.2.4.2 rmind return 1; 157 1.2.4.2 rmind } 158 1.2.4.2 rmind 159 1.2.4.2 rmind void 160 1.2.4.2 rmind cpu_initclocks(void) 161 1.2.4.2 rmind { 162 1.2.4.2 rmind struct cpu_info * const ci = curcpu(); 163 1.2.4.2 rmind struct cpu_softc * const cpu = ci->ci_softc; 164 1.2.4.2 rmind 165 1.2.4.2 rmind cpu->cpu_ticks_per_clock_intr = (ci->ci_data.cpu_cc_freq + hz/2 - 1) / hz; 166 1.2.4.2 rmind 167 1.2.4.2 rmind /* interrupt established in e500_intr_cpu_init */ 168 1.2.4.2 rmind 169 1.2.4.2 rmind ci->ci_lastintr = ci->ci_lasttb = mftb(); 170 1.2.4.2 rmind openpic_write(cpu, cpu->cpu_clock_gtbcr, 171 1.2.4.2 rmind GTBCR_CI | cpu->cpu_ticks_per_clock_intr); 172 1.2.4.2 rmind openpic_write(cpu, cpu->cpu_clock_gtbcr, 173 1.2.4.2 rmind cpu->cpu_ticks_per_clock_intr); 174 1.2.4.2 rmind 175 1.2.4.2 rmind init_ppcbooke_tc(); 176 1.2.4.2 rmind } 177 1.2.4.2 rmind 178 1.2.4.2 rmind void 179 1.2.4.2 rmind calc_delayconst(void) 180 1.2.4.2 rmind { 181 1.2.4.2 rmind struct cpu_info * const ci = curcpu(); 182 1.2.4.2 rmind 183 1.2.4.2 rmind ci->ci_data.cpu_cc_freq = board_info_get_number("timebase-frequency"); 184 1.2.4.2 rmind ns_per_tick = 1000000000 / (u_int)ci->ci_data.cpu_cc_freq; 185 1.2.4.2 rmind } 186 1.2.4.2 rmind 187 1.2.4.2 rmind static u_int 188 1.2.4.2 rmind get_ppcbooke_timecount(struct timecounter *tc) 189 1.2.4.2 rmind { 190 1.2.4.2 rmind return mftbl(); 191 1.2.4.2 rmind } 192 1.2.4.2 rmind 193 1.2.4.2 rmind /* 194 1.2.4.2 rmind * Wait for about n microseconds (at least!). 195 1.2.4.2 rmind */ 196 1.2.4.2 rmind void 197 1.2.4.2 rmind delay(unsigned int n) 198 1.2.4.2 rmind { 199 1.2.4.2 rmind uint64_t tb; 200 1.2.4.2 rmind u_long tbh, tbl, scratch; 201 1.2.4.2 rmind 202 1.2.4.2 rmind tb = mftb(); 203 1.2.4.2 rmind /* use 1000ULL to force 64 bit math to avoid 32 bit overflows */ 204 1.2.4.2 rmind tb += (n * 1000ULL + ns_per_tick - 1) / ns_per_tick; 205 1.2.4.2 rmind tbh = tb >> 32; 206 1.2.4.2 rmind tbl = tb; 207 1.2.4.2 rmind __asm volatile ( 208 1.2.4.2 rmind "1: mfspr %0,%4" "\n" 209 1.2.4.2 rmind " cmplw %0,%1" "\n" 210 1.2.4.2 rmind " blt 1b" "\n" 211 1.2.4.2 rmind " bgt 2f" "\n" 212 1.2.4.2 rmind " mfspr %0,%3" "\n" 213 1.2.4.2 rmind " cmplw %0,%2" "\n" 214 1.2.4.2 rmind " blt 1b" "\n" 215 1.2.4.2 rmind "2:" "\n" 216 1.2.4.2 rmind : "=&r"(scratch) 217 1.2.4.2 rmind : "r"(tbh), "r"(tbl), "n"(SPR_TBL), "n"(SPR_TBU) 218 1.2.4.2 rmind : "cr0"); 219 1.2.4.2 rmind } 220 1.2.4.2 rmind 221 1.2.4.2 rmind /* 222 1.2.4.2 rmind * Nothing to do. 223 1.2.4.2 rmind */ 224 1.2.4.2 rmind void 225 1.2.4.2 rmind setstatclockrate(int arg) 226 1.2.4.2 rmind { 227 1.2.4.2 rmind 228 1.2.4.2 rmind /* Do nothing */ 229 1.2.4.2 rmind } 230 1.2.4.2 rmind 231 1.2.4.2 rmind static void 232 1.2.4.2 rmind init_ppcbooke_tc(void) 233 1.2.4.2 rmind { 234 1.2.4.2 rmind /* from machdep initialization */ 235 1.2.4.2 rmind ppcbooke_timecounter.tc_frequency = curcpu()->ci_data.cpu_cc_freq; 236 1.2.4.2 rmind tc_init(&ppcbooke_timecounter); 237 1.2.4.2 rmind } 238
Indexes created Fri Oct 03 17:10:05 GMT 2025