e500_timer.c revision 1.4.12.2
1 /* $NetBSD: e500_timer.c,v 1.4.12.2 2017/12/03 11:36:36 jdolecek Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(0, "$NetBSD: e500_timer.c,v 1.4.12.2 2017/12/03 11:36:36 jdolecek Exp $"); 39 40 #include <sys/param.h> 41 #include <sys/kernel.h> 42 #include <sys/systm.h> 43 #include <sys/timetc.h> 44 #include <sys/intr.h> 45 #include <sys/cpu.h> 46 47 #include <uvm/uvm_extern.h> 48 49 #include <powerpc/spr.h> 50 #include <powerpc/booke/spr.h> 51 #include <powerpc/booke/cpuvar.h> 52 #include <powerpc/booke/e500reg.h> 53 #include <powerpc/booke/e500var.h> 54 #include <powerpc/booke/openpicreg.h> 55 56 uint32_t ticks_per_sec; 57 static u_long ns_per_tick; 58 59 static void init_ppcbooke_tc(void); 60 static u_int get_ppcbooke_timecount(struct timecounter *); 61 62 static struct timecounter ppcbooke_timecounter = { 63 get_ppcbooke_timecount, /* get_timecount */ 64 0, /* no poll_pps */ 65 ~0u, /* counter_mask */ 66 0, /* frequency */ 67 "ppc_timebase", /* name */ 68 100, /* quality */ 69 NULL, /* tc_priv */ 70 NULL /* tc_next */ 71 }; 72 73 static inline void 74 openpic_write(struct cpu_softc *cpu, bus_size_t offset, uint32_t val) 75 { 76 77 return bus_space_write_4(cpu->cpu_bst, cpu->cpu_bsh, 78 OPENPIC_BASE + offset, val); 79 } 80 81 int 82 e500_clock_intr(void *v) 83 { 84 struct trapframe * const tf = v; 85 struct cpu_info * const ci = curcpu(); 86 struct cpu_softc * const cpu = ci->ci_softc; 87 u_int nticks; 88 89 /* 90 * Check whether we are initialized. 91 */ 92 if (!cpu->cpu_ticks_per_clock_intr) 93 return 0; 94 95 /* 96 * Now let's how delayed the clock interrupt was. Obviously it must 97 * at least one clock tick since the clock interrupt. But it might 98 * be more if interrupts were blocked for a long time. We keep 99 * suubtracting an interrupts We should be 100 * [well] within a single tick. 101 * We add back one tick (which should put us back above 0). If we 102 * are still below 0, keep adding ticks until we are above 0. 103 */ 104 const uint64_t now = mftb(); 105 uint64_t latency = now - (ci->ci_lastintr + cpu->cpu_ticks_per_clock_intr); 106 #if 0 107 uint64_t orig_latency = latency; 108 #endif 109 if (now < ci->ci_lastintr + cpu->cpu_ticks_per_clock_intr) 110 latency = 0; 111 112 nticks = 1 + latency / cpu->cpu_ticks_per_clock_intr; 113 latency %= cpu->cpu_ticks_per_clock_intr; 114 #if 0 115 for (nticks = 1; latency >= cpu->cpu_ticks_per_clock_intr; nticks++) { 116 latency -= cpu->cpu_ticks_per_clock_intr; 117 } 118 #endif 119 120 ci->ci_ev_clock.ev_count++; 121 cpu->cpu_ev_late_clock.ev_count += nticks - 1; 122 123 /* 124 * lasttb is used during microtime. Set it to the virtual 125 * start of this tick interval. 126 */ 127 #if 0 128 if (nticks > 10 || now - ci->ci_lastintr < 7 * cpu->cpu_ticks_per_clock_intr / 8) 129 printf("%s: nticks=%u lastintr=%#"PRIx64"(%#"PRIx64") now=%#"PRIx64" latency=%#"PRIx64" orig=%#"PRIx64"\n", __func__, 130 nticks, ci->ci_lastintr, now - latency, now, latency, orig_latency); 131 #endif 132 ci->ci_lastintr = now - latency; 133 ci->ci_lasttb = now; 134 135 wrtee(PSL_EE); /* Reenable interrupts */ 136 137 /* 138 * Do standard timer interrupt stuff. 139 */ 140 while (nticks-- > 0) { 141 hardclock(&tf->tf_cf); 142 } 143 144 wrtee(0); /* turn off interrupts */ 145 146 tf->tf_srr1 &= ~PSL_POW; /* make cpu_idle exit */ 147 148 return 1; 149 } 150 151 void 152 cpu_initclocks(void) 153 { 154 struct cpu_info * const ci = curcpu(); 155 struct cpu_softc * const cpu = ci->ci_softc; 156 157 cpu->cpu_ticks_per_clock_intr = (ci->ci_data.cpu_cc_freq + hz/2 - 1) / hz; 158 159 /* interrupt established in e500_intr_cpu_init */ 160 161 ci->ci_lastintr = ci->ci_lasttb = mftb(); 162 openpic_write(cpu, cpu->cpu_clock_gtbcr, 163 GTBCR_CI | cpu->cpu_ticks_per_clock_intr); 164 openpic_write(cpu, cpu->cpu_clock_gtbcr, 165 cpu->cpu_ticks_per_clock_intr); 166 167 if (CPU_IS_PRIMARY(ci)) 168 init_ppcbooke_tc(); 169 } 170 171 void 172 calc_delayconst(void) 173 { 174 struct cpu_info * const ci = curcpu(); 175 176 ci->ci_data.cpu_cc_freq = board_info_get_number("timebase-frequency"); 177 ticks_per_sec = (uint32_t)ci->ci_data.cpu_cc_freq; 178 ns_per_tick = 1000000000 / (u_int)ci->ci_data.cpu_cc_freq; 179 } 180 181 static u_int 182 get_ppcbooke_timecount(struct timecounter *tc) 183 { 184 return mftbl(); 185 } 186 187 /* 188 * Wait for about n microseconds (at least!). 189 */ 190 void 191 delay(unsigned int n) 192 { 193 uint64_t tb; 194 u_long tbh, tbl, scratch; 195 196 tb = mftb(); 197 /* use 1000ULL to force 64 bit math to avoid 32 bit overflows */ 198 tb += (n * 1000ULL + ns_per_tick - 1) / ns_per_tick; 199 tbh = tb >> 32; 200 tbl = tb; 201 __asm volatile ( 202 "1: mfspr %0,%4" "\n" 203 " cmplw %0,%1" "\n" 204 " blt 1b" "\n" 205 " bgt 2f" "\n" 206 " mfspr %0,%3" "\n" 207 " cmplw %0,%2" "\n" 208 " blt 1b" "\n" 209 "2:" "\n" 210 : "=&r"(scratch) 211 : "r"(tbh), "r"(tbl), "n"(SPR_TBL), "n"(SPR_TBU) 212 : "cr0"); 213 } 214 215 /* 216 * Nothing to do. 217 */ 218 void 219 setstatclockrate(int arg) 220 { 221 222 /* Do nothing */ 223 } 224 225 static void 226 init_ppcbooke_tc(void) 227 { 228 /* from machdep initialization */ 229 ppcbooke_timecounter.tc_frequency = curcpu()->ci_data.cpu_cc_freq; 230 tc_init(&ppcbooke_timecounter); 231 } 232
Indexes created Fri Oct 03 02:09:57 GMT 2025