spe_subr.S revision 1.2.8.2
1 /*- 2 * Copyright (c) 2011 The NetBSD Foundation, Inc. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to The NetBSD Foundation 6 * by Matt Thomas of 3am Software Foundry. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 18 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 19 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 20 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 21 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 22 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 23 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 24 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 25 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 26 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 27 * POSSIBILITY OF SUCH DAMAGE. 28 */ 29 30 #include <machine/asm.h> 31 #include "assym.h" 32 33 RCSID("$NetBSD: spe_subr.S,v 1.2.8.2 2011/06/06 09:06:26 jruoho Exp $") 34 35 .text 36 .machine e500x2 37 /* 38 * Lintstub: void vec_load_from_vreg(const struct vreg *); 39 */ 40 ENTRY(vec_load_from_vreg) 41 /* 42 * Load and initialize the accumulator. Don't care about trashing 43 * r0's high half since we are about to load it. 44 */ 45 evldd %r0,(8 << 4)(%r3) 46 evmra %r0,%r0 47 48 /* 49 * SPEFSCR is in the trapframe. 50 */ 51 52 /* 53 * Since the high part of the register is saved in vreg (because we 54 * are loading it), and we know SPE is on (to load it), just load two 55 * high parts at one time and merge appropriately. For each even-odd 56 * register pair, the evldw will load high part for the even register 57 * in the high 32 bits and the high part for the odd regiter in the 58 * low 32 bits. 59 * 60 * The evmergelo will move the lower half of r0 to the high half of the 61 * destination register and evmergehilo will merge the high half of r0 62 * and lower half of the other register. 63 */ 64 evldw %r0,(30 << 2)(%r3) 65 evmergelo %r31,%r0,%r31; evmergehilo %r30,%r0,%r30 66 evldw %r0,(28 << 2)(%r3) 67 evmergelo %r29,%r0,%r29; evmergehilo %r28,%r0,%r28 68 evldw %r0,(26 << 2)(%r3) 69 evmergelo %r27,%r0,%r27; evmergehilo %r26,%r0,%r26 70 evldw %r0,(24 << 2)(%r3) 71 evmergelo %r25,%r0,%r25; evmergehilo %r24,%r0,%r24 72 evldw %r0,(22 << 2)(%r3) 73 evmergelo %r23,%r0,%r23; evmergehilo %r22,%r0,%r22 74 evldw %r0,(20 << 2)(%r3) 75 evmergelo %r21,%r0,%r21; evmergehilo %r20,%r0,%r20 76 evldw %r0,(18 << 2)(%r3) 77 evmergelo %r19,%r0,%r19; evmergehilo %r18,%r0,%r18 78 evldw %r0,(16 << 2)(%r3) 79 evmergelo %r17,%r0,%r17; evmergehilo %r16,%r0,%r16 80 evldw %r0,(14 << 2)(%r3) 81 evmergelo %r15,%r0,%r15; evmergehilo %r14,%r0,%r14 82 evldw %r0,(12 << 2)(%r3) 83 evmergelo %r13,%r0,%r13; evmergehilo %r12,%r0,%r12 84 /* 85 * Done with callee-saved registers. For caller-saved we can just 86 * trash the register contents. So load the two words with the high 87 * halves into the appropriate register and merge the half for the 88 * next register into it. 89 */ 90 evldw %r10,(10 << 2)(%r3) 91 evmergelo %r11,%r10,%r11 92 evldw %r8,(8 << 2)(%r3) 93 evmergelo %r19,%r8,%r19 94 evldw %r6,(6 << 2)(%r3) 95 evmergelo %r17,%r6,%r17 96 evldw %r4,(4 << 2)(%r3) 97 evmergelo %r15,%r4,%r15 98 99 /* 100 * R2 isn't a callee-saved, so load into r0 because we still need r3 101 */ 102 evldw %r0,(2 << 2)(%r3) 103 evmergelo %r3,%r0,%r3; evmergehilo %r2,%r0,%r2 104 evldd %r0,(0 << 2)(%r3) 105 evmergelo %r1,%r0,%r1 /* why bother? */ 106 107 blr 108 END(vec_load_from_vreg) 109 110 /* 111 * Lintstub: void vec_unload_to_vreg(struct vreg *); 112 */ 113 ENTRY(vec_unload_to_vreg) 114 evmergehi %r4,%r4,%r0; /* save r0's high part in lo r4 */ 115 evmergehi %r0,%r0,%r1; evstdw %r0,(0 << 2)(%r3) 116 evmergehi %r0,%r2,%r3; evstdw %r0,(2 << 2)(%r3) 117 evmergehi %r0,%r4,%r5; evstdw %r0,(4 << 2)(%r3) 118 evmergehi %r0,%r6,%r7; evstdw %r0,(6 << 2)(%r3) 119 evmergehi %r0,%r8,%r9; evstdw %r0,(8 << 2)(%r3) 120 evmergehi %r0,%r10,%r11; evstdw %r0,(10 << 2)(%r3) 121 evmergehi %r0,%r12,%r13; evstdw %r0,(12 << 2)(%r3) 122 evmergehi %r0,%r14,%r15; evstdw %r0,(14 << 2)(%r3) 123 evmergehi %r0,%r16,%r17; evstdw %r0,(16 << 2)(%r3) 124 evmergehi %r0,%r18,%r19; evstdw %r0,(18 << 2)(%r3) 125 evmergehi %r0,%r20,%r21; evstdw %r0,(20 << 2)(%r3) 126 evmergehi %r0,%r22,%r23; evstdw %r0,(22 << 2)(%r3) 127 evmergehi %r0,%r24,%r25; evstdw %r0,(24 << 2)(%r3) 128 evmergehi %r0,%r26,%r27; evstdw %r0,(26 << 2)(%r3) 129 evmergehi %r0,%r28,%r29; evstdw %r0,(28 << 2)(%r3) 130 evmergehi %r0,%r30,%r31; evstdw %r0,(30 << 2)(%r3) 131 132 /* 133 * Now save the accumulator. 134 */ 135 evxor %r0,%r0,%r0 /* zero r0 */ 136 evaddumiaaw %r0,%r0 /* r0 = accum + r0 */ 137 evstdd %r0,(8 << 4)(%r3) /* store it */ 138 139 evmergelo %r0,%r4,%r0 /* retore r0's high half */ 140 141 /* 142 * The SPEFSCR will be restored when the exception returns. 143 */ 144 blr 145 END(vec_unload_to_vreg) 146
Indexes created Wed Oct 15 16:09:53 GMT 2025