trap.c revision 1.35 1 1.35 rin /* $NetBSD: trap.c,v 1.35 2020/09/10 02:45:28 rin Exp $ */
2 1.2 matt /*-
3 1.2 matt * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
4 1.2 matt * All rights reserved.
5 1.2 matt *
6 1.2 matt * This code is derived from software contributed to The NetBSD Foundation
7 1.2 matt * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects
8 1.2 matt * Agency and which was developed by Matt Thomas of 3am Software Foundry.
9 1.2 matt *
10 1.2 matt * This material is based upon work supported by the Defense Advanced Research
11 1.2 matt * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under
12 1.2 matt * Contract No. N66001-09-C-2073.
13 1.2 matt * Approved for Public Release, Distribution Unlimited
14 1.2 matt *
15 1.2 matt * Redistribution and use in source and binary forms, with or without
16 1.2 matt * modification, are permitted provided that the following conditions
17 1.2 matt * are met:
18 1.2 matt * 1. Redistributions of source code must retain the above copyright
19 1.2 matt * notice, this list of conditions and the following disclaimer.
20 1.2 matt * 2. Redistributions in binary form must reproduce the above copyright
21 1.2 matt * notice, this list of conditions and the following disclaimer in the
22 1.2 matt * documentation and/or other materials provided with the distribution.
23 1.2 matt *
24 1.2 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 1.2 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 1.2 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 1.2 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 1.2 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 1.2 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 1.2 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 1.2 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 1.2 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 1.2 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 1.2 matt * POSSIBILITY OF SUCH DAMAGE.
35 1.2 matt */
36 1.2 matt
37 1.2 matt #include <sys/cdefs.h>
38 1.35 rin __KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.35 2020/09/10 02:45:28 rin Exp $");
39 1.2 matt
40 1.28 rin #ifdef _KERNEL_OPT
41 1.29 rin #include "opt_altivec.h"
42 1.28 rin #include "opt_ddb.h"
43 1.28 rin #endif
44 1.2 matt
45 1.2 matt #include <sys/param.h>
46 1.2 matt #include <sys/systm.h>
47 1.2 matt #include <sys/siginfo.h>
48 1.2 matt #include <sys/lwp.h>
49 1.2 matt #include <sys/proc.h>
50 1.2 matt #include <sys/cpu.h>
51 1.2 matt #include <sys/kauth.h>
52 1.2 matt #include <sys/ras.h>
53 1.2 matt
54 1.2 matt #include <uvm/uvm_extern.h>
55 1.2 matt
56 1.2 matt #include <powerpc/pcb.h>
57 1.2 matt #include <powerpc/userret.h>
58 1.2 matt #include <powerpc/psl.h>
59 1.2 matt #include <powerpc/instr.h>
60 1.2 matt #include <powerpc/altivec.h> /* use same interface for SPE */
61 1.2 matt
62 1.2 matt #include <powerpc/spr.h>
63 1.2 matt #include <powerpc/booke/spr.h>
64 1.5 matt #include <powerpc/booke/cpuvar.h>
65 1.2 matt
66 1.18 matt #include <powerpc/fpu/fpu_extern.h>
67 1.18 matt
68 1.2 matt #include <powerpc/db_machdep.h>
69 1.2 matt #include <ddb/db_interface.h>
70 1.2 matt
71 1.2 matt #include <powerpc/trap.h>
72 1.2 matt #include <powerpc/booke/trap.h>
73 1.2 matt #include <powerpc/booke/pte.h>
74 1.2 matt
75 1.2 matt void trap(enum ppc_booke_exceptions, struct trapframe *);
76 1.2 matt
77 1.2 matt static const char trap_names[][8] = {
78 1.2 matt [T_CRITIAL_INPUT] = "CRIT",
79 1.2 matt [T_EXTERNAL_INPUT] = "EXT",
80 1.2 matt [T_DECREMENTER] = "DECR",
81 1.2 matt [T_FIXED_INTERVAL] = "FIT",
82 1.2 matt [T_WATCHDOG] = "WDOG",
83 1.2 matt [T_SYSTEM_CALL] = "SC",
84 1.2 matt [T_MACHINE_CHECK] = "MCHK",
85 1.2 matt [T_DSI] = "DSI",
86 1.2 matt [T_ISI] = "ISI",
87 1.2 matt [T_ALIGNMENT] = "ALN",
88 1.2 matt [T_PROGRAM] = "PGM",
89 1.2 matt [T_FP_UNAVAILABLE] = "FP",
90 1.2 matt [T_AP_UNAVAILABLE] = "AP",
91 1.2 matt [T_DATA_TLB_ERROR] = "DTLB",
92 1.2 matt [T_INSTRUCTION_TLB_ERROR] = "ITLB",
93 1.2 matt [T_DEBUG] = "DEBUG",
94 1.2 matt [T_SPE_UNAVAILABLE] = "SPE",
95 1.2 matt [T_EMBEDDED_FP_DATA] = "FPDATA",
96 1.2 matt [T_EMBEDDED_FP_ROUND] = "FPROUND",
97 1.2 matt [T_EMBEDDED_PERF_MONITOR] = "PERFMON",
98 1.2 matt [T_AST] = "AST",
99 1.2 matt };
100 1.2 matt
101 1.2 matt static inline bool
102 1.2 matt usertrap_p(struct trapframe *tf)
103 1.2 matt {
104 1.2 matt return (tf->tf_srr1 & PSL_PR) != 0;
105 1.2 matt }
106 1.2 matt
107 1.2 matt static int
108 1.2 matt mchk_exception(struct trapframe *tf, ksiginfo_t *ksi)
109 1.2 matt {
110 1.2 matt const bool usertrap = usertrap_p(tf);
111 1.2 matt const vaddr_t faultva = tf->tf_mcar;
112 1.2 matt struct cpu_info * const ci = curcpu();
113 1.2 matt int rv = EFAULT;
114 1.2 matt
115 1.32 rin if (usertrap) {
116 1.2 matt ci->ci_ev_umchk.ev_count++;
117 1.2 matt KSI_INIT_TRAP(ksi);
118 1.32 rin ksi->ksi_signo = SIGBUS;
119 1.32 rin ksi->ksi_trap = EXC_MCHK;
120 1.2 matt ksi->ksi_addr = (void *)faultva;
121 1.32 rin ksi->ksi_code = BUS_OBJERR;
122 1.2 matt }
123 1.2 matt
124 1.2 matt return rv;
125 1.2 matt }
126 1.2 matt
127 1.2 matt static inline vm_prot_t
128 1.2 matt get_faulttype(const struct trapframe * const tf)
129 1.2 matt {
130 1.2 matt return VM_PROT_READ | (tf->tf_esr & ESR_ST ? VM_PROT_WRITE : 0);
131 1.2 matt }
132 1.2 matt
133 1.2 matt static inline struct vm_map *
134 1.2 matt get_faultmap(const struct trapframe * const tf, register_t psl_mask)
135 1.2 matt {
136 1.2 matt return (tf->tf_srr1 & psl_mask)
137 1.2 matt ? &curlwp->l_proc->p_vmspace->vm_map
138 1.2 matt : kernel_map;
139 1.2 matt }
140 1.2 matt
141 1.2 matt /*
142 1.17 matt * We could use pmap_pte_lookup but this slightly faster since we already
143 1.2 matt * the segtab pointers in cpu_info.
144 1.2 matt */
145 1.2 matt static inline pt_entry_t *
146 1.2 matt trap_pte_lookup(struct trapframe *tf, vaddr_t va, register_t psl_mask)
147 1.2 matt {
148 1.17 matt pmap_segtab_t ** const stps = &curcpu()->ci_pmap_kern_segtab;
149 1.17 matt pmap_segtab_t * const stp = stps[(tf->tf_srr1 / psl_mask) & 1];
150 1.2 matt if (__predict_false(stp == NULL))
151 1.2 matt return NULL;
152 1.17 matt pt_entry_t * const ptep = stp->seg_tab[va >> SEGSHIFT];
153 1.2 matt if (__predict_false(ptep == NULL))
154 1.2 matt return NULL;
155 1.2 matt return ptep + ((va & SEGOFSET) >> PAGE_SHIFT);
156 1.2 matt }
157 1.2 matt
158 1.2 matt static int
159 1.2 matt pagefault(struct vm_map *map, vaddr_t va, vm_prot_t ftype, bool usertrap)
160 1.2 matt {
161 1.2 matt struct lwp * const l = curlwp;
162 1.2 matt int rv;
163 1.2 matt
164 1.2 matt // printf("%s(%p,%#lx,%u,%u)\n", __func__, map, va, ftype, usertrap);
165 1.2 matt
166 1.2 matt if (usertrap) {
167 1.2 matt rv = uvm_fault(map, trunc_page(va), ftype);
168 1.2 matt if (rv == 0)
169 1.2 matt uvm_grow(l->l_proc, trunc_page(va));
170 1.2 matt } else {
171 1.2 matt if (cpu_intr_p())
172 1.2 matt return EFAULT;
173 1.2 matt
174 1.2 matt struct pcb * const pcb = lwp_getpcb(l);
175 1.2 matt struct faultbuf * const fb = pcb->pcb_onfault;
176 1.2 matt pcb->pcb_onfault = NULL;
177 1.2 matt rv = uvm_fault(map, trunc_page(va), ftype);
178 1.2 matt pcb->pcb_onfault = fb;
179 1.2 matt if (map != kernel_map) {
180 1.2 matt if (rv == 0)
181 1.2 matt uvm_grow(l->l_proc, trunc_page(va));
182 1.2 matt }
183 1.2 matt }
184 1.2 matt return rv;
185 1.2 matt }
186 1.2 matt
187 1.32 rin static void
188 1.32 rin vm_signal(int error, int trap, vaddr_t addr, ksiginfo_t *ksi)
189 1.32 rin {
190 1.32 rin
191 1.32 rin KSI_INIT_TRAP(ksi);
192 1.32 rin switch (error) {
193 1.32 rin case EINVAL:
194 1.32 rin ksi->ksi_signo = SIGBUS;
195 1.32 rin ksi->ksi_code = BUS_ADRERR;
196 1.32 rin break;
197 1.32 rin case EACCES:
198 1.32 rin ksi->ksi_signo = SIGSEGV;
199 1.32 rin ksi->ksi_code = SEGV_ACCERR;
200 1.32 rin break;
201 1.32 rin default:
202 1.32 rin ksi->ksi_signo = SIGSEGV;
203 1.32 rin ksi->ksi_code = SEGV_MAPERR;
204 1.32 rin break;
205 1.32 rin }
206 1.32 rin ksi->ksi_trap = trap;
207 1.32 rin ksi->ksi_addr = (void *)addr;
208 1.32 rin }
209 1.32 rin
210 1.2 matt static int
211 1.2 matt dsi_exception(struct trapframe *tf, ksiginfo_t *ksi)
212 1.2 matt {
213 1.2 matt const vaddr_t faultva = tf->tf_dear;
214 1.2 matt const vm_prot_t ftype = get_faulttype(tf);
215 1.2 matt struct vm_map * const faultmap = get_faultmap(tf, PSL_DS);
216 1.2 matt const bool usertrap = usertrap_p(tf);
217 1.2 matt
218 1.2 matt kpreempt_disable();
219 1.2 matt struct cpu_info * const ci = curcpu();
220 1.2 matt
221 1.2 matt if (usertrap)
222 1.2 matt ci->ci_ev_udsi.ev_count++;
223 1.2 matt else
224 1.2 matt ci->ci_ev_kdsi.ev_count++;
225 1.2 matt
226 1.2 matt /*
227 1.2 matt * If we had a TLB entry (which we must have had to get this exception),
228 1.2 matt * we certainly have a PTE.
229 1.2 matt */
230 1.2 matt pt_entry_t * const ptep = trap_pte_lookup(tf, trunc_page(faultva),
231 1.2 matt PSL_DS);
232 1.2 matt KASSERT(ptep != NULL);
233 1.2 matt pt_entry_t pte = *ptep;
234 1.2 matt
235 1.2 matt if ((ftype & VM_PROT_WRITE)
236 1.2 matt && ((pte & (PTE_xW|PTE_UNMODIFIED)) == (PTE_xW|PTE_UNMODIFIED))) {
237 1.2 matt const paddr_t pa = pte_to_paddr(pte);
238 1.2 matt struct vm_page * const pg = PHYS_TO_VM_PAGE(pa);
239 1.2 matt KASSERT(pg);
240 1.11 matt struct vm_page_md * const mdpg = VM_PAGE_TO_MD(pg);
241 1.2 matt
242 1.11 matt if (!VM_PAGEMD_MODIFIED_P(mdpg)) {
243 1.11 matt pmap_page_set_attributes(mdpg, VM_PAGEMD_MODIFIED);
244 1.2 matt }
245 1.2 matt pte &= ~PTE_UNMODIFIED;
246 1.2 matt *ptep = pte;
247 1.2 matt pmap_tlb_update_addr(faultmap->pmap, trunc_page(faultva),
248 1.2 matt pte, 0);
249 1.2 matt kpreempt_enable();
250 1.2 matt return 0;
251 1.2 matt }
252 1.2 matt kpreempt_enable();
253 1.2 matt
254 1.2 matt int rv = pagefault(faultmap, faultva, ftype, usertrap);
255 1.2 matt
256 1.2 matt if (__predict_false(rv != 0 && usertrap)) {
257 1.2 matt ci->ci_ev_udsi_fatal.ev_count++;
258 1.32 rin vm_signal(rv, EXC_DSI, faultva, ksi);
259 1.2 matt }
260 1.2 matt return rv;
261 1.2 matt }
262 1.2 matt
263 1.2 matt static int
264 1.2 matt isi_exception(struct trapframe *tf, ksiginfo_t *ksi)
265 1.2 matt {
266 1.2 matt const vaddr_t faultva = trunc_page(tf->tf_srr0);
267 1.2 matt struct vm_map * const faultmap = get_faultmap(tf, PSL_IS);
268 1.2 matt const bool usertrap = usertrap_p(tf);
269 1.2 matt
270 1.2 matt kpreempt_disable();
271 1.2 matt struct cpu_info * const ci = curcpu();
272 1.2 matt
273 1.2 matt if (usertrap)
274 1.2 matt ci->ci_ev_isi.ev_count++;
275 1.2 matt else
276 1.2 matt ci->ci_ev_kisi.ev_count++;
277 1.2 matt
278 1.2 matt /*
279 1.2 matt * If we had a TLB entry (which we must have had to get this exception),
280 1.2 matt * we certainly have a PTE.
281 1.2 matt */
282 1.2 matt pt_entry_t * const ptep = trap_pte_lookup(tf, trunc_page(faultva),
283 1.2 matt PSL_IS);
284 1.2 matt if (ptep == NULL)
285 1.20 matt dump_trapframe(tf, NULL);
286 1.2 matt KASSERT(ptep != NULL);
287 1.2 matt pt_entry_t pte = *ptep;
288 1.2 matt
289 1.8 matt UVMHIST_FUNC(__func__); UVMHIST_CALLED(pmapexechist);
290 1.8 matt
291 1.2 matt if ((pte & PTE_UNSYNCED) == PTE_UNSYNCED) {
292 1.2 matt const paddr_t pa = pte_to_paddr(pte);
293 1.2 matt struct vm_page * const pg = PHYS_TO_VM_PAGE(pa);
294 1.2 matt KASSERT(pg);
295 1.11 matt struct vm_page_md * const mdpg = VM_PAGE_TO_MD(pg);
296 1.2 matt
297 1.35 rin #ifdef UVMHIST
298 1.35 rin if (VM_PAGEMD_EXECPAGE_P(mdpg))
299 1.35 rin UVMHIST_LOG(pmapexechist,
300 1.35 rin "srr0=%#x pg=%p (pa %#"PRIxPADDR"): "
301 1.35 rin "no syncicache (already execpage)",
302 1.35 rin tf->tf_srr0, (uintptr_t)pg, pa, 0);
303 1.35 rin else
304 1.35 rin UVMHIST_LOG(pmapexechist,
305 1.35 rin "srr0=%#x pg=%p (pa %#"PRIxPADDR"): "
306 1.35 rin "performed syncicache (now execpage)",
307 1.35 rin tf->tf_srr0, (uintptr_t)pg, pa, 0);
308 1.35 rin #endif
309 1.8 matt
310 1.11 matt if (!VM_PAGEMD_EXECPAGE_P(mdpg)) {
311 1.2 matt ci->ci_softc->cpu_ev_exec_trap_sync.ev_count++;
312 1.2 matt dcache_wb_page(pa);
313 1.2 matt icache_inv_page(pa);
314 1.11 matt pmap_page_set_attributes(mdpg, VM_PAGEMD_EXECPAGE);
315 1.2 matt }
316 1.2 matt pte &= ~PTE_UNSYNCED;
317 1.2 matt pte |= PTE_xX;
318 1.2 matt *ptep = pte;
319 1.8 matt
320 1.2 matt pmap_tlb_update_addr(faultmap->pmap, trunc_page(faultva),
321 1.2 matt pte, 0);
322 1.2 matt kpreempt_enable();
323 1.8 matt UVMHIST_LOG(pmapexechist, "<- 0", 0,0,0,0);
324 1.8 matt return 0;
325 1.2 matt }
326 1.2 matt kpreempt_enable();
327 1.2 matt
328 1.2 matt int rv = pagefault(faultmap, faultva, VM_PROT_READ|VM_PROT_EXECUTE,
329 1.2 matt usertrap);
330 1.2 matt
331 1.2 matt if (__predict_false(rv != 0 && usertrap)) {
332 1.2 matt ci->ci_ev_isi_fatal.ev_count++;
333 1.32 rin vm_signal(rv, EXC_ISI, tf->tf_srr0, ksi);
334 1.2 matt }
335 1.8 matt UVMHIST_LOG(pmapexechist, "<- %d", rv, 0,0,0);
336 1.2 matt return rv;
337 1.2 matt }
338 1.2 matt
339 1.2 matt static int
340 1.2 matt dtlb_exception(struct trapframe *tf, ksiginfo_t *ksi)
341 1.2 matt {
342 1.2 matt const vaddr_t faultva = tf->tf_dear;
343 1.2 matt const vm_prot_t ftype = get_faulttype(tf);
344 1.2 matt struct vm_map * const faultmap = get_faultmap(tf, PSL_DS);
345 1.2 matt struct cpu_info * const ci = curcpu();
346 1.2 matt const bool usertrap = usertrap_p(tf);
347 1.2 matt
348 1.2 matt #if 0
349 1.2 matt /*
350 1.2 matt * This is what pte_load in trap_subr.S does for us.
351 1.2 matt */
352 1.2 matt const pt_entry_t * const ptep =
353 1.2 matt trap_pte_lookup(tf, trunc_page(faultva), PSL_DS);
354 1.2 matt if (ptep != NULL && !usertrap && pte_valid_p(*ptep)) {
355 1.2 matt tlb_update_addr(trunc_page(faultva), KERNEL_PID, *ptep, true);
356 1.2 matt ci->ci_ev_tlbmiss_soft.ev_count++;
357 1.2 matt return 0;
358 1.2 matt }
359 1.2 matt #endif
360 1.2 matt
361 1.2 matt ci->ci_ev_dtlbmiss_hard.ev_count++;
362 1.2 matt
363 1.2 matt // printf("pagefault(%p,%#lx,%u,%u)", faultmap, faultva, ftype, usertrap);
364 1.2 matt int rv = pagefault(faultmap, faultva, ftype, usertrap);
365 1.2 matt // printf(": %d\n", rv);
366 1.2 matt
367 1.2 matt if (__predict_false(rv != 0 && usertrap)) {
368 1.2 matt ci->ci_ev_udsi_fatal.ev_count++;
369 1.32 rin vm_signal(rv, EXC_DSI, faultva, ksi);
370 1.2 matt }
371 1.2 matt return rv;
372 1.2 matt }
373 1.2 matt
374 1.2 matt static int
375 1.2 matt itlb_exception(struct trapframe *tf, ksiginfo_t *ksi)
376 1.2 matt {
377 1.2 matt struct vm_map * const faultmap = get_faultmap(tf, PSL_IS);
378 1.2 matt const vaddr_t faultva = tf->tf_srr0;
379 1.2 matt struct cpu_info * const ci = curcpu();
380 1.2 matt const bool usertrap = usertrap_p(tf);
381 1.2 matt
382 1.2 matt ci->ci_ev_itlbmiss_hard.ev_count++;
383 1.2 matt
384 1.2 matt int rv = pagefault(faultmap, faultva, VM_PROT_READ|VM_PROT_EXECUTE,
385 1.2 matt usertrap);
386 1.2 matt
387 1.2 matt if (__predict_false(rv != 0 && usertrap)) {
388 1.2 matt ci->ci_ev_isi_fatal.ev_count++;
389 1.32 rin vm_signal(rv, EXC_ISI, tf->tf_srr0, ksi);
390 1.2 matt }
391 1.2 matt return rv;
392 1.2 matt }
393 1.2 matt
394 1.2 matt static int
395 1.2 matt spe_exception(struct trapframe *tf, ksiginfo_t *ksi)
396 1.2 matt {
397 1.2 matt struct cpu_info * const ci = curcpu();
398 1.2 matt
399 1.2 matt if (!usertrap_p(tf))
400 1.2 matt return EPERM;
401 1.2 matt
402 1.2 matt ci->ci_ev_vec.ev_count++;
403 1.2 matt
404 1.2 matt #ifdef PPC_HAVE_SPE
405 1.6 matt vec_load();
406 1.2 matt return 0;
407 1.2 matt #else
408 1.2 matt KSI_INIT_TRAP(ksi);
409 1.2 matt ksi->ksi_signo = SIGILL;
410 1.2 matt ksi->ksi_trap = EXC_PGM;
411 1.2 matt ksi->ksi_code = ILL_ILLOPC;
412 1.2 matt ksi->ksi_addr = (void *)tf->tf_srr0;
413 1.2 matt return EPERM;
414 1.2 matt #endif
415 1.2 matt }
416 1.2 matt
417 1.2 matt static bool
418 1.2 matt emulate_opcode(struct trapframe *tf, ksiginfo_t *ksi)
419 1.2 matt {
420 1.2 matt uint32_t opcode;
421 1.2 matt if (copyin((void *)tf->tf_srr0, &opcode, sizeof(opcode)) != 0)
422 1.2 matt return false;
423 1.2 matt
424 1.2 matt if (opcode == OPC_LWSYNC)
425 1.2 matt return true;
426 1.2 matt
427 1.2 matt if (OPC_MFSPR_P(opcode, SPR_PVR)) {
428 1.2 matt __asm ("mfpvr %0" : "=r"(tf->tf_fixreg[OPC_MFSPR_REG(opcode)]));
429 1.2 matt return true;
430 1.2 matt }
431 1.2 matt
432 1.18 matt if (OPC_MFSPR_P(opcode, SPR_PIR)) {
433 1.25 matt __asm ("mfspr %0, %1"
434 1.25 matt : "=r"(tf->tf_fixreg[OPC_MFSPR_REG(opcode)])
435 1.26 joerg : "n"(SPR_PIR));
436 1.18 matt return true;
437 1.18 matt }
438 1.18 matt
439 1.18 matt if (OPC_MFSPR_P(opcode, SPR_SVR)) {
440 1.18 matt __asm ("mfspr %0,%1"
441 1.18 matt : "=r"(tf->tf_fixreg[OPC_MFSPR_REG(opcode)])
442 1.18 matt : "n"(SPR_SVR));
443 1.18 matt return true;
444 1.18 matt }
445 1.18 matt
446 1.34 rin return emulate_mxmsr(curlwp, tf, opcode);
447 1.2 matt }
448 1.2 matt
449 1.2 matt static int
450 1.2 matt pgm_exception(struct trapframe *tf, ksiginfo_t *ksi)
451 1.2 matt {
452 1.2 matt struct cpu_info * const ci = curcpu();
453 1.2 matt int rv = EPERM;
454 1.2 matt
455 1.2 matt if (!usertrap_p(tf))
456 1.2 matt return rv;
457 1.2 matt
458 1.8 matt UVMHIST_FUNC(__func__); UVMHIST_CALLED(pmapexechist);
459 1.8 matt
460 1.8 matt UVMHIST_LOG(pmapexechist, " srr0/1=%#x/%#x esr=%#x pte=%#x",
461 1.8 matt tf->tf_srr0, tf->tf_srr1, tf->tf_esr,
462 1.8 matt *trap_pte_lookup(tf, trunc_page(tf->tf_srr0), PSL_IS));
463 1.8 matt
464 1.2 matt ci->ci_ev_pgm.ev_count++;
465 1.2 matt
466 1.2 matt if (tf->tf_esr & ESR_PTR) {
467 1.2 matt struct proc *p = curlwp->l_proc;
468 1.2 matt if (p->p_raslist != NULL
469 1.2 matt && ras_lookup(p, (void *)tf->tf_srr0) != (void *) -1) {
470 1.2 matt tf->tf_srr0 += 4;
471 1.2 matt return 0;
472 1.2 matt }
473 1.5 matt }
474 1.5 matt
475 1.5 matt if (tf->tf_esr & (ESR_PIL|ESR_PPR)) {
476 1.2 matt if (emulate_opcode(tf, ksi)) {
477 1.2 matt tf->tf_srr0 += 4;
478 1.2 matt return 0;
479 1.2 matt }
480 1.2 matt }
481 1.2 matt
482 1.18 matt if (tf->tf_esr & ESR_PIL) {
483 1.33 rin struct lwp * const l = curlwp;
484 1.33 rin struct pcb * const pcb = lwp_getpcb(l);
485 1.33 rin
486 1.33 rin if (__predict_false(!fpu_used_p(l))) {
487 1.18 matt memset(&pcb->pcb_fpu, 0, sizeof(pcb->pcb_fpu));
488 1.33 rin fpu_mark_used(l);
489 1.18 matt }
490 1.18 matt if (fpu_emulate(tf, &pcb->pcb_fpu, ksi)) {
491 1.18 matt if (ksi->ksi_signo == 0) {
492 1.18 matt ci->ci_ev_fpu.ev_count++;
493 1.18 matt return 0;
494 1.18 matt }
495 1.18 matt return EFAULT;
496 1.18 matt }
497 1.18 matt }
498 1.18 matt
499 1.2 matt KSI_INIT_TRAP(ksi);
500 1.2 matt ksi->ksi_signo = SIGILL;
501 1.2 matt ksi->ksi_trap = EXC_PGM;
502 1.4 matt if (tf->tf_esr & ESR_PIL) {
503 1.2 matt ksi->ksi_code = ILL_ILLOPC;
504 1.4 matt } else if (tf->tf_esr & ESR_PPR) {
505 1.2 matt ksi->ksi_code = ILL_PRVOPC;
506 1.4 matt } else if (tf->tf_esr & ESR_PTR) {
507 1.4 matt ksi->ksi_signo = SIGTRAP;
508 1.4 matt ksi->ksi_code = TRAP_BRKPT;
509 1.4 matt } else {
510 1.2 matt ksi->ksi_code = 0;
511 1.4 matt }
512 1.2 matt ksi->ksi_addr = (void *)tf->tf_srr0;
513 1.2 matt return rv;
514 1.2 matt }
515 1.2 matt
516 1.2 matt static int
517 1.5 matt debug_exception(struct trapframe *tf, ksiginfo_t *ksi)
518 1.5 matt {
519 1.5 matt struct cpu_info * const ci = curcpu();
520 1.5 matt int rv = EPERM;
521 1.5 matt
522 1.5 matt if (!usertrap_p(tf))
523 1.5 matt return rv;
524 1.5 matt
525 1.5 matt ci->ci_ev_debug.ev_count++;
526 1.5 matt
527 1.5 matt /*
528 1.5 matt * Ack the interrupt.
529 1.5 matt */
530 1.5 matt mtspr(SPR_DBSR, tf->tf_esr);
531 1.25 matt KASSERT(tf->tf_esr & (DBSR_IAC1|DBSR_IAC2|DBSR_BRT));
532 1.5 matt KASSERT((tf->tf_srr1 & PSL_SE) == 0);
533 1.5 matt
534 1.5 matt /*
535 1.5 matt * Disable debug events
536 1.5 matt */
537 1.5 matt mtspr(SPR_DBCR1, 0);
538 1.5 matt mtspr(SPR_DBCR0, 0);
539 1.5 matt
540 1.5 matt /*
541 1.5 matt * Tell the debugger ...
542 1.5 matt */
543 1.5 matt KSI_INIT_TRAP(ksi);
544 1.5 matt ksi->ksi_signo = SIGTRAP;
545 1.5 matt ksi->ksi_trap = EXC_TRC;
546 1.5 matt ksi->ksi_addr = (void *)tf->tf_srr0;
547 1.5 matt ksi->ksi_code = TRAP_TRACE;
548 1.5 matt return rv;
549 1.5 matt }
550 1.5 matt
551 1.5 matt static int
552 1.2 matt ali_exception(struct trapframe *tf, ksiginfo_t *ksi)
553 1.2 matt {
554 1.2 matt struct cpu_info * const ci = curcpu();
555 1.2 matt int rv = EFAULT;
556 1.2 matt
557 1.2 matt ci->ci_ev_ali.ev_count++;
558 1.2 matt
559 1.2 matt if (rv != 0 && usertrap_p(tf)) {
560 1.2 matt ci->ci_ev_ali_fatal.ev_count++;
561 1.2 matt KSI_INIT_TRAP(ksi);
562 1.2 matt ksi->ksi_signo = SIGILL;
563 1.2 matt ksi->ksi_trap = EXC_PGM;
564 1.2 matt if (tf->tf_esr & ESR_PIL)
565 1.2 matt ksi->ksi_code = ILL_ILLOPC;
566 1.2 matt else if (tf->tf_esr & ESR_PPR)
567 1.2 matt ksi->ksi_code = ILL_PRVOPC;
568 1.2 matt else if (tf->tf_esr & ESR_PTR)
569 1.2 matt ksi->ksi_code = ILL_ILLTRP;
570 1.2 matt else
571 1.2 matt ksi->ksi_code = 0;
572 1.2 matt ksi->ksi_addr = (void *)tf->tf_srr0;
573 1.2 matt }
574 1.2 matt return rv;
575 1.2 matt }
576 1.2 matt
577 1.2 matt static int
578 1.2 matt embedded_fp_data_exception(struct trapframe *tf, ksiginfo_t *ksi)
579 1.2 matt {
580 1.2 matt struct cpu_info * const ci = curcpu();
581 1.2 matt int rv = EFAULT;
582 1.2 matt
583 1.2 matt ci->ci_ev_fpu.ev_count++;
584 1.2 matt
585 1.2 matt if (rv != 0 && usertrap_p(tf)) {
586 1.2 matt KSI_INIT_TRAP(ksi);
587 1.2 matt #ifdef PPC_HAVE_SPE
588 1.2 matt ksi->ksi_signo = SIGFPE;
589 1.2 matt ksi->ksi_trap = tf->tf_exc;
590 1.2 matt ksi->ksi_code = vec_siginfo_code(tf);
591 1.2 matt #else
592 1.2 matt ksi->ksi_signo = SIGILL;
593 1.2 matt ksi->ksi_trap = EXC_PGM;
594 1.2 matt ksi->ksi_code = ILL_ILLOPC;
595 1.2 matt #endif
596 1.2 matt ksi->ksi_addr = (void *)tf->tf_srr0;
597 1.2 matt }
598 1.2 matt return rv;
599 1.2 matt }
600 1.2 matt
601 1.2 matt static int
602 1.2 matt embedded_fp_round_exception(struct trapframe *tf, ksiginfo_t *ksi)
603 1.2 matt {
604 1.2 matt struct cpu_info * const ci = curcpu();
605 1.2 matt int rv = EDOM;
606 1.2 matt
607 1.2 matt ci->ci_ev_fpu.ev_count++;
608 1.2 matt
609 1.2 matt if (rv != 0 && usertrap_p(tf)) {
610 1.2 matt KSI_INIT_TRAP(ksi);
611 1.2 matt #ifdef PPC_HAVE_SPE
612 1.2 matt ksi->ksi_signo = SIGFPE;
613 1.2 matt ksi->ksi_trap = tf->tf_exc;
614 1.2 matt ksi->ksi_code = vec_siginfo_code(tf);
615 1.2 matt #else
616 1.2 matt ksi->ksi_signo = SIGILL;
617 1.2 matt ksi->ksi_trap = EXC_PGM;
618 1.2 matt ksi->ksi_code = ILL_ILLOPC;
619 1.2 matt #endif
620 1.2 matt ksi->ksi_addr = (void *)tf->tf_srr0;
621 1.2 matt }
622 1.2 matt return rv;
623 1.2 matt }
624 1.2 matt
625 1.19 matt void
626 1.20 matt dump_trapframe(const struct trapframe *tf, void (*pr)(const char *, ...))
627 1.2 matt {
628 1.20 matt if (pr == NULL)
629 1.20 matt pr = printf;
630 1.20 matt (*pr)("trapframe %p (exc=%x srr0/1=%#lx/%#lx esr/dear=%#x/%#lx)\n",
631 1.2 matt tf, tf->tf_exc, tf->tf_srr0, tf->tf_srr1, tf->tf_esr, tf->tf_dear);
632 1.20 matt (*pr)("lr =%08lx ctr=%08lx cr =%08x xer=%08x\n",
633 1.2 matt tf->tf_lr, tf->tf_ctr, tf->tf_cr, tf->tf_xer);
634 1.2 matt for (u_int r = 0; r < 32; r += 4) {
635 1.20 matt (*pr)("r%02u=%08lx r%02u=%08lx r%02u=%08lx r%02u=%08lx\n",
636 1.2 matt r+0, tf->tf_fixreg[r+0], r+1, tf->tf_fixreg[r+1],
637 1.2 matt r+2, tf->tf_fixreg[r+2], r+3, tf->tf_fixreg[r+3]);
638 1.2 matt }
639 1.2 matt }
640 1.20 matt
641 1.2 matt static bool
642 1.2 matt ddb_exception(struct trapframe *tf)
643 1.2 matt {
644 1.2 matt #if 0
645 1.2 matt const register_t ddb_trapfunc = (uintptr_t) cpu_Debugger;
646 1.2 matt if ((tf->tf_esr & ESR_PTR) == 0)
647 1.2 matt return false;
648 1.2 matt if (ddb_trapfunc <= tf->tf_srr0 && tf->tf_srr0 <= ddb_trapfunc+16) {
649 1.2 matt register_t srr0 = tf->tf_srr0;
650 1.2 matt if (kdb_trap(tf->tf_exc, tf)) {
651 1.2 matt if (srr0 == tf->tf_srr0)
652 1.2 matt tf->tf_srr0 += 4;
653 1.2 matt return true;
654 1.2 matt }
655 1.2 matt }
656 1.2 matt return false;
657 1.2 matt #else
658 1.5 matt #if 0
659 1.2 matt struct cpu_info * const ci = curcpu();
660 1.2 matt struct cpu_softc * const cpu = ci->ci_softc;
661 1.2 matt printf("CPL stack:");
662 1.2 matt if (ci->ci_idepth >= 0) {
663 1.2 matt for (u_int i = 0; i <= ci->ci_idepth; i++) {
664 1.2 matt printf(" [%u]=%u", i, cpu->cpu_pcpls[i]);
665 1.2 matt }
666 1.2 matt }
667 1.2 matt printf(" %u\n", ci->ci_cpl);
668 1.20 matt dump_trapframe(tf, NULL);
669 1.5 matt #endif
670 1.2 matt if (kdb_trap(tf->tf_exc, tf)) {
671 1.2 matt tf->tf_srr0 += 4;
672 1.2 matt return true;
673 1.2 matt }
674 1.2 matt return false;
675 1.2 matt #endif
676 1.2 matt }
677 1.2 matt
678 1.2 matt static bool
679 1.2 matt onfaulted(struct trapframe *tf, register_t rv)
680 1.2 matt {
681 1.2 matt struct lwp * const l = curlwp;
682 1.2 matt struct pcb * const pcb = lwp_getpcb(l);
683 1.2 matt struct faultbuf * const fb = pcb->pcb_onfault;
684 1.2 matt if (fb == NULL)
685 1.2 matt return false;
686 1.2 matt tf->tf_srr0 = fb->fb_pc;
687 1.2 matt tf->tf_srr1 = fb->fb_msr;
688 1.2 matt tf->tf_cr = fb->fb_cr;
689 1.2 matt tf->tf_fixreg[1] = fb->fb_sp;
690 1.2 matt tf->tf_fixreg[2] = fb->fb_r2;
691 1.2 matt tf->tf_fixreg[3] = rv;
692 1.30 rin memcpy(&tf->tf_fixreg[13], fb->fb_fixreg, sizeof(fb->fb_fixreg));
693 1.2 matt return true;
694 1.2 matt }
695 1.2 matt
696 1.2 matt void
697 1.2 matt trap(enum ppc_booke_exceptions trap_code, struct trapframe *tf)
698 1.2 matt {
699 1.2 matt const bool usertrap = usertrap_p(tf);
700 1.2 matt struct cpu_info * const ci = curcpu();
701 1.2 matt struct lwp * const l = curlwp;
702 1.2 matt struct proc * const p = l->l_proc;
703 1.2 matt ksiginfo_t ksi;
704 1.2 matt int rv = EACCES;
705 1.2 matt
706 1.2 matt ci->ci_ev_traps.ev_count++;
707 1.2 matt ci->ci_data.cpu_ntrap++;
708 1.2 matt
709 1.2 matt KASSERTMSG(!usertrap || tf == trapframe(l),
710 1.13 jym "trap: tf=%p is invalid: trapframe(%p)=%p", tf, l, trapframe(l));
711 1.2 matt
712 1.2 matt #if 0
713 1.2 matt if (trap_code != T_PROGRAM || usertrap)
714 1.2 matt printf("trap(enter): %s (tf=%p, esr/dear=%#x/%#lx, srr0/1=%#lx/%#lx, lr=%#lx)\n",
715 1.2 matt trap_names[trap_code], tf, tf->tf_esr, tf->tf_dear,
716 1.2 matt tf->tf_srr0, tf->tf_srr1, tf->tf_lr);
717 1.2 matt #endif
718 1.2 matt #if 0
719 1.2 matt if ((register_t)tf >= (register_t)l->l_addr + USPACE
720 1.2 matt || (register_t)tf < (register_t)l->l_addr + PAGE_SIZE) {
721 1.2 matt printf("%s(entry): pid %d.%d (%s): invalid tf addr %p\n",
722 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm, tf);
723 1.20 matt dump_trapframe(tf, NULL);
724 1.2 matt Debugger();
725 1.2 matt }
726 1.2 matt #endif
727 1.2 matt #if 0
728 1.2 matt if ((mfmsr() & PSL_CE) == 0) {
729 1.2 matt printf("%s(entry): pid %d.%d (%s): %s: PSL_CE (%#lx) not set\n",
730 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
731 1.2 matt trap_names[trap_code], mfmsr());
732 1.20 matt dump_trapframe(tf, NULL);
733 1.2 matt }
734 1.2 matt #endif
735 1.2 matt
736 1.15 matt if ((VM_MAX_ADDRESS & 0x80000000) == 0
737 1.15 matt && usertrap && (tf->tf_fixreg[1] & 0x80000000)) {
738 1.27 flxd printf("%s(entry): pid %d.%d (%s): %s invalid sp %#lx "
739 1.27 flxd "(sprg1=%#jx)\n", __func__, p->p_pid, l->l_lid, p->p_comm,
740 1.27 flxd trap_names[trap_code], tf->tf_fixreg[1],
741 1.27 flxd (uintmax_t)mfspr(SPR_SPRG1));
742 1.20 matt dump_trapframe(tf, NULL);
743 1.2 matt Debugger();
744 1.2 matt }
745 1.2 matt
746 1.2 matt if (usertrap && (tf->tf_srr1 & (PSL_DS|PSL_IS)) != (PSL_DS|PSL_IS)) {
747 1.2 matt printf("%s(entry): pid %d.%d (%s): %s invalid PSL %#lx\n",
748 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
749 1.2 matt trap_names[trap_code], tf->tf_srr1);
750 1.20 matt dump_trapframe(tf, NULL);
751 1.2 matt Debugger();
752 1.2 matt }
753 1.2 matt
754 1.2 matt switch (trap_code) {
755 1.2 matt case T_CRITIAL_INPUT:
756 1.2 matt case T_EXTERNAL_INPUT:
757 1.2 matt case T_DECREMENTER:
758 1.2 matt case T_FIXED_INTERVAL:
759 1.2 matt case T_WATCHDOG:
760 1.2 matt case T_SYSTEM_CALL:
761 1.2 matt default:
762 1.2 matt panic("trap: unexcepted trap code %d! (tf=%p, srr0/1=%#lx/%#lx)",
763 1.2 matt trap_code, tf, tf->tf_srr0, tf->tf_srr1);
764 1.2 matt case T_MACHINE_CHECK:
765 1.2 matt rv = mchk_exception(tf, &ksi);
766 1.2 matt break;
767 1.2 matt case T_DSI:
768 1.2 matt rv = dsi_exception(tf, &ksi);
769 1.2 matt break;
770 1.2 matt case T_ISI:
771 1.2 matt rv = isi_exception(tf, &ksi);
772 1.2 matt break;
773 1.2 matt case T_ALIGNMENT:
774 1.2 matt rv = ali_exception(tf, &ksi);
775 1.2 matt break;
776 1.2 matt case T_SPE_UNAVAILABLE:
777 1.2 matt rv = spe_exception(tf, &ksi);
778 1.2 matt break;
779 1.2 matt case T_PROGRAM:
780 1.2 matt #ifdef DDB
781 1.2 matt if (!usertrap && ddb_exception(tf))
782 1.2 matt return;
783 1.2 matt #endif
784 1.2 matt rv = pgm_exception(tf, &ksi);
785 1.2 matt break;
786 1.2 matt case T_FP_UNAVAILABLE:
787 1.2 matt case T_AP_UNAVAILABLE:
788 1.2 matt panic("trap: unexcepted trap code %d! (tf=%p, srr0/1=%#lx/%#lx)",
789 1.2 matt trap_code, tf, tf->tf_srr0, tf->tf_srr1);
790 1.2 matt case T_DATA_TLB_ERROR:
791 1.2 matt rv = dtlb_exception(tf, &ksi);
792 1.2 matt break;
793 1.2 matt case T_INSTRUCTION_TLB_ERROR:
794 1.2 matt rv = itlb_exception(tf, &ksi);
795 1.2 matt break;
796 1.2 matt case T_DEBUG:
797 1.5 matt #ifdef DDB
798 1.5 matt if (!usertrap && ddb_exception(tf))
799 1.5 matt return;
800 1.5 matt #endif
801 1.5 matt rv = debug_exception(tf, &ksi);
802 1.5 matt break;
803 1.2 matt case T_EMBEDDED_FP_DATA:
804 1.2 matt rv = embedded_fp_data_exception(tf, &ksi);
805 1.2 matt break;
806 1.2 matt case T_EMBEDDED_FP_ROUND:
807 1.2 matt rv = embedded_fp_round_exception(tf, &ksi);
808 1.2 matt break;
809 1.2 matt case T_EMBEDDED_PERF_MONITOR:
810 1.2 matt //db_stack_trace_print(tf->tf_fixreg[1], true, 40, "", printf);
811 1.20 matt dump_trapframe(tf, NULL);
812 1.2 matt rv = EPERM;
813 1.2 matt break;
814 1.2 matt case T_AST:
815 1.2 matt KASSERT(usertrap);
816 1.12 matt cpu_ast(l, ci);
817 1.15 matt if ((VM_MAX_ADDRESS & 0x80000000) == 0
818 1.15 matt && (tf->tf_fixreg[1] & 0x80000000)) {
819 1.2 matt printf("%s(ast-exit): pid %d.%d (%s): invalid sp %#lx\n",
820 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
821 1.2 matt tf->tf_fixreg[1]);
822 1.20 matt dump_trapframe(tf, NULL);
823 1.2 matt Debugger();
824 1.2 matt }
825 1.2 matt if ((tf->tf_srr1 & (PSL_DS|PSL_IS)) != (PSL_DS|PSL_IS)) {
826 1.2 matt printf("%s(entry): pid %d.%d (%s): %s invalid PSL %#lx\n",
827 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
828 1.2 matt trap_names[trap_code], tf->tf_srr1);
829 1.20 matt dump_trapframe(tf, NULL);
830 1.2 matt Debugger();
831 1.2 matt }
832 1.2 matt #if 0
833 1.2 matt if ((mfmsr() & PSL_CE) == 0) {
834 1.2 matt printf("%s(exit): pid %d.%d (%s): %s: PSL_CE (%#lx) not set\n",
835 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
836 1.2 matt trap_names[trap_code], mfmsr());
837 1.20 matt dump_trapframe(tf, NULL);
838 1.2 matt }
839 1.2 matt #endif
840 1.2 matt userret(l, tf);
841 1.2 matt return;
842 1.2 matt }
843 1.2 matt if (!usertrap) {
844 1.2 matt if (rv != 0) {
845 1.2 matt if (!onfaulted(tf, rv)) {
846 1.2 matt db_stack_trace_print(tf->tf_fixreg[1], true, 40, "", printf);
847 1.20 matt dump_trapframe(tf, NULL);
848 1.2 matt panic("%s: pid %d.%d (%s): %s exception in kernel mode"
849 1.2 matt " (tf=%p, dear=%#lx, esr=%#x,"
850 1.2 matt " srr0/1=%#lx/%#lx)",
851 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
852 1.2 matt trap_names[trap_code], tf, tf->tf_dear,
853 1.2 matt tf->tf_esr, tf->tf_srr0, tf->tf_srr1);
854 1.2 matt }
855 1.2 matt }
856 1.2 matt #if 0
857 1.2 matt if (tf->tf_fixreg[1] >= (register_t)l->l_addr + USPACE
858 1.2 matt || tf->tf_fixreg[1] < (register_t)l->l_addr + PAGE_SIZE) {
859 1.2 matt printf("%s(exit): pid %d.%d (%s): invalid kern sp %#lx\n",
860 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
861 1.2 matt tf->tf_fixreg[1]);
862 1.20 matt dump_trapframe(tf, NULL);
863 1.2 matt Debugger();
864 1.2 matt }
865 1.2 matt #endif
866 1.2 matt #if 0
867 1.2 matt if ((mfmsr() & PSL_CE) == 0) {
868 1.2 matt printf("%s(exit): pid %d.%d (%s): %s: PSL_CE (%#lx) not set\n",
869 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
870 1.2 matt trap_names[trap_code], mfmsr());
871 1.2 matt mtmsr(mfmsr()|PSL_CE);
872 1.20 matt dump_trapframe(tf, NULL);
873 1.2 matt }
874 1.2 matt #endif
875 1.2 matt } else {
876 1.2 matt if (rv == ENOMEM) {
877 1.2 matt printf("UVM: pid %d.%d (%s), uid %d killed: "
878 1.2 matt "out of swap\n",
879 1.2 matt p->p_pid, l->l_lid, p->p_comm,
880 1.2 matt l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
881 1.2 matt ksi.ksi_signo = SIGKILL;
882 1.32 rin ksi.ksi_code = 0;
883 1.2 matt }
884 1.2 matt if (rv != 0) {
885 1.21 matt /*
886 1.21 matt * Only print a fatal trap if the signal will be
887 1.21 matt * uncaught.
888 1.21 matt */
889 1.21 matt if (cpu_printfataltraps
890 1.22 matt && (p->p_slflag & PSL_TRACED) == 0
891 1.21 matt && !sigismember(&p->p_sigctx.ps_sigcatch,
892 1.21 matt ksi.ksi_signo)) {
893 1.2 matt printf("%s: pid %d.%d (%s):"
894 1.2 matt " %s exception in user mode\n",
895 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
896 1.2 matt trap_names[trap_code]);
897 1.2 matt if (cpu_printfataltraps > 1)
898 1.20 matt dump_trapframe(tf, NULL);
899 1.2 matt }
900 1.2 matt (*p->p_emul->e_trapsignal)(l, &ksi);
901 1.2 matt }
902 1.2 matt #ifdef DEBUG
903 1.2 matt if ((tf->tf_srr1 & (PSL_DS|PSL_IS)) != (PSL_DS|PSL_IS)) {
904 1.2 matt printf("%s(exit): pid %d.%d (%s): %s invalid PSL %#lx\n",
905 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
906 1.2 matt trap_names[trap_code], tf->tf_srr1);
907 1.20 matt dump_trapframe(tf, NULL);
908 1.2 matt Debugger();
909 1.2 matt }
910 1.2 matt #endif
911 1.2 matt #if 0
912 1.2 matt if ((mfmsr() & PSL_CE) == 0) {
913 1.2 matt printf("%s(exit): pid %d.%d (%s): %s: PSL_CE (%#lx) not set\n",
914 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
915 1.2 matt trap_names[trap_code], mfmsr());
916 1.20 matt dump_trapframe(tf, NULL);
917 1.2 matt }
918 1.2 matt #endif
919 1.2 matt userret(l, tf);
920 1.2 matt }
921 1.2 matt }
922