trap.c revision 1.38 1 1.38 skrll /* $NetBSD: trap.c,v 1.38 2022/09/25 06:21:58 skrll Exp $ */
2 1.2 matt /*-
3 1.2 matt * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc.
4 1.2 matt * All rights reserved.
5 1.2 matt *
6 1.2 matt * This code is derived from software contributed to The NetBSD Foundation
7 1.2 matt * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects
8 1.2 matt * Agency and which was developed by Matt Thomas of 3am Software Foundry.
9 1.2 matt *
10 1.2 matt * This material is based upon work supported by the Defense Advanced Research
11 1.2 matt * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under
12 1.2 matt * Contract No. N66001-09-C-2073.
13 1.2 matt * Approved for Public Release, Distribution Unlimited
14 1.2 matt *
15 1.2 matt * Redistribution and use in source and binary forms, with or without
16 1.2 matt * modification, are permitted provided that the following conditions
17 1.2 matt * are met:
18 1.2 matt * 1. Redistributions of source code must retain the above copyright
19 1.2 matt * notice, this list of conditions and the following disclaimer.
20 1.2 matt * 2. Redistributions in binary form must reproduce the above copyright
21 1.2 matt * notice, this list of conditions and the following disclaimer in the
22 1.2 matt * documentation and/or other materials provided with the distribution.
23 1.2 matt *
24 1.2 matt * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
25 1.2 matt * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
26 1.2 matt * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
27 1.2 matt * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
28 1.2 matt * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
29 1.2 matt * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
30 1.2 matt * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
31 1.2 matt * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
32 1.2 matt * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
33 1.2 matt * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
34 1.2 matt * POSSIBILITY OF SUCH DAMAGE.
35 1.2 matt */
36 1.2 matt
37 1.2 matt #include <sys/cdefs.h>
38 1.38 skrll __KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.38 2022/09/25 06:21:58 skrll Exp $");
39 1.2 matt
40 1.28 rin #ifdef _KERNEL_OPT
41 1.29 rin #include "opt_altivec.h"
42 1.28 rin #include "opt_ddb.h"
43 1.28 rin #endif
44 1.2 matt
45 1.2 matt #include <sys/param.h>
46 1.36 rin #include <sys/cpu.h>
47 1.36 rin #include <sys/kauth.h>
48 1.2 matt #include <sys/lwp.h>
49 1.2 matt #include <sys/proc.h>
50 1.37 rin #include <sys/ptrace.h>
51 1.2 matt #include <sys/ras.h>
52 1.36 rin #include <sys/siginfo.h>
53 1.36 rin #include <sys/systm.h>
54 1.36 rin
55 1.36 rin #include <ddb/ddb.h>
56 1.2 matt
57 1.2 matt #include <uvm/uvm_extern.h>
58 1.2 matt
59 1.36 rin #include <powerpc/altivec.h> /* use same interface for SPE */
60 1.36 rin #include <powerpc/instr.h>
61 1.2 matt #include <powerpc/pcb.h>
62 1.2 matt #include <powerpc/psl.h>
63 1.2 matt #include <powerpc/spr.h>
64 1.36 rin #include <powerpc/trap.h>
65 1.36 rin #include <powerpc/userret.h>
66 1.2 matt
67 1.18 matt #include <powerpc/fpu/fpu_extern.h>
68 1.18 matt
69 1.36 rin #include <powerpc/booke/cpuvar.h>
70 1.36 rin #include <powerpc/booke/pte.h>
71 1.36 rin #include <powerpc/booke/spr.h>
72 1.2 matt #include <powerpc/booke/trap.h>
73 1.2 matt
74 1.2 matt void trap(enum ppc_booke_exceptions, struct trapframe *);
75 1.2 matt
76 1.2 matt static const char trap_names[][8] = {
77 1.2 matt [T_CRITIAL_INPUT] = "CRIT",
78 1.2 matt [T_EXTERNAL_INPUT] = "EXT",
79 1.2 matt [T_DECREMENTER] = "DECR",
80 1.2 matt [T_FIXED_INTERVAL] = "FIT",
81 1.2 matt [T_WATCHDOG] = "WDOG",
82 1.2 matt [T_SYSTEM_CALL] = "SC",
83 1.2 matt [T_MACHINE_CHECK] = "MCHK",
84 1.2 matt [T_DSI] = "DSI",
85 1.2 matt [T_ISI] = "ISI",
86 1.2 matt [T_ALIGNMENT] = "ALN",
87 1.2 matt [T_PROGRAM] = "PGM",
88 1.2 matt [T_FP_UNAVAILABLE] = "FP",
89 1.2 matt [T_AP_UNAVAILABLE] = "AP",
90 1.2 matt [T_DATA_TLB_ERROR] = "DTLB",
91 1.2 matt [T_INSTRUCTION_TLB_ERROR] = "ITLB",
92 1.2 matt [T_DEBUG] = "DEBUG",
93 1.2 matt [T_SPE_UNAVAILABLE] = "SPE",
94 1.2 matt [T_EMBEDDED_FP_DATA] = "FPDATA",
95 1.2 matt [T_EMBEDDED_FP_ROUND] = "FPROUND",
96 1.2 matt [T_EMBEDDED_PERF_MONITOR] = "PERFMON",
97 1.2 matt [T_AST] = "AST",
98 1.2 matt };
99 1.2 matt
100 1.2 matt static inline bool
101 1.2 matt usertrap_p(struct trapframe *tf)
102 1.2 matt {
103 1.2 matt return (tf->tf_srr1 & PSL_PR) != 0;
104 1.2 matt }
105 1.2 matt
106 1.2 matt static int
107 1.2 matt mchk_exception(struct trapframe *tf, ksiginfo_t *ksi)
108 1.2 matt {
109 1.2 matt const bool usertrap = usertrap_p(tf);
110 1.2 matt const vaddr_t faultva = tf->tf_mcar;
111 1.2 matt struct cpu_info * const ci = curcpu();
112 1.2 matt int rv = EFAULT;
113 1.2 matt
114 1.32 rin if (usertrap) {
115 1.2 matt ci->ci_ev_umchk.ev_count++;
116 1.2 matt KSI_INIT_TRAP(ksi);
117 1.32 rin ksi->ksi_signo = SIGBUS;
118 1.32 rin ksi->ksi_trap = EXC_MCHK;
119 1.2 matt ksi->ksi_addr = (void *)faultva;
120 1.32 rin ksi->ksi_code = BUS_OBJERR;
121 1.2 matt }
122 1.2 matt
123 1.2 matt return rv;
124 1.2 matt }
125 1.2 matt
126 1.2 matt static inline vm_prot_t
127 1.2 matt get_faulttype(const struct trapframe * const tf)
128 1.2 matt {
129 1.2 matt return VM_PROT_READ | (tf->tf_esr & ESR_ST ? VM_PROT_WRITE : 0);
130 1.2 matt }
131 1.2 matt
132 1.2 matt static inline struct vm_map *
133 1.2 matt get_faultmap(const struct trapframe * const tf, register_t psl_mask)
134 1.2 matt {
135 1.2 matt return (tf->tf_srr1 & psl_mask)
136 1.2 matt ? &curlwp->l_proc->p_vmspace->vm_map
137 1.2 matt : kernel_map;
138 1.2 matt }
139 1.2 matt
140 1.2 matt /*
141 1.17 matt * We could use pmap_pte_lookup but this slightly faster since we already
142 1.2 matt * the segtab pointers in cpu_info.
143 1.2 matt */
144 1.2 matt static inline pt_entry_t *
145 1.2 matt trap_pte_lookup(struct trapframe *tf, vaddr_t va, register_t psl_mask)
146 1.2 matt {
147 1.38 skrll pmap_segtab_t ** const stbs = &curcpu()->ci_pmap_kern_segtab;
148 1.38 skrll pmap_segtab_t * const stb = stbs[(tf->tf_srr1 / psl_mask) & 1];
149 1.38 skrll if (__predict_false(stb == NULL))
150 1.2 matt return NULL;
151 1.38 skrll pt_entry_t * const ptep = stb->seg_tab[va >> SEGSHIFT];
152 1.2 matt if (__predict_false(ptep == NULL))
153 1.2 matt return NULL;
154 1.2 matt return ptep + ((va & SEGOFSET) >> PAGE_SHIFT);
155 1.2 matt }
156 1.2 matt
157 1.2 matt static int
158 1.2 matt pagefault(struct vm_map *map, vaddr_t va, vm_prot_t ftype, bool usertrap)
159 1.2 matt {
160 1.2 matt struct lwp * const l = curlwp;
161 1.2 matt int rv;
162 1.2 matt
163 1.2 matt // printf("%s(%p,%#lx,%u,%u)\n", __func__, map, va, ftype, usertrap);
164 1.2 matt
165 1.2 matt if (usertrap) {
166 1.2 matt rv = uvm_fault(map, trunc_page(va), ftype);
167 1.2 matt if (rv == 0)
168 1.2 matt uvm_grow(l->l_proc, trunc_page(va));
169 1.2 matt } else {
170 1.2 matt if (cpu_intr_p())
171 1.2 matt return EFAULT;
172 1.2 matt
173 1.2 matt struct pcb * const pcb = lwp_getpcb(l);
174 1.2 matt struct faultbuf * const fb = pcb->pcb_onfault;
175 1.2 matt pcb->pcb_onfault = NULL;
176 1.2 matt rv = uvm_fault(map, trunc_page(va), ftype);
177 1.2 matt pcb->pcb_onfault = fb;
178 1.2 matt if (map != kernel_map) {
179 1.2 matt if (rv == 0)
180 1.2 matt uvm_grow(l->l_proc, trunc_page(va));
181 1.2 matt }
182 1.2 matt }
183 1.2 matt return rv;
184 1.2 matt }
185 1.2 matt
186 1.32 rin static void
187 1.32 rin vm_signal(int error, int trap, vaddr_t addr, ksiginfo_t *ksi)
188 1.32 rin {
189 1.32 rin
190 1.32 rin KSI_INIT_TRAP(ksi);
191 1.32 rin switch (error) {
192 1.32 rin case EINVAL:
193 1.32 rin ksi->ksi_signo = SIGBUS;
194 1.32 rin ksi->ksi_code = BUS_ADRERR;
195 1.32 rin break;
196 1.32 rin case EACCES:
197 1.32 rin ksi->ksi_signo = SIGSEGV;
198 1.32 rin ksi->ksi_code = SEGV_ACCERR;
199 1.32 rin break;
200 1.32 rin default:
201 1.32 rin ksi->ksi_signo = SIGSEGV;
202 1.32 rin ksi->ksi_code = SEGV_MAPERR;
203 1.32 rin break;
204 1.32 rin }
205 1.32 rin ksi->ksi_trap = trap;
206 1.32 rin ksi->ksi_addr = (void *)addr;
207 1.32 rin }
208 1.32 rin
209 1.2 matt static int
210 1.2 matt dsi_exception(struct trapframe *tf, ksiginfo_t *ksi)
211 1.2 matt {
212 1.2 matt const vaddr_t faultva = tf->tf_dear;
213 1.2 matt const vm_prot_t ftype = get_faulttype(tf);
214 1.2 matt struct vm_map * const faultmap = get_faultmap(tf, PSL_DS);
215 1.2 matt const bool usertrap = usertrap_p(tf);
216 1.2 matt
217 1.2 matt kpreempt_disable();
218 1.2 matt struct cpu_info * const ci = curcpu();
219 1.2 matt
220 1.2 matt if (usertrap)
221 1.2 matt ci->ci_ev_udsi.ev_count++;
222 1.2 matt else
223 1.2 matt ci->ci_ev_kdsi.ev_count++;
224 1.2 matt
225 1.2 matt /*
226 1.2 matt * If we had a TLB entry (which we must have had to get this exception),
227 1.2 matt * we certainly have a PTE.
228 1.2 matt */
229 1.2 matt pt_entry_t * const ptep = trap_pte_lookup(tf, trunc_page(faultva),
230 1.2 matt PSL_DS);
231 1.2 matt KASSERT(ptep != NULL);
232 1.2 matt pt_entry_t pte = *ptep;
233 1.2 matt
234 1.2 matt if ((ftype & VM_PROT_WRITE)
235 1.2 matt && ((pte & (PTE_xW|PTE_UNMODIFIED)) == (PTE_xW|PTE_UNMODIFIED))) {
236 1.2 matt const paddr_t pa = pte_to_paddr(pte);
237 1.2 matt struct vm_page * const pg = PHYS_TO_VM_PAGE(pa);
238 1.2 matt KASSERT(pg);
239 1.11 matt struct vm_page_md * const mdpg = VM_PAGE_TO_MD(pg);
240 1.2 matt
241 1.11 matt if (!VM_PAGEMD_MODIFIED_P(mdpg)) {
242 1.11 matt pmap_page_set_attributes(mdpg, VM_PAGEMD_MODIFIED);
243 1.2 matt }
244 1.2 matt pte &= ~PTE_UNMODIFIED;
245 1.2 matt *ptep = pte;
246 1.2 matt pmap_tlb_update_addr(faultmap->pmap, trunc_page(faultva),
247 1.2 matt pte, 0);
248 1.2 matt kpreempt_enable();
249 1.2 matt return 0;
250 1.2 matt }
251 1.2 matt kpreempt_enable();
252 1.2 matt
253 1.2 matt int rv = pagefault(faultmap, faultva, ftype, usertrap);
254 1.2 matt
255 1.2 matt if (__predict_false(rv != 0 && usertrap)) {
256 1.2 matt ci->ci_ev_udsi_fatal.ev_count++;
257 1.32 rin vm_signal(rv, EXC_DSI, faultva, ksi);
258 1.2 matt }
259 1.2 matt return rv;
260 1.2 matt }
261 1.2 matt
262 1.2 matt static int
263 1.2 matt isi_exception(struct trapframe *tf, ksiginfo_t *ksi)
264 1.2 matt {
265 1.2 matt const vaddr_t faultva = trunc_page(tf->tf_srr0);
266 1.2 matt struct vm_map * const faultmap = get_faultmap(tf, PSL_IS);
267 1.2 matt const bool usertrap = usertrap_p(tf);
268 1.2 matt
269 1.2 matt kpreempt_disable();
270 1.2 matt struct cpu_info * const ci = curcpu();
271 1.2 matt
272 1.2 matt if (usertrap)
273 1.2 matt ci->ci_ev_isi.ev_count++;
274 1.2 matt else
275 1.2 matt ci->ci_ev_kisi.ev_count++;
276 1.2 matt
277 1.2 matt /*
278 1.2 matt * If we had a TLB entry (which we must have had to get this exception),
279 1.2 matt * we certainly have a PTE.
280 1.2 matt */
281 1.2 matt pt_entry_t * const ptep = trap_pte_lookup(tf, trunc_page(faultva),
282 1.2 matt PSL_IS);
283 1.2 matt if (ptep == NULL)
284 1.20 matt dump_trapframe(tf, NULL);
285 1.2 matt KASSERT(ptep != NULL);
286 1.2 matt pt_entry_t pte = *ptep;
287 1.2 matt
288 1.8 matt UVMHIST_FUNC(__func__); UVMHIST_CALLED(pmapexechist);
289 1.8 matt
290 1.2 matt if ((pte & PTE_UNSYNCED) == PTE_UNSYNCED) {
291 1.2 matt const paddr_t pa = pte_to_paddr(pte);
292 1.2 matt struct vm_page * const pg = PHYS_TO_VM_PAGE(pa);
293 1.2 matt KASSERT(pg);
294 1.11 matt struct vm_page_md * const mdpg = VM_PAGE_TO_MD(pg);
295 1.2 matt
296 1.35 rin #ifdef UVMHIST
297 1.35 rin if (VM_PAGEMD_EXECPAGE_P(mdpg))
298 1.35 rin UVMHIST_LOG(pmapexechist,
299 1.35 rin "srr0=%#x pg=%p (pa %#"PRIxPADDR"): "
300 1.35 rin "no syncicache (already execpage)",
301 1.35 rin tf->tf_srr0, (uintptr_t)pg, pa, 0);
302 1.35 rin else
303 1.35 rin UVMHIST_LOG(pmapexechist,
304 1.35 rin "srr0=%#x pg=%p (pa %#"PRIxPADDR"): "
305 1.35 rin "performed syncicache (now execpage)",
306 1.35 rin tf->tf_srr0, (uintptr_t)pg, pa, 0);
307 1.35 rin #endif
308 1.8 matt
309 1.11 matt if (!VM_PAGEMD_EXECPAGE_P(mdpg)) {
310 1.2 matt ci->ci_softc->cpu_ev_exec_trap_sync.ev_count++;
311 1.2 matt dcache_wb_page(pa);
312 1.2 matt icache_inv_page(pa);
313 1.11 matt pmap_page_set_attributes(mdpg, VM_PAGEMD_EXECPAGE);
314 1.2 matt }
315 1.2 matt pte &= ~PTE_UNSYNCED;
316 1.2 matt pte |= PTE_xX;
317 1.2 matt *ptep = pte;
318 1.8 matt
319 1.2 matt pmap_tlb_update_addr(faultmap->pmap, trunc_page(faultva),
320 1.2 matt pte, 0);
321 1.2 matt kpreempt_enable();
322 1.8 matt UVMHIST_LOG(pmapexechist, "<- 0", 0,0,0,0);
323 1.8 matt return 0;
324 1.2 matt }
325 1.2 matt kpreempt_enable();
326 1.2 matt
327 1.2 matt int rv = pagefault(faultmap, faultva, VM_PROT_READ|VM_PROT_EXECUTE,
328 1.2 matt usertrap);
329 1.2 matt
330 1.2 matt if (__predict_false(rv != 0 && usertrap)) {
331 1.2 matt ci->ci_ev_isi_fatal.ev_count++;
332 1.32 rin vm_signal(rv, EXC_ISI, tf->tf_srr0, ksi);
333 1.2 matt }
334 1.8 matt UVMHIST_LOG(pmapexechist, "<- %d", rv, 0,0,0);
335 1.2 matt return rv;
336 1.2 matt }
337 1.2 matt
338 1.2 matt static int
339 1.2 matt dtlb_exception(struct trapframe *tf, ksiginfo_t *ksi)
340 1.2 matt {
341 1.2 matt const vaddr_t faultva = tf->tf_dear;
342 1.2 matt const vm_prot_t ftype = get_faulttype(tf);
343 1.2 matt struct vm_map * const faultmap = get_faultmap(tf, PSL_DS);
344 1.2 matt struct cpu_info * const ci = curcpu();
345 1.2 matt const bool usertrap = usertrap_p(tf);
346 1.2 matt
347 1.2 matt #if 0
348 1.2 matt /*
349 1.2 matt * This is what pte_load in trap_subr.S does for us.
350 1.2 matt */
351 1.2 matt const pt_entry_t * const ptep =
352 1.2 matt trap_pte_lookup(tf, trunc_page(faultva), PSL_DS);
353 1.2 matt if (ptep != NULL && !usertrap && pte_valid_p(*ptep)) {
354 1.2 matt tlb_update_addr(trunc_page(faultva), KERNEL_PID, *ptep, true);
355 1.2 matt ci->ci_ev_tlbmiss_soft.ev_count++;
356 1.2 matt return 0;
357 1.2 matt }
358 1.2 matt #endif
359 1.2 matt
360 1.2 matt ci->ci_ev_dtlbmiss_hard.ev_count++;
361 1.2 matt
362 1.2 matt // printf("pagefault(%p,%#lx,%u,%u)", faultmap, faultva, ftype, usertrap);
363 1.2 matt int rv = pagefault(faultmap, faultva, ftype, usertrap);
364 1.2 matt // printf(": %d\n", rv);
365 1.2 matt
366 1.2 matt if (__predict_false(rv != 0 && usertrap)) {
367 1.2 matt ci->ci_ev_udsi_fatal.ev_count++;
368 1.32 rin vm_signal(rv, EXC_DSI, faultva, ksi);
369 1.2 matt }
370 1.2 matt return rv;
371 1.2 matt }
372 1.2 matt
373 1.2 matt static int
374 1.2 matt itlb_exception(struct trapframe *tf, ksiginfo_t *ksi)
375 1.2 matt {
376 1.2 matt struct vm_map * const faultmap = get_faultmap(tf, PSL_IS);
377 1.2 matt const vaddr_t faultva = tf->tf_srr0;
378 1.2 matt struct cpu_info * const ci = curcpu();
379 1.2 matt const bool usertrap = usertrap_p(tf);
380 1.2 matt
381 1.2 matt ci->ci_ev_itlbmiss_hard.ev_count++;
382 1.2 matt
383 1.2 matt int rv = pagefault(faultmap, faultva, VM_PROT_READ|VM_PROT_EXECUTE,
384 1.2 matt usertrap);
385 1.2 matt
386 1.2 matt if (__predict_false(rv != 0 && usertrap)) {
387 1.2 matt ci->ci_ev_isi_fatal.ev_count++;
388 1.32 rin vm_signal(rv, EXC_ISI, tf->tf_srr0, ksi);
389 1.2 matt }
390 1.2 matt return rv;
391 1.2 matt }
392 1.2 matt
393 1.2 matt static int
394 1.2 matt spe_exception(struct trapframe *tf, ksiginfo_t *ksi)
395 1.2 matt {
396 1.2 matt struct cpu_info * const ci = curcpu();
397 1.2 matt
398 1.2 matt if (!usertrap_p(tf))
399 1.2 matt return EPERM;
400 1.2 matt
401 1.2 matt ci->ci_ev_vec.ev_count++;
402 1.2 matt
403 1.2 matt #ifdef PPC_HAVE_SPE
404 1.6 matt vec_load();
405 1.2 matt return 0;
406 1.2 matt #else
407 1.2 matt KSI_INIT_TRAP(ksi);
408 1.2 matt ksi->ksi_signo = SIGILL;
409 1.2 matt ksi->ksi_trap = EXC_PGM;
410 1.2 matt ksi->ksi_code = ILL_ILLOPC;
411 1.2 matt ksi->ksi_addr = (void *)tf->tf_srr0;
412 1.2 matt return EPERM;
413 1.2 matt #endif
414 1.2 matt }
415 1.2 matt
416 1.2 matt static bool
417 1.2 matt emulate_opcode(struct trapframe *tf, ksiginfo_t *ksi)
418 1.2 matt {
419 1.2 matt uint32_t opcode;
420 1.2 matt if (copyin((void *)tf->tf_srr0, &opcode, sizeof(opcode)) != 0)
421 1.2 matt return false;
422 1.2 matt
423 1.2 matt if (opcode == OPC_LWSYNC)
424 1.2 matt return true;
425 1.2 matt
426 1.2 matt if (OPC_MFSPR_P(opcode, SPR_PVR)) {
427 1.2 matt __asm ("mfpvr %0" : "=r"(tf->tf_fixreg[OPC_MFSPR_REG(opcode)]));
428 1.2 matt return true;
429 1.2 matt }
430 1.2 matt
431 1.18 matt if (OPC_MFSPR_P(opcode, SPR_PIR)) {
432 1.25 matt __asm ("mfspr %0, %1"
433 1.25 matt : "=r"(tf->tf_fixreg[OPC_MFSPR_REG(opcode)])
434 1.26 joerg : "n"(SPR_PIR));
435 1.18 matt return true;
436 1.18 matt }
437 1.18 matt
438 1.18 matt if (OPC_MFSPR_P(opcode, SPR_SVR)) {
439 1.18 matt __asm ("mfspr %0,%1"
440 1.18 matt : "=r"(tf->tf_fixreg[OPC_MFSPR_REG(opcode)])
441 1.18 matt : "n"(SPR_SVR));
442 1.18 matt return true;
443 1.18 matt }
444 1.18 matt
445 1.34 rin return emulate_mxmsr(curlwp, tf, opcode);
446 1.2 matt }
447 1.2 matt
448 1.2 matt static int
449 1.2 matt pgm_exception(struct trapframe *tf, ksiginfo_t *ksi)
450 1.2 matt {
451 1.2 matt struct cpu_info * const ci = curcpu();
452 1.2 matt int rv = EPERM;
453 1.2 matt
454 1.2 matt if (!usertrap_p(tf))
455 1.2 matt return rv;
456 1.2 matt
457 1.8 matt UVMHIST_FUNC(__func__); UVMHIST_CALLED(pmapexechist);
458 1.8 matt
459 1.8 matt UVMHIST_LOG(pmapexechist, " srr0/1=%#x/%#x esr=%#x pte=%#x",
460 1.8 matt tf->tf_srr0, tf->tf_srr1, tf->tf_esr,
461 1.8 matt *trap_pte_lookup(tf, trunc_page(tf->tf_srr0), PSL_IS));
462 1.8 matt
463 1.2 matt ci->ci_ev_pgm.ev_count++;
464 1.2 matt
465 1.37 rin KSI_INIT_TRAP(ksi);
466 1.37 rin
467 1.2 matt if (tf->tf_esr & ESR_PTR) {
468 1.37 rin struct lwp * const l = curlwp;
469 1.37 rin struct proc * const p = curlwp->l_proc;
470 1.37 rin vaddr_t va = (vaddr_t)tf->tf_srr0;
471 1.37 rin int error;
472 1.37 rin
473 1.37 rin /*
474 1.37 rin * Restore original instruction and clear BP.
475 1.37 rin */
476 1.37 rin if (p->p_md.md_ss_addr[0] == va ||
477 1.37 rin p->p_md.md_ss_addr[1] == va) {
478 1.37 rin error = ppc_sstep(l, 0);
479 1.37 rin if (error != 0) {
480 1.37 rin vm_signal(error, EXC_PGM /* XXX */, va, ksi);
481 1.37 rin return error;
482 1.37 rin }
483 1.37 rin ksi->ksi_code = TRAP_TRACE;
484 1.37 rin } else
485 1.37 rin ksi->ksi_code = TRAP_BRKPT;
486 1.37 rin
487 1.37 rin if (p->p_raslist != NULL &&
488 1.37 rin ras_lookup(p, (void *)va) != (void *)-1) {
489 1.37 rin tf->tf_srr0 += (ksi->ksi_code == TRAP_TRACE) ? 0 : 4;
490 1.2 matt return 0;
491 1.2 matt }
492 1.5 matt }
493 1.5 matt
494 1.5 matt if (tf->tf_esr & (ESR_PIL|ESR_PPR)) {
495 1.2 matt if (emulate_opcode(tf, ksi)) {
496 1.2 matt tf->tf_srr0 += 4;
497 1.2 matt return 0;
498 1.2 matt }
499 1.2 matt }
500 1.2 matt
501 1.18 matt if (tf->tf_esr & ESR_PIL) {
502 1.33 rin struct lwp * const l = curlwp;
503 1.33 rin struct pcb * const pcb = lwp_getpcb(l);
504 1.33 rin
505 1.33 rin if (__predict_false(!fpu_used_p(l))) {
506 1.18 matt memset(&pcb->pcb_fpu, 0, sizeof(pcb->pcb_fpu));
507 1.33 rin fpu_mark_used(l);
508 1.18 matt }
509 1.18 matt if (fpu_emulate(tf, &pcb->pcb_fpu, ksi)) {
510 1.18 matt if (ksi->ksi_signo == 0) {
511 1.18 matt ci->ci_ev_fpu.ev_count++;
512 1.18 matt return 0;
513 1.18 matt }
514 1.18 matt return EFAULT;
515 1.18 matt }
516 1.18 matt }
517 1.18 matt
518 1.2 matt ksi->ksi_signo = SIGILL;
519 1.2 matt ksi->ksi_trap = EXC_PGM;
520 1.4 matt if (tf->tf_esr & ESR_PIL) {
521 1.2 matt ksi->ksi_code = ILL_ILLOPC;
522 1.4 matt } else if (tf->tf_esr & ESR_PPR) {
523 1.2 matt ksi->ksi_code = ILL_PRVOPC;
524 1.4 matt } else if (tf->tf_esr & ESR_PTR) {
525 1.4 matt ksi->ksi_signo = SIGTRAP;
526 1.4 matt } else {
527 1.2 matt ksi->ksi_code = 0;
528 1.4 matt }
529 1.2 matt ksi->ksi_addr = (void *)tf->tf_srr0;
530 1.2 matt return rv;
531 1.2 matt }
532 1.2 matt
533 1.37 rin #if 0
534 1.2 matt static int
535 1.5 matt debug_exception(struct trapframe *tf, ksiginfo_t *ksi)
536 1.5 matt {
537 1.5 matt struct cpu_info * const ci = curcpu();
538 1.5 matt int rv = EPERM;
539 1.5 matt
540 1.5 matt if (!usertrap_p(tf))
541 1.5 matt return rv;
542 1.5 matt
543 1.5 matt ci->ci_ev_debug.ev_count++;
544 1.5 matt
545 1.5 matt /*
546 1.5 matt * Ack the interrupt.
547 1.5 matt */
548 1.5 matt mtspr(SPR_DBSR, tf->tf_esr);
549 1.25 matt KASSERT(tf->tf_esr & (DBSR_IAC1|DBSR_IAC2|DBSR_BRT));
550 1.5 matt KASSERT((tf->tf_srr1 & PSL_SE) == 0);
551 1.5 matt
552 1.5 matt /*
553 1.5 matt * Disable debug events
554 1.5 matt */
555 1.5 matt mtspr(SPR_DBCR1, 0);
556 1.5 matt mtspr(SPR_DBCR0, 0);
557 1.5 matt
558 1.5 matt /*
559 1.5 matt * Tell the debugger ...
560 1.5 matt */
561 1.5 matt KSI_INIT_TRAP(ksi);
562 1.5 matt ksi->ksi_signo = SIGTRAP;
563 1.5 matt ksi->ksi_trap = EXC_TRC;
564 1.5 matt ksi->ksi_addr = (void *)tf->tf_srr0;
565 1.5 matt ksi->ksi_code = TRAP_TRACE;
566 1.5 matt return rv;
567 1.5 matt }
568 1.37 rin #endif
569 1.5 matt
570 1.5 matt static int
571 1.2 matt ali_exception(struct trapframe *tf, ksiginfo_t *ksi)
572 1.2 matt {
573 1.2 matt struct cpu_info * const ci = curcpu();
574 1.2 matt int rv = EFAULT;
575 1.2 matt
576 1.2 matt ci->ci_ev_ali.ev_count++;
577 1.2 matt
578 1.2 matt if (rv != 0 && usertrap_p(tf)) {
579 1.2 matt ci->ci_ev_ali_fatal.ev_count++;
580 1.2 matt KSI_INIT_TRAP(ksi);
581 1.2 matt ksi->ksi_signo = SIGILL;
582 1.2 matt ksi->ksi_trap = EXC_PGM;
583 1.2 matt if (tf->tf_esr & ESR_PIL)
584 1.2 matt ksi->ksi_code = ILL_ILLOPC;
585 1.2 matt else if (tf->tf_esr & ESR_PPR)
586 1.2 matt ksi->ksi_code = ILL_PRVOPC;
587 1.2 matt else if (tf->tf_esr & ESR_PTR)
588 1.2 matt ksi->ksi_code = ILL_ILLTRP;
589 1.2 matt else
590 1.2 matt ksi->ksi_code = 0;
591 1.2 matt ksi->ksi_addr = (void *)tf->tf_srr0;
592 1.2 matt }
593 1.2 matt return rv;
594 1.2 matt }
595 1.2 matt
596 1.2 matt static int
597 1.2 matt embedded_fp_data_exception(struct trapframe *tf, ksiginfo_t *ksi)
598 1.2 matt {
599 1.2 matt struct cpu_info * const ci = curcpu();
600 1.2 matt int rv = EFAULT;
601 1.2 matt
602 1.2 matt ci->ci_ev_fpu.ev_count++;
603 1.2 matt
604 1.2 matt if (rv != 0 && usertrap_p(tf)) {
605 1.2 matt KSI_INIT_TRAP(ksi);
606 1.2 matt #ifdef PPC_HAVE_SPE
607 1.2 matt ksi->ksi_signo = SIGFPE;
608 1.2 matt ksi->ksi_trap = tf->tf_exc;
609 1.2 matt ksi->ksi_code = vec_siginfo_code(tf);
610 1.2 matt #else
611 1.2 matt ksi->ksi_signo = SIGILL;
612 1.2 matt ksi->ksi_trap = EXC_PGM;
613 1.2 matt ksi->ksi_code = ILL_ILLOPC;
614 1.2 matt #endif
615 1.2 matt ksi->ksi_addr = (void *)tf->tf_srr0;
616 1.2 matt }
617 1.2 matt return rv;
618 1.2 matt }
619 1.2 matt
620 1.2 matt static int
621 1.2 matt embedded_fp_round_exception(struct trapframe *tf, ksiginfo_t *ksi)
622 1.2 matt {
623 1.2 matt struct cpu_info * const ci = curcpu();
624 1.2 matt int rv = EDOM;
625 1.2 matt
626 1.2 matt ci->ci_ev_fpu.ev_count++;
627 1.2 matt
628 1.2 matt if (rv != 0 && usertrap_p(tf)) {
629 1.2 matt KSI_INIT_TRAP(ksi);
630 1.2 matt #ifdef PPC_HAVE_SPE
631 1.2 matt ksi->ksi_signo = SIGFPE;
632 1.2 matt ksi->ksi_trap = tf->tf_exc;
633 1.2 matt ksi->ksi_code = vec_siginfo_code(tf);
634 1.2 matt #else
635 1.2 matt ksi->ksi_signo = SIGILL;
636 1.2 matt ksi->ksi_trap = EXC_PGM;
637 1.2 matt ksi->ksi_code = ILL_ILLOPC;
638 1.2 matt #endif
639 1.2 matt ksi->ksi_addr = (void *)tf->tf_srr0;
640 1.2 matt }
641 1.2 matt return rv;
642 1.2 matt }
643 1.2 matt
644 1.19 matt void
645 1.20 matt dump_trapframe(const struct trapframe *tf, void (*pr)(const char *, ...))
646 1.2 matt {
647 1.20 matt if (pr == NULL)
648 1.20 matt pr = printf;
649 1.20 matt (*pr)("trapframe %p (exc=%x srr0/1=%#lx/%#lx esr/dear=%#x/%#lx)\n",
650 1.2 matt tf, tf->tf_exc, tf->tf_srr0, tf->tf_srr1, tf->tf_esr, tf->tf_dear);
651 1.20 matt (*pr)("lr =%08lx ctr=%08lx cr =%08x xer=%08x\n",
652 1.2 matt tf->tf_lr, tf->tf_ctr, tf->tf_cr, tf->tf_xer);
653 1.2 matt for (u_int r = 0; r < 32; r += 4) {
654 1.20 matt (*pr)("r%02u=%08lx r%02u=%08lx r%02u=%08lx r%02u=%08lx\n",
655 1.2 matt r+0, tf->tf_fixreg[r+0], r+1, tf->tf_fixreg[r+1],
656 1.2 matt r+2, tf->tf_fixreg[r+2], r+3, tf->tf_fixreg[r+3]);
657 1.2 matt }
658 1.2 matt }
659 1.20 matt
660 1.2 matt static bool
661 1.2 matt ddb_exception(struct trapframe *tf)
662 1.2 matt {
663 1.2 matt #if 0
664 1.2 matt const register_t ddb_trapfunc = (uintptr_t) cpu_Debugger;
665 1.2 matt if ((tf->tf_esr & ESR_PTR) == 0)
666 1.2 matt return false;
667 1.2 matt if (ddb_trapfunc <= tf->tf_srr0 && tf->tf_srr0 <= ddb_trapfunc+16) {
668 1.2 matt register_t srr0 = tf->tf_srr0;
669 1.2 matt if (kdb_trap(tf->tf_exc, tf)) {
670 1.2 matt if (srr0 == tf->tf_srr0)
671 1.2 matt tf->tf_srr0 += 4;
672 1.2 matt return true;
673 1.2 matt }
674 1.2 matt }
675 1.2 matt return false;
676 1.2 matt #else
677 1.5 matt #if 0
678 1.2 matt struct cpu_info * const ci = curcpu();
679 1.2 matt struct cpu_softc * const cpu = ci->ci_softc;
680 1.2 matt printf("CPL stack:");
681 1.2 matt if (ci->ci_idepth >= 0) {
682 1.2 matt for (u_int i = 0; i <= ci->ci_idepth; i++) {
683 1.2 matt printf(" [%u]=%u", i, cpu->cpu_pcpls[i]);
684 1.2 matt }
685 1.2 matt }
686 1.2 matt printf(" %u\n", ci->ci_cpl);
687 1.20 matt dump_trapframe(tf, NULL);
688 1.5 matt #endif
689 1.2 matt if (kdb_trap(tf->tf_exc, tf)) {
690 1.2 matt tf->tf_srr0 += 4;
691 1.2 matt return true;
692 1.2 matt }
693 1.2 matt return false;
694 1.2 matt #endif
695 1.2 matt }
696 1.2 matt
697 1.2 matt static bool
698 1.2 matt onfaulted(struct trapframe *tf, register_t rv)
699 1.2 matt {
700 1.2 matt struct lwp * const l = curlwp;
701 1.2 matt struct pcb * const pcb = lwp_getpcb(l);
702 1.2 matt struct faultbuf * const fb = pcb->pcb_onfault;
703 1.2 matt if (fb == NULL)
704 1.2 matt return false;
705 1.2 matt tf->tf_srr0 = fb->fb_pc;
706 1.2 matt tf->tf_srr1 = fb->fb_msr;
707 1.2 matt tf->tf_cr = fb->fb_cr;
708 1.2 matt tf->tf_fixreg[1] = fb->fb_sp;
709 1.2 matt tf->tf_fixreg[2] = fb->fb_r2;
710 1.2 matt tf->tf_fixreg[3] = rv;
711 1.30 rin memcpy(&tf->tf_fixreg[13], fb->fb_fixreg, sizeof(fb->fb_fixreg));
712 1.2 matt return true;
713 1.2 matt }
714 1.2 matt
715 1.2 matt void
716 1.2 matt trap(enum ppc_booke_exceptions trap_code, struct trapframe *tf)
717 1.2 matt {
718 1.2 matt const bool usertrap = usertrap_p(tf);
719 1.2 matt struct cpu_info * const ci = curcpu();
720 1.2 matt struct lwp * const l = curlwp;
721 1.2 matt struct proc * const p = l->l_proc;
722 1.2 matt ksiginfo_t ksi;
723 1.2 matt int rv = EACCES;
724 1.2 matt
725 1.2 matt ci->ci_ev_traps.ev_count++;
726 1.2 matt ci->ci_data.cpu_ntrap++;
727 1.2 matt
728 1.2 matt KASSERTMSG(!usertrap || tf == trapframe(l),
729 1.13 jym "trap: tf=%p is invalid: trapframe(%p)=%p", tf, l, trapframe(l));
730 1.2 matt
731 1.2 matt #if 0
732 1.2 matt if (trap_code != T_PROGRAM || usertrap)
733 1.2 matt printf("trap(enter): %s (tf=%p, esr/dear=%#x/%#lx, srr0/1=%#lx/%#lx, lr=%#lx)\n",
734 1.2 matt trap_names[trap_code], tf, tf->tf_esr, tf->tf_dear,
735 1.2 matt tf->tf_srr0, tf->tf_srr1, tf->tf_lr);
736 1.2 matt #endif
737 1.2 matt #if 0
738 1.2 matt if ((register_t)tf >= (register_t)l->l_addr + USPACE
739 1.2 matt || (register_t)tf < (register_t)l->l_addr + PAGE_SIZE) {
740 1.2 matt printf("%s(entry): pid %d.%d (%s): invalid tf addr %p\n",
741 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm, tf);
742 1.20 matt dump_trapframe(tf, NULL);
743 1.2 matt Debugger();
744 1.2 matt }
745 1.2 matt #endif
746 1.2 matt #if 0
747 1.2 matt if ((mfmsr() & PSL_CE) == 0) {
748 1.2 matt printf("%s(entry): pid %d.%d (%s): %s: PSL_CE (%#lx) not set\n",
749 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
750 1.2 matt trap_names[trap_code], mfmsr());
751 1.20 matt dump_trapframe(tf, NULL);
752 1.2 matt }
753 1.2 matt #endif
754 1.2 matt
755 1.15 matt if ((VM_MAX_ADDRESS & 0x80000000) == 0
756 1.15 matt && usertrap && (tf->tf_fixreg[1] & 0x80000000)) {
757 1.27 flxd printf("%s(entry): pid %d.%d (%s): %s invalid sp %#lx "
758 1.27 flxd "(sprg1=%#jx)\n", __func__, p->p_pid, l->l_lid, p->p_comm,
759 1.27 flxd trap_names[trap_code], tf->tf_fixreg[1],
760 1.27 flxd (uintmax_t)mfspr(SPR_SPRG1));
761 1.20 matt dump_trapframe(tf, NULL);
762 1.2 matt Debugger();
763 1.2 matt }
764 1.2 matt
765 1.2 matt if (usertrap && (tf->tf_srr1 & (PSL_DS|PSL_IS)) != (PSL_DS|PSL_IS)) {
766 1.2 matt printf("%s(entry): pid %d.%d (%s): %s invalid PSL %#lx\n",
767 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
768 1.2 matt trap_names[trap_code], tf->tf_srr1);
769 1.20 matt dump_trapframe(tf, NULL);
770 1.2 matt Debugger();
771 1.2 matt }
772 1.2 matt
773 1.2 matt switch (trap_code) {
774 1.2 matt case T_CRITIAL_INPUT:
775 1.2 matt case T_EXTERNAL_INPUT:
776 1.37 rin case T_DEBUG:
777 1.2 matt case T_DECREMENTER:
778 1.2 matt case T_FIXED_INTERVAL:
779 1.2 matt case T_WATCHDOG:
780 1.2 matt case T_SYSTEM_CALL:
781 1.2 matt default:
782 1.2 matt panic("trap: unexcepted trap code %d! (tf=%p, srr0/1=%#lx/%#lx)",
783 1.2 matt trap_code, tf, tf->tf_srr0, tf->tf_srr1);
784 1.2 matt case T_MACHINE_CHECK:
785 1.2 matt rv = mchk_exception(tf, &ksi);
786 1.2 matt break;
787 1.2 matt case T_DSI:
788 1.2 matt rv = dsi_exception(tf, &ksi);
789 1.2 matt break;
790 1.2 matt case T_ISI:
791 1.2 matt rv = isi_exception(tf, &ksi);
792 1.2 matt break;
793 1.2 matt case T_ALIGNMENT:
794 1.2 matt rv = ali_exception(tf, &ksi);
795 1.2 matt break;
796 1.2 matt case T_SPE_UNAVAILABLE:
797 1.2 matt rv = spe_exception(tf, &ksi);
798 1.2 matt break;
799 1.2 matt case T_PROGRAM:
800 1.2 matt #ifdef DDB
801 1.2 matt if (!usertrap && ddb_exception(tf))
802 1.2 matt return;
803 1.2 matt #endif
804 1.2 matt rv = pgm_exception(tf, &ksi);
805 1.2 matt break;
806 1.2 matt case T_FP_UNAVAILABLE:
807 1.2 matt case T_AP_UNAVAILABLE:
808 1.2 matt panic("trap: unexcepted trap code %d! (tf=%p, srr0/1=%#lx/%#lx)",
809 1.2 matt trap_code, tf, tf->tf_srr0, tf->tf_srr1);
810 1.2 matt case T_DATA_TLB_ERROR:
811 1.2 matt rv = dtlb_exception(tf, &ksi);
812 1.2 matt break;
813 1.2 matt case T_INSTRUCTION_TLB_ERROR:
814 1.2 matt rv = itlb_exception(tf, &ksi);
815 1.2 matt break;
816 1.37 rin #if 0
817 1.2 matt case T_DEBUG:
818 1.5 matt #ifdef DDB
819 1.5 matt if (!usertrap && ddb_exception(tf))
820 1.5 matt return;
821 1.5 matt #endif
822 1.5 matt rv = debug_exception(tf, &ksi);
823 1.5 matt break;
824 1.37 rin #endif
825 1.2 matt case T_EMBEDDED_FP_DATA:
826 1.2 matt rv = embedded_fp_data_exception(tf, &ksi);
827 1.2 matt break;
828 1.2 matt case T_EMBEDDED_FP_ROUND:
829 1.2 matt rv = embedded_fp_round_exception(tf, &ksi);
830 1.2 matt break;
831 1.2 matt case T_EMBEDDED_PERF_MONITOR:
832 1.2 matt //db_stack_trace_print(tf->tf_fixreg[1], true, 40, "", printf);
833 1.20 matt dump_trapframe(tf, NULL);
834 1.2 matt rv = EPERM;
835 1.2 matt break;
836 1.2 matt case T_AST:
837 1.2 matt KASSERT(usertrap);
838 1.12 matt cpu_ast(l, ci);
839 1.15 matt if ((VM_MAX_ADDRESS & 0x80000000) == 0
840 1.15 matt && (tf->tf_fixreg[1] & 0x80000000)) {
841 1.2 matt printf("%s(ast-exit): pid %d.%d (%s): invalid sp %#lx\n",
842 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
843 1.2 matt tf->tf_fixreg[1]);
844 1.20 matt dump_trapframe(tf, NULL);
845 1.2 matt Debugger();
846 1.2 matt }
847 1.2 matt if ((tf->tf_srr1 & (PSL_DS|PSL_IS)) != (PSL_DS|PSL_IS)) {
848 1.2 matt printf("%s(entry): pid %d.%d (%s): %s invalid PSL %#lx\n",
849 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
850 1.2 matt trap_names[trap_code], tf->tf_srr1);
851 1.20 matt dump_trapframe(tf, NULL);
852 1.2 matt Debugger();
853 1.2 matt }
854 1.2 matt #if 0
855 1.2 matt if ((mfmsr() & PSL_CE) == 0) {
856 1.2 matt printf("%s(exit): pid %d.%d (%s): %s: PSL_CE (%#lx) not set\n",
857 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
858 1.2 matt trap_names[trap_code], mfmsr());
859 1.20 matt dump_trapframe(tf, NULL);
860 1.2 matt }
861 1.2 matt #endif
862 1.2 matt userret(l, tf);
863 1.2 matt return;
864 1.2 matt }
865 1.2 matt if (!usertrap) {
866 1.2 matt if (rv != 0) {
867 1.2 matt if (!onfaulted(tf, rv)) {
868 1.2 matt db_stack_trace_print(tf->tf_fixreg[1], true, 40, "", printf);
869 1.20 matt dump_trapframe(tf, NULL);
870 1.2 matt panic("%s: pid %d.%d (%s): %s exception in kernel mode"
871 1.2 matt " (tf=%p, dear=%#lx, esr=%#x,"
872 1.2 matt " srr0/1=%#lx/%#lx)",
873 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
874 1.2 matt trap_names[trap_code], tf, tf->tf_dear,
875 1.2 matt tf->tf_esr, tf->tf_srr0, tf->tf_srr1);
876 1.2 matt }
877 1.2 matt }
878 1.2 matt #if 0
879 1.2 matt if (tf->tf_fixreg[1] >= (register_t)l->l_addr + USPACE
880 1.2 matt || tf->tf_fixreg[1] < (register_t)l->l_addr + PAGE_SIZE) {
881 1.2 matt printf("%s(exit): pid %d.%d (%s): invalid kern sp %#lx\n",
882 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
883 1.2 matt tf->tf_fixreg[1]);
884 1.20 matt dump_trapframe(tf, NULL);
885 1.2 matt Debugger();
886 1.2 matt }
887 1.2 matt #endif
888 1.2 matt #if 0
889 1.2 matt if ((mfmsr() & PSL_CE) == 0) {
890 1.2 matt printf("%s(exit): pid %d.%d (%s): %s: PSL_CE (%#lx) not set\n",
891 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
892 1.2 matt trap_names[trap_code], mfmsr());
893 1.2 matt mtmsr(mfmsr()|PSL_CE);
894 1.20 matt dump_trapframe(tf, NULL);
895 1.2 matt }
896 1.2 matt #endif
897 1.2 matt } else {
898 1.2 matt if (rv == ENOMEM) {
899 1.2 matt printf("UVM: pid %d.%d (%s), uid %d killed: "
900 1.2 matt "out of swap\n",
901 1.2 matt p->p_pid, l->l_lid, p->p_comm,
902 1.2 matt l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1);
903 1.2 matt ksi.ksi_signo = SIGKILL;
904 1.32 rin ksi.ksi_code = 0;
905 1.2 matt }
906 1.2 matt if (rv != 0) {
907 1.21 matt /*
908 1.21 matt * Only print a fatal trap if the signal will be
909 1.21 matt * uncaught.
910 1.21 matt */
911 1.21 matt if (cpu_printfataltraps
912 1.22 matt && (p->p_slflag & PSL_TRACED) == 0
913 1.21 matt && !sigismember(&p->p_sigctx.ps_sigcatch,
914 1.21 matt ksi.ksi_signo)) {
915 1.2 matt printf("%s: pid %d.%d (%s):"
916 1.2 matt " %s exception in user mode\n",
917 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
918 1.2 matt trap_names[trap_code]);
919 1.2 matt if (cpu_printfataltraps > 1)
920 1.20 matt dump_trapframe(tf, NULL);
921 1.2 matt }
922 1.2 matt (*p->p_emul->e_trapsignal)(l, &ksi);
923 1.2 matt }
924 1.2 matt #ifdef DEBUG
925 1.2 matt if ((tf->tf_srr1 & (PSL_DS|PSL_IS)) != (PSL_DS|PSL_IS)) {
926 1.2 matt printf("%s(exit): pid %d.%d (%s): %s invalid PSL %#lx\n",
927 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
928 1.2 matt trap_names[trap_code], tf->tf_srr1);
929 1.20 matt dump_trapframe(tf, NULL);
930 1.2 matt Debugger();
931 1.2 matt }
932 1.2 matt #endif
933 1.2 matt #if 0
934 1.2 matt if ((mfmsr() & PSL_CE) == 0) {
935 1.2 matt printf("%s(exit): pid %d.%d (%s): %s: PSL_CE (%#lx) not set\n",
936 1.2 matt __func__, p->p_pid, l->l_lid, p->p_comm,
937 1.2 matt trap_names[trap_code], mfmsr());
938 1.20 matt dump_trapframe(tf, NULL);
939 1.2 matt }
940 1.2 matt #endif
941 1.2 matt userret(l, tf);
942 1.2 matt }
943 1.2 matt }
944