trap.c revision 1.38
1 /* $NetBSD: trap.c,v 1.38 2022/09/25 06:21:58 skrll Exp $ */ 2 /*- 3 * Copyright (c) 2010, 2011 The NetBSD Foundation, Inc. 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to The NetBSD Foundation 7 * by Raytheon BBN Technologies Corp and Defense Advanced Research Projects 8 * Agency and which was developed by Matt Thomas of 3am Software Foundry. 9 * 10 * This material is based upon work supported by the Defense Advanced Research 11 * Projects Agency and Space and Naval Warfare Systems Center, Pacific, under 12 * Contract No. N66001-09-C-2073. 13 * Approved for Public Release, Distribution Unlimited 14 * 15 * Redistribution and use in source and binary forms, with or without 16 * modification, are permitted provided that the following conditions 17 * are met: 18 * 1. Redistributions of source code must retain the above copyright 19 * notice, this list of conditions and the following disclaimer. 20 * 2. Redistributions in binary form must reproduce the above copyright 21 * notice, this list of conditions and the following disclaimer in the 22 * documentation and/or other materials provided with the distribution. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 26 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 27 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 28 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 29 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 30 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 31 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 32 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 33 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 34 * POSSIBILITY OF SUCH DAMAGE. 35 */ 36 37 #include <sys/cdefs.h> 38 __KERNEL_RCSID(1, "$NetBSD: trap.c,v 1.38 2022/09/25 06:21:58 skrll Exp $"); 39 40 #ifdef _KERNEL_OPT 41 #include "opt_altivec.h" 42 #include "opt_ddb.h" 43 #endif 44 45 #include <sys/param.h> 46 #include <sys/cpu.h> 47 #include <sys/kauth.h> 48 #include <sys/lwp.h> 49 #include <sys/proc.h> 50 #include <sys/ptrace.h> 51 #include <sys/ras.h> 52 #include <sys/siginfo.h> 53 #include <sys/systm.h> 54 55 #include <ddb/ddb.h> 56 57 #include <uvm/uvm_extern.h> 58 59 #include <powerpc/altivec.h> /* use same interface for SPE */ 60 #include <powerpc/instr.h> 61 #include <powerpc/pcb.h> 62 #include <powerpc/psl.h> 63 #include <powerpc/spr.h> 64 #include <powerpc/trap.h> 65 #include <powerpc/userret.h> 66 67 #include <powerpc/fpu/fpu_extern.h> 68 69 #include <powerpc/booke/cpuvar.h> 70 #include <powerpc/booke/pte.h> 71 #include <powerpc/booke/spr.h> 72 #include <powerpc/booke/trap.h> 73 74 void trap(enum ppc_booke_exceptions, struct trapframe *); 75 76 static const char trap_names[][8] = { 77 [T_CRITIAL_INPUT] = "CRIT", 78 [T_EXTERNAL_INPUT] = "EXT", 79 [T_DECREMENTER] = "DECR", 80 [T_FIXED_INTERVAL] = "FIT", 81 [T_WATCHDOG] = "WDOG", 82 [T_SYSTEM_CALL] = "SC", 83 [T_MACHINE_CHECK] = "MCHK", 84 [T_DSI] = "DSI", 85 [T_ISI] = "ISI", 86 [T_ALIGNMENT] = "ALN", 87 [T_PROGRAM] = "PGM", 88 [T_FP_UNAVAILABLE] = "FP", 89 [T_AP_UNAVAILABLE] = "AP", 90 [T_DATA_TLB_ERROR] = "DTLB", 91 [T_INSTRUCTION_TLB_ERROR] = "ITLB", 92 [T_DEBUG] = "DEBUG", 93 [T_SPE_UNAVAILABLE] = "SPE", 94 [T_EMBEDDED_FP_DATA] = "FPDATA", 95 [T_EMBEDDED_FP_ROUND] = "FPROUND", 96 [T_EMBEDDED_PERF_MONITOR] = "PERFMON", 97 [T_AST] = "AST", 98 }; 99 100 static inline bool 101 usertrap_p(struct trapframe *tf) 102 { 103 return (tf->tf_srr1 & PSL_PR) != 0; 104 } 105 106 static int 107 mchk_exception(struct trapframe *tf, ksiginfo_t *ksi) 108 { 109 const bool usertrap = usertrap_p(tf); 110 const vaddr_t faultva = tf->tf_mcar; 111 struct cpu_info * const ci = curcpu(); 112 int rv = EFAULT; 113 114 if (usertrap) { 115 ci->ci_ev_umchk.ev_count++; 116 KSI_INIT_TRAP(ksi); 117 ksi->ksi_signo = SIGBUS; 118 ksi->ksi_trap = EXC_MCHK; 119 ksi->ksi_addr = (void *)faultva; 120 ksi->ksi_code = BUS_OBJERR; 121 } 122 123 return rv; 124 } 125 126 static inline vm_prot_t 127 get_faulttype(const struct trapframe * const tf) 128 { 129 return VM_PROT_READ | (tf->tf_esr & ESR_ST ? VM_PROT_WRITE : 0); 130 } 131 132 static inline struct vm_map * 133 get_faultmap(const struct trapframe * const tf, register_t psl_mask) 134 { 135 return (tf->tf_srr1 & psl_mask) 136 ? &curlwp->l_proc->p_vmspace->vm_map 137 : kernel_map; 138 } 139 140 /* 141 * We could use pmap_pte_lookup but this slightly faster since we already 142 * the segtab pointers in cpu_info. 143 */ 144 static inline pt_entry_t * 145 trap_pte_lookup(struct trapframe *tf, vaddr_t va, register_t psl_mask) 146 { 147 pmap_segtab_t ** const stbs = &curcpu()->ci_pmap_kern_segtab; 148 pmap_segtab_t * const stb = stbs[(tf->tf_srr1 / psl_mask) & 1]; 149 if (__predict_false(stb == NULL)) 150 return NULL; 151 pt_entry_t * const ptep = stb->seg_tab[va >> SEGSHIFT]; 152 if (__predict_false(ptep == NULL)) 153 return NULL; 154 return ptep + ((va & SEGOFSET) >> PAGE_SHIFT); 155 } 156 157 static int 158 pagefault(struct vm_map *map, vaddr_t va, vm_prot_t ftype, bool usertrap) 159 { 160 struct lwp * const l = curlwp; 161 int rv; 162 163 // printf("%s(%p,%#lx,%u,%u)\n", __func__, map, va, ftype, usertrap); 164 165 if (usertrap) { 166 rv = uvm_fault(map, trunc_page(va), ftype); 167 if (rv == 0) 168 uvm_grow(l->l_proc, trunc_page(va)); 169 } else { 170 if (cpu_intr_p()) 171 return EFAULT; 172 173 struct pcb * const pcb = lwp_getpcb(l); 174 struct faultbuf * const fb = pcb->pcb_onfault; 175 pcb->pcb_onfault = NULL; 176 rv = uvm_fault(map, trunc_page(va), ftype); 177 pcb->pcb_onfault = fb; 178 if (map != kernel_map) { 179 if (rv == 0) 180 uvm_grow(l->l_proc, trunc_page(va)); 181 } 182 } 183 return rv; 184 } 185 186 static void 187 vm_signal(int error, int trap, vaddr_t addr, ksiginfo_t *ksi) 188 { 189 190 KSI_INIT_TRAP(ksi); 191 switch (error) { 192 case EINVAL: 193 ksi->ksi_signo = SIGBUS; 194 ksi->ksi_code = BUS_ADRERR; 195 break; 196 case EACCES: 197 ksi->ksi_signo = SIGSEGV; 198 ksi->ksi_code = SEGV_ACCERR; 199 break; 200 default: 201 ksi->ksi_signo = SIGSEGV; 202 ksi->ksi_code = SEGV_MAPERR; 203 break; 204 } 205 ksi->ksi_trap = trap; 206 ksi->ksi_addr = (void *)addr; 207 } 208 209 static int 210 dsi_exception(struct trapframe *tf, ksiginfo_t *ksi) 211 { 212 const vaddr_t faultva = tf->tf_dear; 213 const vm_prot_t ftype = get_faulttype(tf); 214 struct vm_map * const faultmap = get_faultmap(tf, PSL_DS); 215 const bool usertrap = usertrap_p(tf); 216 217 kpreempt_disable(); 218 struct cpu_info * const ci = curcpu(); 219 220 if (usertrap) 221 ci->ci_ev_udsi.ev_count++; 222 else 223 ci->ci_ev_kdsi.ev_count++; 224 225 /* 226 * If we had a TLB entry (which we must have had to get this exception), 227 * we certainly have a PTE. 228 */ 229 pt_entry_t * const ptep = trap_pte_lookup(tf, trunc_page(faultva), 230 PSL_DS); 231 KASSERT(ptep != NULL); 232 pt_entry_t pte = *ptep; 233 234 if ((ftype & VM_PROT_WRITE) 235 && ((pte & (PTE_xW|PTE_UNMODIFIED)) == (PTE_xW|PTE_UNMODIFIED))) { 236 const paddr_t pa = pte_to_paddr(pte); 237 struct vm_page * const pg = PHYS_TO_VM_PAGE(pa); 238 KASSERT(pg); 239 struct vm_page_md * const mdpg = VM_PAGE_TO_MD(pg); 240 241 if (!VM_PAGEMD_MODIFIED_P(mdpg)) { 242 pmap_page_set_attributes(mdpg, VM_PAGEMD_MODIFIED); 243 } 244 pte &= ~PTE_UNMODIFIED; 245 *ptep = pte; 246 pmap_tlb_update_addr(faultmap->pmap, trunc_page(faultva), 247 pte, 0); 248 kpreempt_enable(); 249 return 0; 250 } 251 kpreempt_enable(); 252 253 int rv = pagefault(faultmap, faultva, ftype, usertrap); 254 255 if (__predict_false(rv != 0 && usertrap)) { 256 ci->ci_ev_udsi_fatal.ev_count++; 257 vm_signal(rv, EXC_DSI, faultva, ksi); 258 } 259 return rv; 260 } 261 262 static int 263 isi_exception(struct trapframe *tf, ksiginfo_t *ksi) 264 { 265 const vaddr_t faultva = trunc_page(tf->tf_srr0); 266 struct vm_map * const faultmap = get_faultmap(tf, PSL_IS); 267 const bool usertrap = usertrap_p(tf); 268 269 kpreempt_disable(); 270 struct cpu_info * const ci = curcpu(); 271 272 if (usertrap) 273 ci->ci_ev_isi.ev_count++; 274 else 275 ci->ci_ev_kisi.ev_count++; 276 277 /* 278 * If we had a TLB entry (which we must have had to get this exception), 279 * we certainly have a PTE. 280 */ 281 pt_entry_t * const ptep = trap_pte_lookup(tf, trunc_page(faultva), 282 PSL_IS); 283 if (ptep == NULL) 284 dump_trapframe(tf, NULL); 285 KASSERT(ptep != NULL); 286 pt_entry_t pte = *ptep; 287 288 UVMHIST_FUNC(__func__); UVMHIST_CALLED(pmapexechist); 289 290 if ((pte & PTE_UNSYNCED) == PTE_UNSYNCED) { 291 const paddr_t pa = pte_to_paddr(pte); 292 struct vm_page * const pg = PHYS_TO_VM_PAGE(pa); 293 KASSERT(pg); 294 struct vm_page_md * const mdpg = VM_PAGE_TO_MD(pg); 295 296 #ifdef UVMHIST 297 if (VM_PAGEMD_EXECPAGE_P(mdpg)) 298 UVMHIST_LOG(pmapexechist, 299 "srr0=%#x pg=%p (pa %#"PRIxPADDR"): " 300 "no syncicache (already execpage)", 301 tf->tf_srr0, (uintptr_t)pg, pa, 0); 302 else 303 UVMHIST_LOG(pmapexechist, 304 "srr0=%#x pg=%p (pa %#"PRIxPADDR"): " 305 "performed syncicache (now execpage)", 306 tf->tf_srr0, (uintptr_t)pg, pa, 0); 307 #endif 308 309 if (!VM_PAGEMD_EXECPAGE_P(mdpg)) { 310 ci->ci_softc->cpu_ev_exec_trap_sync.ev_count++; 311 dcache_wb_page(pa); 312 icache_inv_page(pa); 313 pmap_page_set_attributes(mdpg, VM_PAGEMD_EXECPAGE); 314 } 315 pte &= ~PTE_UNSYNCED; 316 pte |= PTE_xX; 317 *ptep = pte; 318 319 pmap_tlb_update_addr(faultmap->pmap, trunc_page(faultva), 320 pte, 0); 321 kpreempt_enable(); 322 UVMHIST_LOG(pmapexechist, "<- 0", 0,0,0,0); 323 return 0; 324 } 325 kpreempt_enable(); 326 327 int rv = pagefault(faultmap, faultva, VM_PROT_READ|VM_PROT_EXECUTE, 328 usertrap); 329 330 if (__predict_false(rv != 0 && usertrap)) { 331 ci->ci_ev_isi_fatal.ev_count++; 332 vm_signal(rv, EXC_ISI, tf->tf_srr0, ksi); 333 } 334 UVMHIST_LOG(pmapexechist, "<- %d", rv, 0,0,0); 335 return rv; 336 } 337 338 static int 339 dtlb_exception(struct trapframe *tf, ksiginfo_t *ksi) 340 { 341 const vaddr_t faultva = tf->tf_dear; 342 const vm_prot_t ftype = get_faulttype(tf); 343 struct vm_map * const faultmap = get_faultmap(tf, PSL_DS); 344 struct cpu_info * const ci = curcpu(); 345 const bool usertrap = usertrap_p(tf); 346 347 #if 0 348 /* 349 * This is what pte_load in trap_subr.S does for us. 350 */ 351 const pt_entry_t * const ptep = 352 trap_pte_lookup(tf, trunc_page(faultva), PSL_DS); 353 if (ptep != NULL && !usertrap && pte_valid_p(*ptep)) { 354 tlb_update_addr(trunc_page(faultva), KERNEL_PID, *ptep, true); 355 ci->ci_ev_tlbmiss_soft.ev_count++; 356 return 0; 357 } 358 #endif 359 360 ci->ci_ev_dtlbmiss_hard.ev_count++; 361 362 // printf("pagefault(%p,%#lx,%u,%u)", faultmap, faultva, ftype, usertrap); 363 int rv = pagefault(faultmap, faultva, ftype, usertrap); 364 // printf(": %d\n", rv); 365 366 if (__predict_false(rv != 0 && usertrap)) { 367 ci->ci_ev_udsi_fatal.ev_count++; 368 vm_signal(rv, EXC_DSI, faultva, ksi); 369 } 370 return rv; 371 } 372 373 static int 374 itlb_exception(struct trapframe *tf, ksiginfo_t *ksi) 375 { 376 struct vm_map * const faultmap = get_faultmap(tf, PSL_IS); 377 const vaddr_t faultva = tf->tf_srr0; 378 struct cpu_info * const ci = curcpu(); 379 const bool usertrap = usertrap_p(tf); 380 381 ci->ci_ev_itlbmiss_hard.ev_count++; 382 383 int rv = pagefault(faultmap, faultva, VM_PROT_READ|VM_PROT_EXECUTE, 384 usertrap); 385 386 if (__predict_false(rv != 0 && usertrap)) { 387 ci->ci_ev_isi_fatal.ev_count++; 388 vm_signal(rv, EXC_ISI, tf->tf_srr0, ksi); 389 } 390 return rv; 391 } 392 393 static int 394 spe_exception(struct trapframe *tf, ksiginfo_t *ksi) 395 { 396 struct cpu_info * const ci = curcpu(); 397 398 if (!usertrap_p(tf)) 399 return EPERM; 400 401 ci->ci_ev_vec.ev_count++; 402 403 #ifdef PPC_HAVE_SPE 404 vec_load(); 405 return 0; 406 #else 407 KSI_INIT_TRAP(ksi); 408 ksi->ksi_signo = SIGILL; 409 ksi->ksi_trap = EXC_PGM; 410 ksi->ksi_code = ILL_ILLOPC; 411 ksi->ksi_addr = (void *)tf->tf_srr0; 412 return EPERM; 413 #endif 414 } 415 416 static bool 417 emulate_opcode(struct trapframe *tf, ksiginfo_t *ksi) 418 { 419 uint32_t opcode; 420 if (copyin((void *)tf->tf_srr0, &opcode, sizeof(opcode)) != 0) 421 return false; 422 423 if (opcode == OPC_LWSYNC) 424 return true; 425 426 if (OPC_MFSPR_P(opcode, SPR_PVR)) { 427 __asm ("mfpvr %0" : "=r"(tf->tf_fixreg[OPC_MFSPR_REG(opcode)])); 428 return true; 429 } 430 431 if (OPC_MFSPR_P(opcode, SPR_PIR)) { 432 __asm ("mfspr %0, %1" 433 : "=r"(tf->tf_fixreg[OPC_MFSPR_REG(opcode)]) 434 : "n"(SPR_PIR)); 435 return true; 436 } 437 438 if (OPC_MFSPR_P(opcode, SPR_SVR)) { 439 __asm ("mfspr %0,%1" 440 : "=r"(tf->tf_fixreg[OPC_MFSPR_REG(opcode)]) 441 : "n"(SPR_SVR)); 442 return true; 443 } 444 445 return emulate_mxmsr(curlwp, tf, opcode); 446 } 447 448 static int 449 pgm_exception(struct trapframe *tf, ksiginfo_t *ksi) 450 { 451 struct cpu_info * const ci = curcpu(); 452 int rv = EPERM; 453 454 if (!usertrap_p(tf)) 455 return rv; 456 457 UVMHIST_FUNC(__func__); UVMHIST_CALLED(pmapexechist); 458 459 UVMHIST_LOG(pmapexechist, " srr0/1=%#x/%#x esr=%#x pte=%#x", 460 tf->tf_srr0, tf->tf_srr1, tf->tf_esr, 461 *trap_pte_lookup(tf, trunc_page(tf->tf_srr0), PSL_IS)); 462 463 ci->ci_ev_pgm.ev_count++; 464 465 KSI_INIT_TRAP(ksi); 466 467 if (tf->tf_esr & ESR_PTR) { 468 struct lwp * const l = curlwp; 469 struct proc * const p = curlwp->l_proc; 470 vaddr_t va = (vaddr_t)tf->tf_srr0; 471 int error; 472 473 /* 474 * Restore original instruction and clear BP. 475 */ 476 if (p->p_md.md_ss_addr[0] == va || 477 p->p_md.md_ss_addr[1] == va) { 478 error = ppc_sstep(l, 0); 479 if (error != 0) { 480 vm_signal(error, EXC_PGM /* XXX */, va, ksi); 481 return error; 482 } 483 ksi->ksi_code = TRAP_TRACE; 484 } else 485 ksi->ksi_code = TRAP_BRKPT; 486 487 if (p->p_raslist != NULL && 488 ras_lookup(p, (void *)va) != (void *)-1) { 489 tf->tf_srr0 += (ksi->ksi_code == TRAP_TRACE) ? 0 : 4; 490 return 0; 491 } 492 } 493 494 if (tf->tf_esr & (ESR_PIL|ESR_PPR)) { 495 if (emulate_opcode(tf, ksi)) { 496 tf->tf_srr0 += 4; 497 return 0; 498 } 499 } 500 501 if (tf->tf_esr & ESR_PIL) { 502 struct lwp * const l = curlwp; 503 struct pcb * const pcb = lwp_getpcb(l); 504 505 if (__predict_false(!fpu_used_p(l))) { 506 memset(&pcb->pcb_fpu, 0, sizeof(pcb->pcb_fpu)); 507 fpu_mark_used(l); 508 } 509 if (fpu_emulate(tf, &pcb->pcb_fpu, ksi)) { 510 if (ksi->ksi_signo == 0) { 511 ci->ci_ev_fpu.ev_count++; 512 return 0; 513 } 514 return EFAULT; 515 } 516 } 517 518 ksi->ksi_signo = SIGILL; 519 ksi->ksi_trap = EXC_PGM; 520 if (tf->tf_esr & ESR_PIL) { 521 ksi->ksi_code = ILL_ILLOPC; 522 } else if (tf->tf_esr & ESR_PPR) { 523 ksi->ksi_code = ILL_PRVOPC; 524 } else if (tf->tf_esr & ESR_PTR) { 525 ksi->ksi_signo = SIGTRAP; 526 } else { 527 ksi->ksi_code = 0; 528 } 529 ksi->ksi_addr = (void *)tf->tf_srr0; 530 return rv; 531 } 532 533 #if 0 534 static int 535 debug_exception(struct trapframe *tf, ksiginfo_t *ksi) 536 { 537 struct cpu_info * const ci = curcpu(); 538 int rv = EPERM; 539 540 if (!usertrap_p(tf)) 541 return rv; 542 543 ci->ci_ev_debug.ev_count++; 544 545 /* 546 * Ack the interrupt. 547 */ 548 mtspr(SPR_DBSR, tf->tf_esr); 549 KASSERT(tf->tf_esr & (DBSR_IAC1|DBSR_IAC2|DBSR_BRT)); 550 KASSERT((tf->tf_srr1 & PSL_SE) == 0); 551 552 /* 553 * Disable debug events 554 */ 555 mtspr(SPR_DBCR1, 0); 556 mtspr(SPR_DBCR0, 0); 557 558 /* 559 * Tell the debugger ... 560 */ 561 KSI_INIT_TRAP(ksi); 562 ksi->ksi_signo = SIGTRAP; 563 ksi->ksi_trap = EXC_TRC; 564 ksi->ksi_addr = (void *)tf->tf_srr0; 565 ksi->ksi_code = TRAP_TRACE; 566 return rv; 567 } 568 #endif 569 570 static int 571 ali_exception(struct trapframe *tf, ksiginfo_t *ksi) 572 { 573 struct cpu_info * const ci = curcpu(); 574 int rv = EFAULT; 575 576 ci->ci_ev_ali.ev_count++; 577 578 if (rv != 0 && usertrap_p(tf)) { 579 ci->ci_ev_ali_fatal.ev_count++; 580 KSI_INIT_TRAP(ksi); 581 ksi->ksi_signo = SIGILL; 582 ksi->ksi_trap = EXC_PGM; 583 if (tf->tf_esr & ESR_PIL) 584 ksi->ksi_code = ILL_ILLOPC; 585 else if (tf->tf_esr & ESR_PPR) 586 ksi->ksi_code = ILL_PRVOPC; 587 else if (tf->tf_esr & ESR_PTR) 588 ksi->ksi_code = ILL_ILLTRP; 589 else 590 ksi->ksi_code = 0; 591 ksi->ksi_addr = (void *)tf->tf_srr0; 592 } 593 return rv; 594 } 595 596 static int 597 embedded_fp_data_exception(struct trapframe *tf, ksiginfo_t *ksi) 598 { 599 struct cpu_info * const ci = curcpu(); 600 int rv = EFAULT; 601 602 ci->ci_ev_fpu.ev_count++; 603 604 if (rv != 0 && usertrap_p(tf)) { 605 KSI_INIT_TRAP(ksi); 606 #ifdef PPC_HAVE_SPE 607 ksi->ksi_signo = SIGFPE; 608 ksi->ksi_trap = tf->tf_exc; 609 ksi->ksi_code = vec_siginfo_code(tf); 610 #else 611 ksi->ksi_signo = SIGILL; 612 ksi->ksi_trap = EXC_PGM; 613 ksi->ksi_code = ILL_ILLOPC; 614 #endif 615 ksi->ksi_addr = (void *)tf->tf_srr0; 616 } 617 return rv; 618 } 619 620 static int 621 embedded_fp_round_exception(struct trapframe *tf, ksiginfo_t *ksi) 622 { 623 struct cpu_info * const ci = curcpu(); 624 int rv = EDOM; 625 626 ci->ci_ev_fpu.ev_count++; 627 628 if (rv != 0 && usertrap_p(tf)) { 629 KSI_INIT_TRAP(ksi); 630 #ifdef PPC_HAVE_SPE 631 ksi->ksi_signo = SIGFPE; 632 ksi->ksi_trap = tf->tf_exc; 633 ksi->ksi_code = vec_siginfo_code(tf); 634 #else 635 ksi->ksi_signo = SIGILL; 636 ksi->ksi_trap = EXC_PGM; 637 ksi->ksi_code = ILL_ILLOPC; 638 #endif 639 ksi->ksi_addr = (void *)tf->tf_srr0; 640 } 641 return rv; 642 } 643 644 void 645 dump_trapframe(const struct trapframe *tf, void (*pr)(const char *, ...)) 646 { 647 if (pr == NULL) 648 pr = printf; 649 (*pr)("trapframe %p (exc=%x srr0/1=%#lx/%#lx esr/dear=%#x/%#lx)\n", 650 tf, tf->tf_exc, tf->tf_srr0, tf->tf_srr1, tf->tf_esr, tf->tf_dear); 651 (*pr)("lr =%08lx ctr=%08lx cr =%08x xer=%08x\n", 652 tf->tf_lr, tf->tf_ctr, tf->tf_cr, tf->tf_xer); 653 for (u_int r = 0; r < 32; r += 4) { 654 (*pr)("r%02u=%08lx r%02u=%08lx r%02u=%08lx r%02u=%08lx\n", 655 r+0, tf->tf_fixreg[r+0], r+1, tf->tf_fixreg[r+1], 656 r+2, tf->tf_fixreg[r+2], r+3, tf->tf_fixreg[r+3]); 657 } 658 } 659 660 static bool 661 ddb_exception(struct trapframe *tf) 662 { 663 #if 0 664 const register_t ddb_trapfunc = (uintptr_t) cpu_Debugger; 665 if ((tf->tf_esr & ESR_PTR) == 0) 666 return false; 667 if (ddb_trapfunc <= tf->tf_srr0 && tf->tf_srr0 <= ddb_trapfunc+16) { 668 register_t srr0 = tf->tf_srr0; 669 if (kdb_trap(tf->tf_exc, tf)) { 670 if (srr0 == tf->tf_srr0) 671 tf->tf_srr0 += 4; 672 return true; 673 } 674 } 675 return false; 676 #else 677 #if 0 678 struct cpu_info * const ci = curcpu(); 679 struct cpu_softc * const cpu = ci->ci_softc; 680 printf("CPL stack:"); 681 if (ci->ci_idepth >= 0) { 682 for (u_int i = 0; i <= ci->ci_idepth; i++) { 683 printf(" [%u]=%u", i, cpu->cpu_pcpls[i]); 684 } 685 } 686 printf(" %u\n", ci->ci_cpl); 687 dump_trapframe(tf, NULL); 688 #endif 689 if (kdb_trap(tf->tf_exc, tf)) { 690 tf->tf_srr0 += 4; 691 return true; 692 } 693 return false; 694 #endif 695 } 696 697 static bool 698 onfaulted(struct trapframe *tf, register_t rv) 699 { 700 struct lwp * const l = curlwp; 701 struct pcb * const pcb = lwp_getpcb(l); 702 struct faultbuf * const fb = pcb->pcb_onfault; 703 if (fb == NULL) 704 return false; 705 tf->tf_srr0 = fb->fb_pc; 706 tf->tf_srr1 = fb->fb_msr; 707 tf->tf_cr = fb->fb_cr; 708 tf->tf_fixreg[1] = fb->fb_sp; 709 tf->tf_fixreg[2] = fb->fb_r2; 710 tf->tf_fixreg[3] = rv; 711 memcpy(&tf->tf_fixreg[13], fb->fb_fixreg, sizeof(fb->fb_fixreg)); 712 return true; 713 } 714 715 void 716 trap(enum ppc_booke_exceptions trap_code, struct trapframe *tf) 717 { 718 const bool usertrap = usertrap_p(tf); 719 struct cpu_info * const ci = curcpu(); 720 struct lwp * const l = curlwp; 721 struct proc * const p = l->l_proc; 722 ksiginfo_t ksi; 723 int rv = EACCES; 724 725 ci->ci_ev_traps.ev_count++; 726 ci->ci_data.cpu_ntrap++; 727 728 KASSERTMSG(!usertrap || tf == trapframe(l), 729 "trap: tf=%p is invalid: trapframe(%p)=%p", tf, l, trapframe(l)); 730 731 #if 0 732 if (trap_code != T_PROGRAM || usertrap) 733 printf("trap(enter): %s (tf=%p, esr/dear=%#x/%#lx, srr0/1=%#lx/%#lx, lr=%#lx)\n", 734 trap_names[trap_code], tf, tf->tf_esr, tf->tf_dear, 735 tf->tf_srr0, tf->tf_srr1, tf->tf_lr); 736 #endif 737 #if 0 738 if ((register_t)tf >= (register_t)l->l_addr + USPACE 739 || (register_t)tf < (register_t)l->l_addr + PAGE_SIZE) { 740 printf("%s(entry): pid %d.%d (%s): invalid tf addr %p\n", 741 __func__, p->p_pid, l->l_lid, p->p_comm, tf); 742 dump_trapframe(tf, NULL); 743 Debugger(); 744 } 745 #endif 746 #if 0 747 if ((mfmsr() & PSL_CE) == 0) { 748 printf("%s(entry): pid %d.%d (%s): %s: PSL_CE (%#lx) not set\n", 749 __func__, p->p_pid, l->l_lid, p->p_comm, 750 trap_names[trap_code], mfmsr()); 751 dump_trapframe(tf, NULL); 752 } 753 #endif 754 755 if ((VM_MAX_ADDRESS & 0x80000000) == 0 756 && usertrap && (tf->tf_fixreg[1] & 0x80000000)) { 757 printf("%s(entry): pid %d.%d (%s): %s invalid sp %#lx " 758 "(sprg1=%#jx)\n", __func__, p->p_pid, l->l_lid, p->p_comm, 759 trap_names[trap_code], tf->tf_fixreg[1], 760 (uintmax_t)mfspr(SPR_SPRG1)); 761 dump_trapframe(tf, NULL); 762 Debugger(); 763 } 764 765 if (usertrap && (tf->tf_srr1 & (PSL_DS|PSL_IS)) != (PSL_DS|PSL_IS)) { 766 printf("%s(entry): pid %d.%d (%s): %s invalid PSL %#lx\n", 767 __func__, p->p_pid, l->l_lid, p->p_comm, 768 trap_names[trap_code], tf->tf_srr1); 769 dump_trapframe(tf, NULL); 770 Debugger(); 771 } 772 773 switch (trap_code) { 774 case T_CRITIAL_INPUT: 775 case T_EXTERNAL_INPUT: 776 case T_DEBUG: 777 case T_DECREMENTER: 778 case T_FIXED_INTERVAL: 779 case T_WATCHDOG: 780 case T_SYSTEM_CALL: 781 default: 782 panic("trap: unexcepted trap code %d! (tf=%p, srr0/1=%#lx/%#lx)", 783 trap_code, tf, tf->tf_srr0, tf->tf_srr1); 784 case T_MACHINE_CHECK: 785 rv = mchk_exception(tf, &ksi); 786 break; 787 case T_DSI: 788 rv = dsi_exception(tf, &ksi); 789 break; 790 case T_ISI: 791 rv = isi_exception(tf, &ksi); 792 break; 793 case T_ALIGNMENT: 794 rv = ali_exception(tf, &ksi); 795 break; 796 case T_SPE_UNAVAILABLE: 797 rv = spe_exception(tf, &ksi); 798 break; 799 case T_PROGRAM: 800 #ifdef DDB 801 if (!usertrap && ddb_exception(tf)) 802 return; 803 #endif 804 rv = pgm_exception(tf, &ksi); 805 break; 806 case T_FP_UNAVAILABLE: 807 case T_AP_UNAVAILABLE: 808 panic("trap: unexcepted trap code %d! (tf=%p, srr0/1=%#lx/%#lx)", 809 trap_code, tf, tf->tf_srr0, tf->tf_srr1); 810 case T_DATA_TLB_ERROR: 811 rv = dtlb_exception(tf, &ksi); 812 break; 813 case T_INSTRUCTION_TLB_ERROR: 814 rv = itlb_exception(tf, &ksi); 815 break; 816 #if 0 817 case T_DEBUG: 818 #ifdef DDB 819 if (!usertrap && ddb_exception(tf)) 820 return; 821 #endif 822 rv = debug_exception(tf, &ksi); 823 break; 824 #endif 825 case T_EMBEDDED_FP_DATA: 826 rv = embedded_fp_data_exception(tf, &ksi); 827 break; 828 case T_EMBEDDED_FP_ROUND: 829 rv = embedded_fp_round_exception(tf, &ksi); 830 break; 831 case T_EMBEDDED_PERF_MONITOR: 832 //db_stack_trace_print(tf->tf_fixreg[1], true, 40, "", printf); 833 dump_trapframe(tf, NULL); 834 rv = EPERM; 835 break; 836 case T_AST: 837 KASSERT(usertrap); 838 cpu_ast(l, ci); 839 if ((VM_MAX_ADDRESS & 0x80000000) == 0 840 && (tf->tf_fixreg[1] & 0x80000000)) { 841 printf("%s(ast-exit): pid %d.%d (%s): invalid sp %#lx\n", 842 __func__, p->p_pid, l->l_lid, p->p_comm, 843 tf->tf_fixreg[1]); 844 dump_trapframe(tf, NULL); 845 Debugger(); 846 } 847 if ((tf->tf_srr1 & (PSL_DS|PSL_IS)) != (PSL_DS|PSL_IS)) { 848 printf("%s(entry): pid %d.%d (%s): %s invalid PSL %#lx\n", 849 __func__, p->p_pid, l->l_lid, p->p_comm, 850 trap_names[trap_code], tf->tf_srr1); 851 dump_trapframe(tf, NULL); 852 Debugger(); 853 } 854 #if 0 855 if ((mfmsr() & PSL_CE) == 0) { 856 printf("%s(exit): pid %d.%d (%s): %s: PSL_CE (%#lx) not set\n", 857 __func__, p->p_pid, l->l_lid, p->p_comm, 858 trap_names[trap_code], mfmsr()); 859 dump_trapframe(tf, NULL); 860 } 861 #endif 862 userret(l, tf); 863 return; 864 } 865 if (!usertrap) { 866 if (rv != 0) { 867 if (!onfaulted(tf, rv)) { 868 db_stack_trace_print(tf->tf_fixreg[1], true, 40, "", printf); 869 dump_trapframe(tf, NULL); 870 panic("%s: pid %d.%d (%s): %s exception in kernel mode" 871 " (tf=%p, dear=%#lx, esr=%#x," 872 " srr0/1=%#lx/%#lx)", 873 __func__, p->p_pid, l->l_lid, p->p_comm, 874 trap_names[trap_code], tf, tf->tf_dear, 875 tf->tf_esr, tf->tf_srr0, tf->tf_srr1); 876 } 877 } 878 #if 0 879 if (tf->tf_fixreg[1] >= (register_t)l->l_addr + USPACE 880 || tf->tf_fixreg[1] < (register_t)l->l_addr + PAGE_SIZE) { 881 printf("%s(exit): pid %d.%d (%s): invalid kern sp %#lx\n", 882 __func__, p->p_pid, l->l_lid, p->p_comm, 883 tf->tf_fixreg[1]); 884 dump_trapframe(tf, NULL); 885 Debugger(); 886 } 887 #endif 888 #if 0 889 if ((mfmsr() & PSL_CE) == 0) { 890 printf("%s(exit): pid %d.%d (%s): %s: PSL_CE (%#lx) not set\n", 891 __func__, p->p_pid, l->l_lid, p->p_comm, 892 trap_names[trap_code], mfmsr()); 893 mtmsr(mfmsr()|PSL_CE); 894 dump_trapframe(tf, NULL); 895 } 896 #endif 897 } else { 898 if (rv == ENOMEM) { 899 printf("UVM: pid %d.%d (%s), uid %d killed: " 900 "out of swap\n", 901 p->p_pid, l->l_lid, p->p_comm, 902 l->l_cred ? kauth_cred_geteuid(l->l_cred) : -1); 903 ksi.ksi_signo = SIGKILL; 904 ksi.ksi_code = 0; 905 } 906 if (rv != 0) { 907 /* 908 * Only print a fatal trap if the signal will be 909 * uncaught. 910 */ 911 if (cpu_printfataltraps 912 && (p->p_slflag & PSL_TRACED) == 0 913 && !sigismember(&p->p_sigctx.ps_sigcatch, 914 ksi.ksi_signo)) { 915 printf("%s: pid %d.%d (%s):" 916 " %s exception in user mode\n", 917 __func__, p->p_pid, l->l_lid, p->p_comm, 918 trap_names[trap_code]); 919 if (cpu_printfataltraps > 1) 920 dump_trapframe(tf, NULL); 921 } 922 (*p->p_emul->e_trapsignal)(l, &ksi); 923 } 924 #ifdef DEBUG 925 if ((tf->tf_srr1 & (PSL_DS|PSL_IS)) != (PSL_DS|PSL_IS)) { 926 printf("%s(exit): pid %d.%d (%s): %s invalid PSL %#lx\n", 927 __func__, p->p_pid, l->l_lid, p->p_comm, 928 trap_names[trap_code], tf->tf_srr1); 929 dump_trapframe(tf, NULL); 930 Debugger(); 931 } 932 #endif 933 #if 0 934 if ((mfmsr() & PSL_CE) == 0) { 935 printf("%s(exit): pid %d.%d (%s): %s: PSL_CE (%#lx) not set\n", 936 __func__, p->p_pid, l->l_lid, p->p_comm, 937 trap_names[trap_code], mfmsr()); 938 dump_trapframe(tf, NULL); 939 } 940 #endif 941 userret(l, tf); 942 } 943 } 944
Indexes created Mon Sep 29 21:09:56 GMT 2025