clock.c revision 1.30
1 /* $NetBSD: clock.c,v 1.30 2021/01/18 04:30:12 rin Exp $ */ 2 /* $OpenBSD: clock.c,v 1.3 1997/10/13 13:42:53 pefo Exp $ */ 3 4 /* 5 * Copyright (C) 1995, 1996 Wolfgang Solfrank. 6 * Copyright (C) 1995, 1996 TooLs GmbH. 7 * All rights reserved. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 3. All advertising materials mentioning features or use of this software 18 * must display the following acknowledgement: 19 * This product includes software developed by TooLs GmbH. 20 * 4. The name of TooLs GmbH may not be used to endorse or promote products 21 * derived from this software without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR 24 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 25 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 26 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 27 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 28 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 29 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 30 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 31 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 32 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: clock.c,v 1.30 2021/01/18 04:30:12 rin Exp $"); 37 38 #ifdef _KERNEL_OPT 39 #include "opt_ppcarch.h" 40 #endif 41 42 #include <sys/param.h> 43 #include <sys/kernel.h> 44 #include <sys/systm.h> 45 #include <sys/timetc.h> 46 #include <sys/cpu.h> 47 48 #include <uvm/uvm_extern.h> 49 50 #include <prop/proplib.h> 51 52 #include <powerpc/spr.h> 53 #include <powerpc/ibm4xx/spr.h> 54 #include <powerpc/ibm4xx/cpu.h> 55 56 /* 57 * Initially we assume a processor with a bus frequency of 12.5 MHz. 58 */ 59 static u_long ticks_per_sec; 60 static u_long ns_per_tick; 61 static long ticks_per_intr; 62 static volatile u_long lasttb, lasttb2; 63 static u_long ticksmissed; 64 static volatile int tickspending; 65 66 static void init_ppc4xx_tc(void); 67 static u_int get_ppc4xx_timecount(struct timecounter *); 68 69 static struct timecounter ppc4xx_timecounter = { 70 .tc_get_timecount = get_ppc4xx_timecount, 71 .tc_counter_mask = ~0u, 72 .tc_name = "ppc_timebase", 73 .tc_quality = 100, 74 }; 75 76 void decr_intr(struct clockframe *); /* called from trap_subr.S */ 77 void stat_intr(struct clockframe *); /* called from trap_subr.S */ 78 79 #ifdef FAST_STAT_CLOCK 80 /* Stat clock runs at ~ 1.5 kHz */ 81 #define PERIOD_POWER 17 82 #define TCR_PERIOD TCR_FP_2_17 83 #else 84 /* Stat clock runs at ~ 95Hz */ 85 #define PERIOD_POWER 21 86 #define TCR_PERIOD TCR_FP_2_21 87 #endif 88 89 90 void 91 stat_intr(struct clockframe *frame) 92 { 93 struct cpu_info * const ci = curcpu(); 94 95 mtspr(SPR_TSR, TSR_FIS); /* Clear TSR[FIS] */ 96 ci->ci_data.cpu_nintr++; 97 ci->ci_ev_statclock.ev_count++; 98 99 /* Nobody can interrupt us, but see if we're allowed to run. */ 100 int s = splclock(); 101 102 /* 103 * Reenable interrupts 104 */ 105 __asm volatile ("wrteei 1"); 106 107 if (IPL_CLOCK > s) 108 statclock(frame); 109 splx(s); 110 } 111 112 void 113 decr_intr(struct clockframe *frame) 114 { 115 struct cpu_info * const ci = curcpu(); 116 int pcpl; 117 long tbtick, xticks; 118 int nticks; 119 120 /* 121 * Check whether we are initialized. 122 */ 123 if (!ticks_per_intr) 124 return; 125 126 tbtick = mftbl(); 127 mtspr(SPR_TSR, TSR_PIS); /* Clear TSR[PIS] */ 128 129 xticks = tbtick - lasttb2; /* Number of TLB cycles since last exception */ 130 for (nticks = 0; xticks > ticks_per_intr; nticks++) 131 xticks -= ticks_per_intr; 132 lasttb2 = tbtick - xticks; 133 134 ci->ci_data.cpu_nintr++; 135 ci->ci_ev_clock.ev_count++; 136 pcpl = splclock(); 137 138 /* 139 * Reenable interrupts 140 */ 141 __asm volatile ("wrteei 1"); 142 143 if (pcpl >= IPL_CLOCK) { 144 tickspending += nticks; 145 ticksmissed += nticks; 146 } else { 147 nticks += tickspending; 148 tickspending = 0; 149 150 /* 151 * lasttb is used during microtime. Set it to the virtual 152 * start of this tick interval. 153 */ 154 lasttb = lasttb2; 155 156 /* 157 * Do standard timer interrupt stuff. 158 */ 159 while (nticks-- > 0) 160 hardclock(frame); 161 } 162 splx(pcpl); 163 } 164 165 void 166 cpu_initclocks(void) 167 { 168 struct cpu_info * const ci = curcpu(); 169 170 /* Initialized in powerpc/ibm4xx/cpu.c */ 171 evcnt_attach_static(&ci->ci_ev_clock); 172 evcnt_attach_static(&ci->ci_ev_statclock); 173 174 ticks_per_intr = ticks_per_sec / hz; 175 stathz = profhz = ticks_per_sec / (1 << PERIOD_POWER); 176 177 printf("Setting PIT to %ld/%d = %ld\n", ticks_per_sec, hz, 178 ticks_per_intr); 179 180 lasttb2 = lasttb = mftbl(); 181 mtspr(SPR_PIT, ticks_per_intr); 182 183 /* Enable PIT & FIT(2^17c = 0.655ms) interrupts and auto-reload */ 184 mtspr(SPR_TCR, TCR_PIE | TCR_ARE | TCR_FIE | TCR_PERIOD); 185 186 init_ppc4xx_tc(); 187 } 188 189 void 190 calc_delayconst(void) 191 { 192 prop_number_t freq; 193 194 freq = prop_dictionary_get(board_properties, "processor-frequency"); 195 KASSERT(freq != NULL); 196 197 ticks_per_sec = (u_long) prop_number_integer_value(freq); 198 ns_per_tick = 1000000000 / ticks_per_sec; 199 } 200 201 static u_int 202 get_ppc4xx_timecount(struct timecounter *tc) 203 { 204 u_long tb; 205 int msr; 206 207 __asm volatile ("mfmsr %0; wrteei 0" : "=r"(msr) :); 208 tb = mftbl(); 209 __asm volatile ("mtmsr %0" :: "r"(msr)); 210 211 return tb; 212 } 213 214 /* 215 * Wait for about n microseconds (at least!). 216 */ 217 void 218 delay(unsigned int n) 219 { 220 u_quad_t tb; 221 u_long tbh, tbl, scratch; 222 223 tb = mftb(); 224 /* use 1000ULL to force 64 bit math to avoid 32 bit overflows */ 225 tb += (n * 1000ULL + ns_per_tick - 1) / ns_per_tick; 226 tbh = tb >> 32; 227 tbl = tb; 228 __asm volatile ( 229 #ifdef PPC_IBM403 230 "1: mftbhi %0 \n" 231 #else 232 "1: mftbu %0 \n" 233 #endif 234 " cmplw %0,%1 \n" 235 " blt 1b \n" 236 " bgt 2f \n" 237 #ifdef PPC_IBM403 238 " mftblo %0 \n" 239 #else 240 " mftb %0 \n" 241 #endif 242 " cmplw %0,%2 \n" 243 " blt 1b \n" 244 "2: \n" 245 : "=&r"(scratch) : "r"(tbh), "r"(tbl) : "cr0"); 246 } 247 248 /* 249 * Nothing to do. 250 */ 251 void 252 setstatclockrate(int arg) 253 { 254 255 /* Do nothing */ 256 } 257 258 static void 259 init_ppc4xx_tc(void) 260 { 261 /* from machdep initialization */ 262 ppc4xx_timecounter.tc_frequency = ticks_per_sec; 263 tc_init(&ppc4xx_timecounter); 264 } 265
Indexes created Wed Oct 01 13:09:50 GMT 2025