11.24Srin/* $NetBSD: copyoutstr.c,v 1.24 2022/10/05 08:18:00 rin Exp $ */ 21.1Ssimonb 31.1Ssimonb/* 41.1Ssimonb * Copyright 2001 Wasabi Systems, Inc. 51.1Ssimonb * All rights reserved. 61.1Ssimonb * 71.1Ssimonb * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 81.1Ssimonb * 91.1Ssimonb * Redistribution and use in source and binary forms, with or without 101.1Ssimonb * modification, are permitted provided that the following conditions 111.1Ssimonb * are met: 121.1Ssimonb * 1. Redistributions of source code must retain the above copyright 131.1Ssimonb * notice, this list of conditions and the following disclaimer. 141.1Ssimonb * 2. Redistributions in binary form must reproduce the above copyright 151.1Ssimonb * notice, this list of conditions and the following disclaimer in the 161.1Ssimonb * documentation and/or other materials provided with the distribution. 171.1Ssimonb * 3. All advertising materials mentioning features or use of this software 181.1Ssimonb * must display the following acknowledgement: 191.1Ssimonb * This product includes software developed for the NetBSD Project by 201.1Ssimonb * Wasabi Systems, Inc. 211.1Ssimonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse 221.1Ssimonb * or promote products derived from this software without specific prior 231.1Ssimonb * written permission. 241.1Ssimonb * 251.1Ssimonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 261.1Ssimonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 271.1Ssimonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 281.1Ssimonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 291.1Ssimonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 301.1Ssimonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 311.1Ssimonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 321.1Ssimonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 331.1Ssimonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 341.1Ssimonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 351.1Ssimonb * POSSIBILITY OF SUCH DAMAGE. 361.1Ssimonb */ 371.4Slukem 381.4Slukem#include <sys/cdefs.h> 391.24Srin__KERNEL_RCSID(0, "$NetBSD: copyoutstr.c,v 1.24 2022/10/05 08:18:00 rin Exp $"); 401.1Ssimonb 411.1Ssimonb#include <sys/param.h> 421.1Ssimonb#include <uvm/uvm_extern.h> 431.15Srin#include <powerpc/ibm4xx/spr.h> 441.1Ssimonb#include <machine/pcb.h> 451.1Ssimonb 461.1Ssimonbint 471.17Srincopyoutstr(const void *kaddr, void *uaddr, size_t len, size_t *done) 481.1Ssimonb{ 491.1Ssimonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap; 501.11Srin size_t resid; 511.22Srin int rv, msr, pid, tmp, ctx; 521.3Smatt struct faultbuf env; 531.1Ssimonb 541.10Srin if (__predict_false(len == 0)) { 551.10Srin if (done) 561.10Srin *done = 0; 571.10Srin return 0; 581.10Srin } 591.10Srin 601.9Schs if ((rv = setfault(&env))) { 611.9Schs curpcb->pcb_onfault = NULL; 621.1Ssimonb if (done) 631.10Srin *done = 0; 641.9Schs return rv; 651.1Ssimonb } 661.1Ssimonb 671.1Ssimonb if (!(ctx = pm->pm_ctx)) { 681.1Ssimonb /* No context -- assign it one */ 691.1Ssimonb ctx_alloc(pm); 701.1Ssimonb ctx = pm->pm_ctx; 711.1Ssimonb } 721.1Ssimonb 731.11Srin resid = len; 741.24Srin __asm volatile ( 751.21Srin "mtctr %[resid];" /* Set up counter */ 761.21Srin "mfmsr %[msr];" /* Save MSR */ 771.22Srin "li %[tmp],0x20;" /* Disable IMMU */ 781.22Srin "andc %[tmp],%[msr],%[tmp];" 791.22Srin "mtmsr %[tmp];" 801.14Srin "isync;" 811.16Srin MFPID(%[pid]) /* Save old PID */ 821.16Srin 831.23Srin "1:" "lbz %[tmp],0(%[kaddr]);" /* Load kernel byte */ 841.21Srin "addi %[kaddr],%[kaddr],1;" 851.14Srin "sync;" 861.16Srin 871.16Srin MTPID(%[ctx]) /* Load user ctx */ 881.15Srin "isync;" 891.22Srin "stb %[tmp],0(%[uaddr]);" /* Store byte */ 901.21Srin "addi %[uaddr],%[uaddr],1;" 911.22Srin "or. %[tmp],%[tmp],%[tmp];" 921.14Srin "sync;" 931.23Srin 941.23Srin MTPID(%[pid]) 951.23Srin "isync;" 961.21Srin "bdnzf eq,1b;" /* while(ctr-- && !zero) */ 971.10Srin 981.23Srin "mtmsr %[msr];" /* Restore MSR */ 991.14Srin "isync;" 1001.21Srin "mfctr %[resid];" /* Restore resid */ 1011.16Srin 1021.22Srin : [msr] "=&r" (msr), [pid] "=&r" (pid), [tmp] "=&r" (tmp), 1031.16Srin [resid] "+r" (resid) 1041.18Srin : [ctx] "r" (ctx), [uaddr] "b" (uaddr), [kaddr] "b" (kaddr) 1051.18Srin : "cr0", "ctr"); 1061.10Srin 1071.9Schs curpcb->pcb_onfault = NULL; 1081.1Ssimonb if (done) 1091.11Srin *done = len - resid; 1101.22Srin if (resid == 0 && (char)tmp != '\0') 1111.11Srin return ENAMETOOLONG; 1121.11Srin else 1131.11Srin return 0; 1141.1Ssimonb} 115