gpio_opb.c revision 1.4.6.1
1 /* $NetBSD: gpio_opb.c,v 1.4.6.1 2006/04/22 11:37:53 simonb Exp $ */ 2 3 /* 4 * Copyright (c) 2004 Shigeyuki Fukushima. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above 13 * copyright notice, this list of conditions and the following 14 * disclaimer in the documentation and/or other materials provided 15 * with the distribution. 16 * 3. The name of the author may not be used to endorse or promote 17 * products derived from this software without specific prior 18 * written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 21 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 24 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 26 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 29 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include "locators.h" 34 35 #include <sys/param.h> 36 #include <sys/device.h> 37 #include <sys/systm.h> 38 39 #include <machine/pio.h> 40 41 #include <sys/gpio.h> 42 #include <dev/gpio/gpiovar.h> 43 44 #include <powerpc/ibm4xx/dcr405gp.h> 45 #include <powerpc/ibm4xx/dev/opbvar.h> 46 #include <powerpc/ibm4xx/dev/gpioreg.h> 47 48 struct gpio_opb_softc { 49 struct device sc_dev; /* device generic */ 50 /* GPIO interface */ 51 bus_space_tag_t sc_gpio_iot; 52 bus_space_handle_t sc_gpio_ioh; 53 struct gpio_chipset_tag sc_gpio_gc; 54 gpio_pin_t sc_gpio_pins[GPIO_NPINS]; 55 }; 56 57 static int gpio_opb_match(struct device *, struct cfdata *, void *); 58 static void gpio_opb_attach(struct device *, struct device *, void *); 59 60 CFATTACH_DECL(opbgpio, sizeof(struct gpio_opb_softc), 61 gpio_opb_match, gpio_opb_attach, NULL, NULL); 62 63 static int gpio_opb_pin_read(void *, int); 64 static void gpio_opb_pin_write(void *, int, int); 65 static void gpio_opb_pin_ctl(void *, int, int); 66 67 68 static int 69 gpio_opb_match(struct device *parent, struct cfdata *cf, void *aux) 70 { 71 struct opb_attach_args *oaa = aux; 72 73 if (strcmp(oaa->opb_name, cf->cf_name) != 0) 74 return 0; 75 76 return 1; 77 } 78 79 static void 80 gpio_opb_attach(struct device *parent, struct device *self, void *aux) 81 { 82 struct gpio_opb_softc *sc = (struct gpio_opb_softc *)self; 83 struct opb_attach_args *oaa = aux; 84 struct gpiobus_attach_args gba; 85 int i; 86 uint32_t reg1, reg2, reg3; 87 88 aprint_naive(": GPIO controller\n"); 89 aprint_normal(": On-Chip GPIO controller\n"); 90 91 /* Map GPIO I/O space */ 92 sc->sc_gpio_iot = oaa->opb_bt; 93 bus_space_map(sc->sc_gpio_iot, oaa->opb_addr, 94 GPIO_NREG, 0, &sc->sc_gpio_ioh); 95 96 /* Read current register status */ 97 reg1 = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GPIO_IR); 98 reg2 = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GPIO_TCR); 99 reg3 = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GPIO_ODR); 100 101 /* Initialize ping array */ 102 for (i = 0 ; i < GPIO_NPINS ; i++) { 103 int p = i + 1; 104 sc->sc_gpio_pins[i].pin_num = i; 105 sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INOUT 106 | GPIO_PIN_OPENDRAIN 107 | GPIO_PIN_TRISTATE; 108 109 /* current defaults */ 110 sc->sc_gpio_pins[i].pin_flags = 111 ((reg3 >> GPIO_PIN_SHIFT(p)) & 0x01) 112 ? GPIO_PIN_OPENDRAIN 113 : (((reg2 >> GPIO_PIN_SHIFT(p)) & 0x01) 114 ? GPIO_PIN_INOUT 115 : GPIO_PIN_TRISTATE); 116 sc->sc_gpio_pins[i].pin_state = 117 ((reg1 >> GPIO_PIN_SHIFT(p)) & 0x01); 118 sc->sc_gpio_pins[i].pin_mapped = 0; 119 } 120 121 /* Create controller tag */ 122 sc->sc_gpio_gc.gp_cookie = sc; 123 sc->sc_gpio_gc.gp_pin_read = gpio_opb_pin_read; 124 sc->sc_gpio_gc.gp_pin_write = gpio_opb_pin_write; 125 sc->sc_gpio_gc.gp_pin_ctl = gpio_opb_pin_ctl; 126 127 gba.gba_gc = &sc->sc_gpio_gc; 128 gba.gba_pins = sc->sc_gpio_pins; 129 gba.gba_npins = GPIO_NPINS; 130 131 /* Attach GPIO framework */ 132 (void) config_found(&sc->sc_dev, &gba, gpiobus_print); 133 } 134 135 static int 136 gpio_opb_pin_read(void *arg, int pin) 137 { 138 struct gpio_opb_softc *sc = arg; 139 uint32_t data; 140 int p; 141 142 p = pin % GPIO_NPINS; 143 p = p + 1; 144 145 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GPIO_IR); 146 147 return (data >> GPIO_PIN_SHIFT(p)) & 0x01; 148 } 149 150 static void 151 gpio_opb_pin_write(void *arg, int pin, int value) 152 { 153 struct gpio_opb_softc *sc = arg; 154 uint32_t data; 155 int p; 156 157 p = pin % GPIO_NPINS; 158 p = p + 1; 159 160 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GPIO_OR); 161 if (value == 0) { 162 data &= ~(1 << GPIO_PIN_SHIFT(p)); 163 } else if (value == 1) { 164 data |= (1 << GPIO_PIN_SHIFT(p)); 165 } 166 167 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GPIO_OR, data); 168 } 169 170 static void 171 gpio_opb_pin_ctl(void *arg, int pin, int flags) 172 { 173 struct gpio_opb_softc *sc = arg; 174 uint32_t data; 175 int p; 176 177 p = pin % GPIO_NPINS; 178 p = p + 1; 179 180 if (flags & GPIO_PIN_INOUT) { 181 /* GPIOn_ODR register bit is 0 */ 182 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 183 GPIO_ODR); 184 data &= ~(1 << GPIO_PIN_SHIFT(p)); 185 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 186 GPIO_ODR, data); 187 /* GPIOn_TCR register bit is 1 */ 188 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 189 GPIO_TCR); 190 data |= (1 << GPIO_PIN_SHIFT(p)); 191 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 192 GPIO_TCR, data); 193 } 194 195 if (flags & GPIO_PIN_TRISTATE) { 196 /* GPIOn_ODR register bit is 0 */ 197 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 198 GPIO_ODR); 199 data &= ~(1 << GPIO_PIN_SHIFT(p)); 200 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 201 GPIO_ODR, data); 202 /* GPIOn_TCR register bit is 0 */ 203 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 204 GPIO_TCR); 205 data &= ~(1 << GPIO_PIN_SHIFT(p)); 206 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 207 GPIO_TCR, data); 208 } 209 210 if (flags & GPIO_PIN_OPENDRAIN) { 211 /* GPIOn_ODR register bit is 1 */ 212 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 213 GPIO_ODR); 214 data |= (1 << GPIO_PIN_SHIFT(p)); 215 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 216 GPIO_ODR, data); 217 } 218 } 219
Indexes created Tue Sep 30 11:09:46 GMT 2025