gpio_opb.c revision 1.7
1 /* $NetBSD: gpio_opb.c,v 1.7 2010/03/18 13:47:04 kiyohara Exp $ */ 2 3 /* 4 * Copyright (c) 2004 Shigeyuki Fukushima. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above 13 * copyright notice, this list of conditions and the following 14 * disclaimer in the documentation and/or other materials provided 15 * with the distribution. 16 * 3. The name of the author may not be used to endorse or promote 17 * products derived from this software without specific prior 18 * written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 21 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 22 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 24 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE 26 * GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 28 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 29 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS 30 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include "locators.h" 34 35 #include <sys/param.h> 36 #include <sys/device.h> 37 #include <sys/systm.h> 38 39 #include <machine/pio.h> 40 41 #include <sys/gpio.h> 42 #include <dev/gpio/gpiovar.h> 43 44 #include <powerpc/ibm4xx/dev/opbvar.h> 45 #include <powerpc/ibm4xx/dev/gpioreg.h> 46 47 struct gpio_opb_softc { 48 struct device sc_dev; /* device generic */ 49 /* GPIO interface */ 50 bus_space_tag_t sc_gpio_iot; 51 bus_space_handle_t sc_gpio_ioh; 52 struct gpio_chipset_tag sc_gpio_gc; 53 gpio_pin_t sc_gpio_pins[GPIO_NPINS]; 54 }; 55 56 static int gpio_opb_match(struct device *, struct cfdata *, void *); 57 static void gpio_opb_attach(struct device *, struct device *, void *); 58 59 CFATTACH_DECL(opbgpio, sizeof(struct gpio_opb_softc), 60 gpio_opb_match, gpio_opb_attach, NULL, NULL); 61 62 static int gpio_opb_pin_read(void *, int); 63 static void gpio_opb_pin_write(void *, int, int); 64 static void gpio_opb_pin_ctl(void *, int, int); 65 66 67 static int 68 gpio_opb_match(struct device *parent, struct cfdata *cf, void *aux) 69 { 70 struct opb_attach_args *oaa = aux; 71 72 if (strcmp(oaa->opb_name, cf->cf_name) != 0) 73 return 0; 74 75 return 1; 76 } 77 78 static void 79 gpio_opb_attach(struct device *parent, struct device *self, void *aux) 80 { 81 struct gpio_opb_softc *sc = (struct gpio_opb_softc *)self; 82 struct opb_attach_args *oaa = aux; 83 struct gpiobus_attach_args gba; 84 int i; 85 uint32_t reg1, reg2, reg3; 86 87 aprint_naive(": GPIO controller\n"); 88 aprint_normal(": On-Chip GPIO controller\n"); 89 90 /* Map GPIO I/O space */ 91 sc->sc_gpio_iot = oaa->opb_bt; 92 bus_space_map(sc->sc_gpio_iot, oaa->opb_addr, 93 GPIO_NREG, 0, &sc->sc_gpio_ioh); 94 95 /* Read current register status */ 96 reg1 = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GPIO_IR); 97 reg2 = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GPIO_TCR); 98 reg3 = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GPIO_ODR); 99 100 /* Initialize pins array */ 101 for (i = 0 ; i < GPIO_NPINS ; i++) { 102 int p = i + 1; 103 sc->sc_gpio_pins[i].pin_num = i; 104 sc->sc_gpio_pins[i].pin_caps = GPIO_PIN_INOUT 105 | GPIO_PIN_OPENDRAIN 106 | GPIO_PIN_TRISTATE; 107 108 /* current defaults */ 109 sc->sc_gpio_pins[i].pin_flags = 110 ((reg3 >> GPIO_PIN_SHIFT(p)) & 0x01) 111 ? GPIO_PIN_OPENDRAIN 112 : (((reg2 >> GPIO_PIN_SHIFT(p)) & 0x01) 113 ? GPIO_PIN_INOUT 114 : GPIO_PIN_TRISTATE); 115 sc->sc_gpio_pins[i].pin_state = 116 ((reg1 >> GPIO_PIN_SHIFT(p)) & 0x01); 117 sc->sc_gpio_pins[i].pin_mapped = 0; 118 } 119 120 /* Create controller tag */ 121 sc->sc_gpio_gc.gp_cookie = sc; 122 sc->sc_gpio_gc.gp_pin_read = gpio_opb_pin_read; 123 sc->sc_gpio_gc.gp_pin_write = gpio_opb_pin_write; 124 sc->sc_gpio_gc.gp_pin_ctl = gpio_opb_pin_ctl; 125 126 gba.gba_gc = &sc->sc_gpio_gc; 127 gba.gba_pins = sc->sc_gpio_pins; 128 gba.gba_npins = GPIO_NPINS; 129 130 /* Attach GPIO framework */ 131 (void) config_found(&sc->sc_dev, &gba, gpiobus_print); 132 } 133 134 static int 135 gpio_opb_pin_read(void *arg, int pin) 136 { 137 struct gpio_opb_softc *sc = arg; 138 uint32_t data; 139 int p; 140 141 p = pin % GPIO_NPINS; 142 p = p + 1; 143 144 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GPIO_IR); 145 146 return (data >> GPIO_PIN_SHIFT(p)) & 0x01; 147 } 148 149 static void 150 gpio_opb_pin_write(void *arg, int pin, int value) 151 { 152 struct gpio_opb_softc *sc = arg; 153 uint32_t data; 154 int p; 155 156 p = pin % GPIO_NPINS; 157 p = p + 1; 158 159 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GPIO_OR); 160 if (value == 0) { 161 data &= ~(1 << GPIO_PIN_SHIFT(p)); 162 } else if (value == 1) { 163 data |= (1 << GPIO_PIN_SHIFT(p)); 164 } 165 166 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, GPIO_OR, data); 167 } 168 169 static void 170 gpio_opb_pin_ctl(void *arg, int pin, int flags) 171 { 172 struct gpio_opb_softc *sc = arg; 173 uint32_t data; 174 int p; 175 176 p = pin % GPIO_NPINS; 177 p = p + 1; 178 179 if (flags & GPIO_PIN_INOUT) { 180 /* GPIOn_ODR register bit is 0 */ 181 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 182 GPIO_ODR); 183 data &= ~(1 << GPIO_PIN_SHIFT(p)); 184 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 185 GPIO_ODR, data); 186 /* GPIOn_TCR register bit is 1 */ 187 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 188 GPIO_TCR); 189 data |= (1 << GPIO_PIN_SHIFT(p)); 190 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 191 GPIO_TCR, data); 192 } 193 194 if (flags & GPIO_PIN_TRISTATE) { 195 /* GPIOn_ODR register bit is 0 */ 196 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 197 GPIO_ODR); 198 data &= ~(1 << GPIO_PIN_SHIFT(p)); 199 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 200 GPIO_ODR, data); 201 /* GPIOn_TCR register bit is 0 */ 202 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 203 GPIO_TCR); 204 data &= ~(1 << GPIO_PIN_SHIFT(p)); 205 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 206 GPIO_TCR, data); 207 } 208 209 if (flags & GPIO_PIN_OPENDRAIN) { 210 /* GPIOn_ODR register bit is 1 */ 211 data = bus_space_read_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 212 GPIO_ODR); 213 data |= (1 << GPIO_PIN_SHIFT(p)); 214 bus_space_write_4(sc->sc_gpio_iot, sc->sc_gpio_ioh, 215 GPIO_ODR, data); 216 } 217 } 218
Indexes created Tue Sep 30 11:09:46 GMT 2025