ibm405gp.c revision 1.5 1 1.5 matt /* $NetBSD: ibm405gp.c,v 1.5 2011/06/18 06:41:42 matt Exp $ */
2 1.1 scw
3 1.1 scw /*
4 1.1 scw * Copyright 2001 Wasabi Systems, Inc.
5 1.1 scw * All rights reserved.
6 1.1 scw *
7 1.1 scw * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 1.1 scw *
9 1.1 scw * Redistribution and use in source and binary forms, with or without
10 1.1 scw * modification, are permitted provided that the following conditions
11 1.1 scw * are met:
12 1.1 scw * 1. Redistributions of source code must retain the above copyright
13 1.1 scw * notice, this list of conditions and the following disclaimer.
14 1.1 scw * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 scw * notice, this list of conditions and the following disclaimer in the
16 1.1 scw * documentation and/or other materials provided with the distribution.
17 1.1 scw * 3. All advertising materials mentioning features or use of this software
18 1.1 scw * must display the following acknowledgement:
19 1.1 scw * This product includes software developed for the NetBSD Project by
20 1.1 scw * Wasabi Systems, Inc.
21 1.1 scw * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 scw * or promote products derived from this software without specific prior
23 1.1 scw * written permission.
24 1.1 scw *
25 1.1 scw * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 scw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 scw * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 scw * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 scw * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 scw * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 scw * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 scw * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 scw * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 scw * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 scw * POSSIBILITY OF SUCH DAMAGE.
36 1.1 scw */
37 1.2 lukem
38 1.2 lukem #include <sys/cdefs.h>
39 1.5 matt __KERNEL_RCSID(0, "$NetBSD: ibm405gp.c,v 1.5 2011/06/18 06:41:42 matt Exp $");
40 1.1 scw
41 1.1 scw #include <sys/param.h>
42 1.1 scw #include <sys/device.h>
43 1.1 scw #include <sys/systm.h>
44 1.3 scw #include <sys/extent.h>
45 1.5 matt #include <sys/bus.h>
46 1.1 scw
47 1.1 scw #include <dev/pci/pcivar.h>
48 1.1 scw
49 1.1 scw #include <powerpc/ibm4xx/ibm405gp.h>
50 1.1 scw #include <powerpc/ibm4xx/dev/pcicreg.h>
51 1.1 scw
52 1.3 scw static struct powerpc_bus_space pcicfg_tag = {
53 1.3 scw _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE,
54 1.3 scw IBM405GP_PCIL0_BASE, 0x0, 0x40
55 1.3 scw };
56 1.3 scw static char ex_storage[EXTENT_FIXED_STORAGE_SIZE(1)]
57 1.3 scw __attribute__((aligned(8)));
58 1.3 scw static bus_space_tag_t pcicfg_iot = &pcicfg_tag;
59 1.1 scw static bus_space_handle_t pcicfg_ioh = 0;
60 1.1 scw
61 1.1 scw #define PCI0_MEM_BASE 0x80000000
62 1.1 scw
63 1.1 scw static void setup_pcicfg_window(void)
64 1.1 scw {
65 1.1 scw if (pcicfg_ioh)
66 1.1 scw return;
67 1.3 scw if (bus_space_init(&pcicfg_tag,
68 1.3 scw "pcicfg", ex_storage, sizeof(ex_storage)) ||
69 1.3 scw bus_space_map(pcicfg_iot, 0, 0x40 , 0, &pcicfg_ioh))
70 1.1 scw panic("Cannot map PCI configuration registers");
71 1.1 scw }
72 1.1 scw
73 1.1 scw /*
74 1.1 scw * Setup proper Local<->PCI mapping
75 1.1 scw * PCI memory window: 256M @ PCI0MEMBASE with direct memory translation
76 1.1 scw */
77 1.1 scw void ibm4xx_setup_pci(void)
78 1.1 scw {
79 1.1 scw pcitag_t tag;
80 1.1 scw
81 1.1 scw setup_pcicfg_window();
82 1.1 scw
83 1.1 scw /* Disable all three memory mappers */
84 1.1 scw bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0MA, 0x00000000); /* disabled */
85 1.1 scw bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1MA, 0x00000000); /* disabled */
86 1.1 scw bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2MA, 0x00000000); /* disabled */
87 1.1 scw bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1MS, 0x00000000); /* Can't really disable PTM1. */
88 1.1 scw bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM2MS, 0x00000000); /* disabled */
89 1.1 scw
90 1.1 scw
91 1.1 scw /* Setup memory map #0 */
92 1.1 scw bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0MA, 0xF0000001); /* 256M non-prefetchable, enabled */
93 1.1 scw
94 1.1 scw bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0LA, PCI0_MEM_BASE);
95 1.1 scw bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCILA, PCI0_MEM_BASE);
96 1.1 scw bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCIHA, 0);
97 1.1 scw
98 1.1 scw /* Configure PCI bridge */
99 1.1 scw tag = pci_make_tag(0, 0, 0, 0);
100 1.1 scw // x = pci_conf_read(0, tag, PCI0_CMD); /* Read PCI command register */
101 1.1 scw // pci_conf_write(0, tag, PCI0_CMD, x | MA | ME); /* enable bus mastering and memory space */
102 1.1 scw
103 1.1 scw bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1MS, 0xF0000001); /* Enable PTM1 */
104 1.1 scw bus_space_write_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1LA, 0);
105 1.1 scw pci_conf_write(0, tag, PCIC_PTM1BAR, 0); /* Set up proper PCI->Local address base. Always enabled */
106 1.1 scw pci_conf_write(0, tag, PCIC_PTM2BAR, 0);
107 1.1 scw }
108 1.1 scw
109 1.1 scw void ibm4xx_show_pci_map(void)
110 1.1 scw {
111 1.1 scw paddr_t la, lm, pl, ph;
112 1.1 scw pcitag_t tag;
113 1.1 scw
114 1.1 scw setup_pcicfg_window();
115 1.1 scw
116 1.1 scw printf("Local -> PCI map\n");
117 1.1 scw la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0LA);
118 1.1 scw lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0MA);
119 1.1 scw pl = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCILA);
120 1.1 scw ph = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM0PCIHA);
121 1.1 scw printf("0: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n", la, lm, ph, pl,
122 1.1 scw (lm & 2) ? "":"not ",
123 1.1 scw (lm & 1) ? "enabled":"disabled");
124 1.1 scw la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1LA);
125 1.1 scw lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1MA);
126 1.1 scw pl = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1PCILA);
127 1.1 scw ph = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM1PCIHA);
128 1.1 scw printf("1: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n", la, lm, ph, pl,
129 1.1 scw (lm & 2) ? "":"not ",
130 1.1 scw (lm & 1) ? "enabled":"disabled");
131 1.1 scw la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2LA);
132 1.1 scw lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2MA);
133 1.1 scw pl = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2PCILA);
134 1.1 scw ph = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PMM2PCIHA);
135 1.1 scw printf("2: %08lx,%08lx -> %08lx%08lx %sprefetchable, %s\n", la, lm, ph, pl,
136 1.1 scw (lm & 2) ? "":"not ",
137 1.1 scw (lm & 1) ? "enabled":"disabled");
138 1.1 scw printf("PCI -> Local map\n");
139 1.1 scw
140 1.1 scw tag = pci_make_tag(0, 0, 0, 0);
141 1.1 scw pl = pci_conf_read(0, tag, PCIC_PTM1BAR);
142 1.1 scw la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1LA);
143 1.1 scw lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM1MS);
144 1.1 scw printf("1: %08lx -> %08lx,%08lx %s\n", pl, la, lm,
145 1.1 scw (lm & 1)?"enabled":"disabled");
146 1.1 scw pl = pci_conf_read(0, tag, PCIC_PTM2BAR);
147 1.1 scw la = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM2LA);
148 1.1 scw lm = bus_space_read_4(pcicfg_iot, pcicfg_ioh, PCIL_PTM2MS);
149 1.1 scw printf("2: %08lx -> %08lx,%08lx %s\n", pl, la, lm,
150 1.1 scw (lm & 1)?"enabled":"disabled");
151 1.1 scw }
152