1 1.29 thorpej /* $NetBSD: opb.c,v 1.29 2021/08/07 16:19:03 thorpej Exp $ */ 2 1.1 simonb 3 1.1 simonb /* 4 1.1 simonb * Copyright 2001,2002 Wasabi Systems, Inc. 5 1.1 simonb * All rights reserved. 6 1.1 simonb * 7 1.1 simonb * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc. 8 1.1 simonb * 9 1.1 simonb * Redistribution and use in source and binary forms, with or without 10 1.1 simonb * modification, are permitted provided that the following conditions 11 1.1 simonb * are met: 12 1.1 simonb * 1. Redistributions of source code must retain the above copyright 13 1.1 simonb * notice, this list of conditions and the following disclaimer. 14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright 15 1.1 simonb * notice, this list of conditions and the following disclaimer in the 16 1.1 simonb * documentation and/or other materials provided with the distribution. 17 1.1 simonb * 3. All advertising materials mentioning features or use of this software 18 1.1 simonb * must display the following acknowledgement: 19 1.1 simonb * This product includes software developed for the NetBSD Project by 20 1.1 simonb * Wasabi Systems, Inc. 21 1.1 simonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse 22 1.1 simonb * or promote products derived from this software without specific prior 23 1.1 simonb * written permission. 24 1.1 simonb * 25 1.1 simonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND 26 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 27 1.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 28 1.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC 29 1.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 30 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 31 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 32 1.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 33 1.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 34 1.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 35 1.1 simonb * POSSIBILITY OF SUCH DAMAGE. 36 1.1 simonb */ 37 1.1 simonb 38 1.1 simonb /* 39 1.1 simonb * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 40 1.1 simonb * 41 1.1 simonb * Redistribution and use in source and binary forms, with or without 42 1.1 simonb * modification, are permitted provided that the following conditions 43 1.1 simonb * are met: 44 1.1 simonb * 1. Redistributions of source code must retain the above copyright 45 1.1 simonb * notice, this list of conditions and the following disclaimer. 46 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright 47 1.1 simonb * notice, this list of conditions and the following disclaimer in the 48 1.1 simonb * documentation and/or other materials provided with the distribution. 49 1.1 simonb * 3. All advertising materials mentioning features or use of this software 50 1.1 simonb * must display the following acknowledgement: 51 1.1 simonb * This product includes software developed by Christopher G. Demetriou 52 1.1 simonb * for the NetBSD Project. 53 1.1 simonb * 4. The name of the author may not be used to endorse or promote products 54 1.1 simonb * derived from this software without specific prior written permission 55 1.1 simonb * 56 1.1 simonb * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 57 1.1 simonb * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 58 1.1 simonb * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 59 1.1 simonb * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 60 1.1 simonb * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 61 1.1 simonb * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 62 1.1 simonb * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 63 1.1 simonb * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 64 1.1 simonb * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 65 1.1 simonb * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 66 1.1 simonb */ 67 1.13 lukem 68 1.13 lukem #include <sys/cdefs.h> 69 1.29 thorpej __KERNEL_RCSID(0, "$NetBSD: opb.c,v 1.29 2021/08/07 16:19:03 thorpej Exp $"); 70 1.1 simonb 71 1.1 simonb #include "locators.h" 72 1.27 rin 73 1.27 rin #ifdef _KERNEL_OPT 74 1.25 kiyohara #include "opt_emac.h" 75 1.27 rin #endif 76 1.1 simonb 77 1.1 simonb #include <sys/param.h> 78 1.1 simonb #include <sys/systm.h> 79 1.1 simonb #include <sys/device.h> 80 1.14 scw #include <sys/extent.h> 81 1.26 matt #include <sys/cpu.h> 82 1.1 simonb 83 1.25 kiyohara #include <powerpc/ibm4xx/cpu.h> 84 1.26 matt #include <powerpc/ibm4xx/dcr4xx.h> 85 1.26 matt 86 1.25 kiyohara #include <powerpc/ibm4xx/dev/opbreg.h> 87 1.1 simonb #include <powerpc/ibm4xx/dev/opbvar.h> 88 1.5 simonb #include <powerpc/ibm4xx/dev/plbvar.h> 89 1.25 kiyohara #include <powerpc/ibm4xx/dev/rgmiireg.h> 90 1.25 kiyohara #include <powerpc/ibm4xx/dev/zmiireg.h> 91 1.26 matt 92 1.26 matt #include <powerpc/spr.h> 93 1.25 kiyohara #include <powerpc/ibm4xx/spr.h> 94 1.25 kiyohara 95 1.1 simonb #include <powerpc/ibm4xx/ibm405gp.h> 96 1.25 kiyohara #include <powerpc/ibm4xx/amcc405ex.h> 97 1.25 kiyohara 98 1.25 kiyohara static int opb_get_frequency_405gp(void); 99 1.25 kiyohara static int opb_get_frequency_405ex(void); 100 1.25 kiyohara 101 1.1 simonb 102 1.1 simonb /* 103 1.25 kiyohara * The devices on the On-chip Peripheral Bus to the 405GP/EX CPU. 104 1.1 simonb */ 105 1.1 simonb const struct opb_dev { 106 1.2 simonb int pvr; 107 1.1 simonb const char *name; 108 1.1 simonb bus_addr_t addr; 109 1.22 thorpej int instance; 110 1.1 simonb int irq; 111 1.25 kiyohara int flags; 112 1.1 simonb } opb_devs [] = { 113 1.15 shige /* IBM405GP */ 114 1.25 kiyohara { IBM405GP, "com", IBM405GP_UART0_BASE, 0, 0, 0 }, 115 1.25 kiyohara { IBM405GP, "com", IBM405GP_UART1_BASE, 1, 1, 0 }, 116 1.25 kiyohara { IBM405GP, "emac", IBM405GP_EMAC0_BASE, 0, 15, 0 }, 117 1.25 kiyohara { IBM405GP, "opbgpio", IBM405GP_GPIO0_BASE, 0, -1, 0 }, 118 1.25 kiyohara { IBM405GP, "gpiic",IBM405GP_IIC0_BASE, 0, 2, 0 }, 119 1.25 kiyohara { IBM405GP, "wdog", -1, 0, -1, 0 }, 120 1.15 shige 121 1.15 shige /* IBM405GPR */ 122 1.25 kiyohara { IBM405GPR, "com", IBM405GP_UART0_BASE, 0, 0, 0 }, 123 1.25 kiyohara { IBM405GPR, "com", IBM405GP_UART1_BASE, 1, 1, 0 }, 124 1.25 kiyohara { IBM405GPR, "emac", IBM405GP_EMAC0_BASE, 0, 15, 0 }, 125 1.25 kiyohara { IBM405GPR, "opbgpio", IBM405GP_GPIO0_BASE, 0, -1, 0 }, 126 1.25 kiyohara { IBM405GPR, "gpiic",IBM405GP_IIC0_BASE, 0, 2, 0 }, 127 1.25 kiyohara { IBM405GPR, "wdog", -1, 0, -1, 0 }, 128 1.25 kiyohara 129 1.25 kiyohara /* AMCC405EX */ 130 1.25 kiyohara { AMCC405EX, "gpt", AMCC405EX_GPT0_BASE, 0, -1, 0 }, 131 1.25 kiyohara { AMCC405EX, "com", AMCC405EX_UART0_BASE, 0, 26, 0 }, 132 1.25 kiyohara { AMCC405EX, "com", AMCC405EX_UART1_BASE, 1, 1, 0 }, 133 1.25 kiyohara { AMCC405EX, "gpiic",AMCC405EX_IIC0_BASE, 0, 2, 0 }, 134 1.25 kiyohara { AMCC405EX, "gpiic",AMCC405EX_IIC1_BASE, 1, 7, 0 }, 135 1.25 kiyohara { AMCC405EX, "scp", AMCC405EX_SCP0_BASE, 0, 8, 0 }, /* SPI */ 136 1.25 kiyohara { AMCC405EX, "opbgpio", AMCC405EX_GPIO0_BASE, -1, -1, 0 }, 137 1.25 kiyohara { AMCC405EX, "emac", AMCC405EX_EMAC0_BASE, 0, 24, 138 1.25 kiyohara OPB_FLAGS_EMAC_GBE | OPB_FLAGS_EMAC_STACV2 | OPB_FLAGS_EMAC_HT256 |\ 139 1.25 kiyohara OPB_FLAGS_EMAC_RMII_RGMII }, 140 1.25 kiyohara { AMCC405EX, "emac", AMCC405EX_EMAC1_BASE, 1, 25, 141 1.25 kiyohara OPB_FLAGS_EMAC_GBE | OPB_FLAGS_EMAC_STACV2 | OPB_FLAGS_EMAC_HT256 |\ 142 1.25 kiyohara OPB_FLAGS_EMAC_RMII_RGMII }, 143 1.25 kiyohara { AMCC405EX, "wdog", -1, 0, -1, 0 }, 144 1.25 kiyohara 145 1.2 simonb { 0, NULL } 146 1.1 simonb }; 147 1.1 simonb 148 1.25 kiyohara int (*opb_get_frequency)(void); 149 1.25 kiyohara const struct opb_param { 150 1.14 scw int pvr; 151 1.14 scw bus_addr_t base; 152 1.14 scw bus_addr_t limit; 153 1.25 kiyohara int (*opb_get_frequency)(void); 154 1.25 kiyohara bus_addr_t zmii_base; 155 1.25 kiyohara bus_addr_t rgmii_base; 156 1.25 kiyohara } opb_params[] = { 157 1.25 kiyohara { IBM405GP, 158 1.25 kiyohara IBM405GP_IP_BASE, IBM405GP_IP_BASE + OPBREG_SIZE, 159 1.25 kiyohara opb_get_frequency_405gp, 160 1.25 kiyohara 0, 0 }, 161 1.25 kiyohara { IBM405GPR, 162 1.25 kiyohara IBM405GP_IP_BASE, IBM405GP_IP_BASE + OPBREG_SIZE, 163 1.25 kiyohara opb_get_frequency_405gp, 164 1.25 kiyohara 0, 0 }, 165 1.25 kiyohara { AMCC405EX, 166 1.25 kiyohara AMCC405EX_OPB_BASE, AMCC405EX_OPB_BASE + OPBREG_SIZE, 167 1.25 kiyohara opb_get_frequency_405ex, 168 1.25 kiyohara 0, AMCC405EX_RGMIIB0_BASE}, 169 1.25 kiyohara 170 1.25 kiyohara { 0 } 171 1.14 scw }; 172 1.14 scw 173 1.25 kiyohara static int opb_match(device_t, cfdata_t, void *); 174 1.25 kiyohara static void opb_attach(device_t, device_t, void *); 175 1.25 kiyohara static int opb_submatch(device_t, cfdata_t, const int *, void *); 176 1.1 simonb static int opb_print(void *, const char *); 177 1.1 simonb 178 1.25 kiyohara CFATTACH_DECL_NEW(opb, sizeof(struct opb_softc), 179 1.10 thorpej opb_match, opb_attach, NULL, NULL); 180 1.1 simonb 181 1.14 scw static struct powerpc_bus_space opb_tag = { 182 1.23 shige _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE, 183 1.25 kiyohara 0x00000000, 184 1.14 scw }; 185 1.14 scw static char ex_storage[EXTENT_FIXED_STORAGE_SIZE(8)] 186 1.14 scw __attribute__((aligned(8))); 187 1.14 scw static int opb_tag_init_done; 188 1.14 scw 189 1.1 simonb /* 190 1.1 simonb * Probe for the opb; always succeeds. 191 1.1 simonb */ 192 1.1 simonb static int 193 1.25 kiyohara opb_match(device_t parent, cfdata_t cf, void *aux) 194 1.1 simonb { 195 1.1 simonb struct opb_attach_args *oaa = aux; 196 1.1 simonb 197 1.25 kiyohara /* match only opb devices */ 198 1.6 thorpej if (strcmp(oaa->opb_name, cf->cf_name) != 0) 199 1.25 kiyohara return 0; 200 1.1 simonb 201 1.25 kiyohara return 1; 202 1.1 simonb } 203 1.1 simonb 204 1.1 simonb static int 205 1.25 kiyohara opb_submatch(device_t parent, cfdata_t cf, const int *ldesc, void *aux) 206 1.1 simonb { 207 1.1 simonb struct opb_attach_args *oaa = aux; 208 1.1 simonb 209 1.1 simonb if (cf->cf_loc[OPBCF_ADDR] != OPBCF_ADDR_DEFAULT && 210 1.1 simonb cf->cf_loc[OPBCF_ADDR] != oaa->opb_addr) 211 1.25 kiyohara return 0; 212 1.1 simonb 213 1.25 kiyohara return config_match(parent, cf, aux); 214 1.1 simonb } 215 1.1 simonb 216 1.1 simonb /* 217 1.1 simonb * Attach the on-chip peripheral bus. 218 1.1 simonb */ 219 1.1 simonb static void 220 1.25 kiyohara opb_attach(device_t parent, device_t self, void *aux) 221 1.1 simonb { 222 1.25 kiyohara struct opb_softc *sc = device_private(self); 223 1.5 simonb struct plb_attach_args *paa = aux; 224 1.1 simonb struct opb_attach_args oaa; 225 1.2 simonb int i, pvr; 226 1.1 simonb 227 1.25 kiyohara aprint_naive("\n"); 228 1.25 kiyohara aprint_normal("\n"); 229 1.2 simonb pvr = mfpvr() >> 16; 230 1.1 simonb 231 1.25 kiyohara sc->sc_dev = self; 232 1.25 kiyohara sc->sc_iot = opb_get_bus_space_tag(); 233 1.25 kiyohara 234 1.25 kiyohara for (i = 0; opb_params[i].pvr != 0 && opb_params[i].pvr != pvr; i++) 235 1.25 kiyohara ; 236 1.25 kiyohara if (opb_params[i].pvr == 0) 237 1.25 kiyohara panic("opb_get_bus_space_tag: no params for this CPU!"); 238 1.25 kiyohara opb_get_frequency = opb_params[i].opb_get_frequency; 239 1.25 kiyohara #ifdef EMAC_ZMII_PHY 240 1.25 kiyohara if (opb_params[i].zmii_base != 0) 241 1.25 kiyohara bus_space_map(sc->sc_iot, opb_params[i].zmii_base, ZMII0_SIZE, 242 1.25 kiyohara 0, &sc->sc_zmiih); 243 1.25 kiyohara #endif 244 1.25 kiyohara #ifdef EMAC_RGMII_PHY 245 1.25 kiyohara if (opb_params[i].rgmii_base != 0) 246 1.25 kiyohara bus_space_map(sc->sc_iot, opb_params[i].rgmii_base, RGMII0_SIZE, 247 1.25 kiyohara 0, &sc->sc_rgmiih); 248 1.25 kiyohara #endif 249 1.14 scw 250 1.1 simonb for (i = 0; opb_devs[i].name != NULL; i++) { 251 1.2 simonb if (opb_devs[i].pvr != pvr) 252 1.2 simonb continue; 253 1.1 simonb oaa.opb_name = opb_devs[i].name; 254 1.1 simonb oaa.opb_addr = opb_devs[i].addr; 255 1.22 thorpej oaa.opb_instance = opb_devs[i].instance; 256 1.1 simonb oaa.opb_irq = opb_devs[i].irq; 257 1.25 kiyohara oaa.opb_bt = sc->sc_iot; 258 1.5 simonb oaa.opb_dmat = paa->plb_dmat; 259 1.25 kiyohara oaa.opb_flags = opb_devs[i].flags; 260 1.1 simonb 261 1.28 thorpej config_found(self, &oaa, opb_print, 262 1.29 thorpej CFARGS(.submatch = opb_submatch)); 263 1.1 simonb } 264 1.1 simonb } 265 1.1 simonb 266 1.1 simonb static int 267 1.1 simonb opb_print(void *aux, const char *pnp) 268 1.1 simonb { 269 1.1 simonb struct opb_attach_args *oaa = aux; 270 1.1 simonb 271 1.1 simonb if (pnp) 272 1.12 thorpej aprint_normal("%s at %s", oaa->opb_name, pnp); 273 1.1 simonb 274 1.1 simonb if (oaa->opb_addr != OPBCF_ADDR_DEFAULT) 275 1.12 thorpej aprint_normal(" addr 0x%08lx", oaa->opb_addr); 276 1.1 simonb if (oaa->opb_irq != OPBCF_IRQ_DEFAULT) 277 1.12 thorpej aprint_normal(" irq %d", oaa->opb_irq); 278 1.1 simonb 279 1.25 kiyohara return UNCONF; 280 1.14 scw } 281 1.14 scw 282 1.14 scw bus_space_tag_t 283 1.14 scw opb_get_bus_space_tag(void) 284 1.14 scw { 285 1.14 scw int i, pvr; 286 1.14 scw 287 1.14 scw if (!opb_tag_init_done) { 288 1.14 scw pvr = mfpvr() >> 16; 289 1.14 scw 290 1.25 kiyohara for (i = 0; opb_params[i].pvr != 0 && opb_params[i].pvr != pvr; 291 1.25 kiyohara i++) 292 1.14 scw ; 293 1.25 kiyohara if (opb_params[i].pvr == 0) 294 1.25 kiyohara panic("opb_get_bus_space_tag: no params for this CPU!"); 295 1.14 scw 296 1.25 kiyohara opb_tag.pbs_base = opb_params[i].base; 297 1.25 kiyohara opb_tag.pbs_limit = opb_params[i].limit; 298 1.14 scw 299 1.14 scw if (bus_space_init(&opb_tag, "opbtag", 300 1.14 scw ex_storage, sizeof(ex_storage))) 301 1.14 scw panic("opb_attach: Failed to initialise opb_tag"); 302 1.14 scw opb_tag_init_done = 1; 303 1.14 scw } 304 1.14 scw 305 1.25 kiyohara return &opb_tag; 306 1.25 kiyohara } 307 1.25 kiyohara 308 1.25 kiyohara static int 309 1.25 kiyohara opb_get_frequency_405gp(void) 310 1.25 kiyohara { 311 1.25 kiyohara prop_number_t pn; 312 1.25 kiyohara uint32_t pllmr; 313 1.25 kiyohara unsigned int processor_freq, plb_freq, opb_freq; 314 1.25 kiyohara 315 1.25 kiyohara pn = prop_dictionary_get(board_properties, "processor-frequency"); 316 1.25 kiyohara KASSERT(pn != NULL); 317 1.25 kiyohara processor_freq = (unsigned int) prop_number_integer_value(pn); 318 1.25 kiyohara pllmr = mfdcr(DCR_CPC0_PLLMR); 319 1.25 kiyohara plb_freq = processor_freq / CPC0_PLLMR_CBDV(pllmr); 320 1.25 kiyohara opb_freq = plb_freq / CPC0_PLLMR_OPDV(pllmr); 321 1.25 kiyohara 322 1.25 kiyohara return opb_freq; 323 1.25 kiyohara } 324 1.25 kiyohara 325 1.25 kiyohara static int 326 1.25 kiyohara opb_get_frequency_405ex(void) 327 1.25 kiyohara { 328 1.25 kiyohara prop_number_t pn; 329 1.25 kiyohara unsigned int processor_freq, plb_freq, opb_freq; 330 1.25 kiyohara 331 1.25 kiyohara pn = prop_dictionary_get(board_properties, "processor-frequency"); 332 1.25 kiyohara KASSERT(pn != NULL); 333 1.25 kiyohara processor_freq = (unsigned int) prop_number_integer_value(pn); 334 1.25 kiyohara plb_freq = processor_freq / CPR0_PLBDV0(mfcpr(DCR_CPR0_PLBD)); 335 1.25 kiyohara opb_freq = plb_freq / CPR0_OPBDV0(mfcpr(DCR_CPR0_OPBD)); 336 1.25 kiyohara 337 1.25 kiyohara return opb_freq; 338 1.1 simonb } 339