opb.c revision 1.20 1 1.20 drochner /* $NetBSD: opb.c,v 1.20 2005/08/26 13:19:37 drochner Exp $ */
2 1.1 simonb
3 1.1 simonb /*
4 1.1 simonb * Copyright 2001,2002 Wasabi Systems, Inc.
5 1.1 simonb * All rights reserved.
6 1.1 simonb *
7 1.1 simonb * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 1.1 simonb *
9 1.1 simonb * Redistribution and use in source and binary forms, with or without
10 1.1 simonb * modification, are permitted provided that the following conditions
11 1.1 simonb * are met:
12 1.1 simonb * 1. Redistributions of source code must retain the above copyright
13 1.1 simonb * notice, this list of conditions and the following disclaimer.
14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 simonb * notice, this list of conditions and the following disclaimer in the
16 1.1 simonb * documentation and/or other materials provided with the distribution.
17 1.1 simonb * 3. All advertising materials mentioning features or use of this software
18 1.1 simonb * must display the following acknowledgement:
19 1.1 simonb * This product includes software developed for the NetBSD Project by
20 1.1 simonb * Wasabi Systems, Inc.
21 1.1 simonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 simonb * or promote products derived from this software without specific prior
23 1.1 simonb * written permission.
24 1.1 simonb *
25 1.1 simonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 simonb * POSSIBILITY OF SUCH DAMAGE.
36 1.1 simonb */
37 1.1 simonb
38 1.1 simonb /*
39 1.1 simonb * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
40 1.1 simonb *
41 1.1 simonb * Redistribution and use in source and binary forms, with or without
42 1.1 simonb * modification, are permitted provided that the following conditions
43 1.1 simonb * are met:
44 1.1 simonb * 1. Redistributions of source code must retain the above copyright
45 1.1 simonb * notice, this list of conditions and the following disclaimer.
46 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
47 1.1 simonb * notice, this list of conditions and the following disclaimer in the
48 1.1 simonb * documentation and/or other materials provided with the distribution.
49 1.1 simonb * 3. All advertising materials mentioning features or use of this software
50 1.1 simonb * must display the following acknowledgement:
51 1.1 simonb * This product includes software developed by Christopher G. Demetriou
52 1.1 simonb * for the NetBSD Project.
53 1.1 simonb * 4. The name of the author may not be used to endorse or promote products
54 1.1 simonb * derived from this software without specific prior written permission
55 1.1 simonb *
56 1.1 simonb * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
57 1.1 simonb * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
58 1.1 simonb * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
59 1.1 simonb * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
60 1.1 simonb * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
61 1.1 simonb * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
62 1.1 simonb * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
63 1.1 simonb * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
64 1.1 simonb * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
65 1.1 simonb * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
66 1.1 simonb */
67 1.13 lukem
68 1.13 lukem #include <sys/cdefs.h>
69 1.20 drochner __KERNEL_RCSID(0, "$NetBSD: opb.c,v 1.20 2005/08/26 13:19:37 drochner Exp $");
70 1.1 simonb
71 1.1 simonb #include "locators.h"
72 1.1 simonb
73 1.1 simonb #include <sys/param.h>
74 1.1 simonb #include <sys/systm.h>
75 1.1 simonb #include <sys/device.h>
76 1.14 scw #include <sys/extent.h>
77 1.1 simonb
78 1.2 simonb #include <powerpc/spr.h>
79 1.1 simonb #include <powerpc/ibm4xx/dev/opbvar.h>
80 1.5 simonb #include <powerpc/ibm4xx/dev/plbvar.h>
81 1.1 simonb #include <powerpc/ibm4xx/ibm405gp.h>
82 1.1 simonb
83 1.1 simonb /*
84 1.17 wiz * The devices on the On-chip Peripheral Bus to the 405GP CPU.
85 1.1 simonb */
86 1.1 simonb const struct opb_dev {
87 1.2 simonb int pvr;
88 1.1 simonb const char *name;
89 1.1 simonb bus_addr_t addr;
90 1.1 simonb int irq;
91 1.1 simonb } opb_devs [] = {
92 1.15 shige /* IBM405GP */
93 1.3 simonb { IBM405GP, "com", IBM405GP_UART0_BASE, 0 },
94 1.3 simonb { IBM405GP, "com", IBM405GP_UART1_BASE, 1 },
95 1.3 simonb { IBM405GP, "emac", IBM405GP_EMAC0_BASE, 9 }, /* XXX: really irq 9..15 */
96 1.3 simonb { IBM405GP, "gpio", IBM405GP_GPIO0_BASE, -1 },
97 1.16 scw { IBM405GP, "gpiic",IBM405GP_IIC0_BASE, 2 },
98 1.3 simonb { IBM405GP, "wdog", -1, -1 },
99 1.15 shige
100 1.15 shige /* IBM405GPR */
101 1.15 shige { IBM405GPR, "com", IBM405GP_UART0_BASE, 0 },
102 1.15 shige { IBM405GPR, "com", IBM405GP_UART1_BASE, 1 },
103 1.15 shige { IBM405GPR, "emac", IBM405GP_EMAC0_BASE, 9 }, /* XXX: really irq 9..15 */
104 1.15 shige { IBM405GPR, "gpio", IBM405GP_GPIO0_BASE, -1 },
105 1.16 scw { IBM405GPR, "gpiic",IBM405GP_IIC0_BASE, 2 },
106 1.15 shige { IBM405GPR, "wdog", -1, -1 },
107 1.2 simonb { 0, NULL }
108 1.1 simonb };
109 1.1 simonb
110 1.14 scw const struct opb_limit {
111 1.14 scw int pvr;
112 1.14 scw bus_addr_t base;
113 1.14 scw bus_addr_t limit;
114 1.14 scw } opb_limits[] = {
115 1.14 scw { IBM405GP, IBM405GP_UART0_BASE, IBM405GP_UART0_BASE + 0xfff },
116 1.15 shige { IBM405GPR, IBM405GP_UART0_BASE, IBM405GP_UART0_BASE + 0xfff },
117 1.14 scw { 0, 0, 0 }
118 1.14 scw };
119 1.14 scw
120 1.1 simonb static int opb_match(struct device *, struct cfdata *, void *);
121 1.1 simonb static void opb_attach(struct device *, struct device *, void *);
122 1.18 drochner static int opb_submatch(struct device *, struct cfdata *,
123 1.20 drochner const int *, void *);
124 1.1 simonb static int opb_print(void *, const char *);
125 1.1 simonb
126 1.11 jdolecek CFATTACH_DECL(opb, sizeof(struct device),
127 1.10 thorpej opb_match, opb_attach, NULL, NULL);
128 1.1 simonb
129 1.14 scw static struct powerpc_bus_space opb_tag = {
130 1.14 scw _BUS_SPACE_LITTLE_ENDIAN|_BUS_SPACE_MEM_TYPE,
131 1.14 scw 0x0, IBM405GP_UART0_BASE, 0x1000
132 1.14 scw };
133 1.14 scw static char ex_storage[EXTENT_FIXED_STORAGE_SIZE(8)]
134 1.14 scw __attribute__((aligned(8)));
135 1.14 scw static int opb_tag_init_done;
136 1.14 scw
137 1.1 simonb /*
138 1.1 simonb * Probe for the opb; always succeeds.
139 1.1 simonb */
140 1.1 simonb static int
141 1.1 simonb opb_match(struct device *parent, struct cfdata *cf, void *aux)
142 1.1 simonb {
143 1.1 simonb struct opb_attach_args *oaa = aux;
144 1.1 simonb
145 1.1 simonb /* match only opb devices */
146 1.6 thorpej if (strcmp(oaa->opb_name, cf->cf_name) != 0)
147 1.1 simonb return (0);
148 1.1 simonb
149 1.1 simonb return (1);
150 1.1 simonb }
151 1.1 simonb
152 1.1 simonb static int
153 1.18 drochner opb_submatch(struct device *parent, struct cfdata *cf,
154 1.20 drochner const int *ldesc, void *aux)
155 1.1 simonb {
156 1.1 simonb struct opb_attach_args *oaa = aux;
157 1.1 simonb
158 1.1 simonb if (cf->cf_loc[OPBCF_ADDR] != OPBCF_ADDR_DEFAULT &&
159 1.1 simonb cf->cf_loc[OPBCF_ADDR] != oaa->opb_addr)
160 1.1 simonb return (0);
161 1.1 simonb
162 1.7 thorpej return (config_match(parent, cf, aux));
163 1.1 simonb }
164 1.1 simonb
165 1.1 simonb /*
166 1.1 simonb * Attach the on-chip peripheral bus.
167 1.1 simonb */
168 1.1 simonb static void
169 1.1 simonb opb_attach(struct device *parent, struct device *self, void *aux)
170 1.1 simonb {
171 1.5 simonb struct plb_attach_args *paa = aux;
172 1.1 simonb struct opb_attach_args oaa;
173 1.14 scw bus_space_tag_t tag;
174 1.2 simonb int i, pvr;
175 1.1 simonb
176 1.1 simonb printf("\n");
177 1.2 simonb pvr = mfpvr() >> 16;
178 1.1 simonb
179 1.14 scw tag = opb_get_bus_space_tag();
180 1.14 scw
181 1.1 simonb for (i = 0; opb_devs[i].name != NULL; i++) {
182 1.2 simonb if (opb_devs[i].pvr != pvr)
183 1.2 simonb continue;
184 1.1 simonb oaa.opb_name = opb_devs[i].name;
185 1.1 simonb oaa.opb_addr = opb_devs[i].addr;
186 1.1 simonb oaa.opb_irq = opb_devs[i].irq;
187 1.14 scw oaa.opb_bt = tag;
188 1.5 simonb oaa.opb_dmat = paa->plb_dmat;
189 1.1 simonb
190 1.18 drochner (void) config_found_sm_loc(self, "opb", NULL, &oaa, opb_print,
191 1.18 drochner opb_submatch);
192 1.1 simonb }
193 1.1 simonb }
194 1.1 simonb
195 1.1 simonb static int
196 1.1 simonb opb_print(void *aux, const char *pnp)
197 1.1 simonb {
198 1.1 simonb struct opb_attach_args *oaa = aux;
199 1.1 simonb
200 1.1 simonb if (pnp)
201 1.12 thorpej aprint_normal("%s at %s", oaa->opb_name, pnp);
202 1.1 simonb
203 1.1 simonb if (oaa->opb_addr != OPBCF_ADDR_DEFAULT)
204 1.12 thorpej aprint_normal(" addr 0x%08lx", oaa->opb_addr);
205 1.1 simonb if (oaa->opb_irq != OPBCF_IRQ_DEFAULT)
206 1.12 thorpej aprint_normal(" irq %d", oaa->opb_irq);
207 1.1 simonb
208 1.1 simonb return (UNCONF);
209 1.14 scw }
210 1.14 scw
211 1.14 scw bus_space_tag_t
212 1.14 scw opb_get_bus_space_tag(void)
213 1.14 scw {
214 1.14 scw int i, pvr;
215 1.14 scw
216 1.14 scw if (!opb_tag_init_done) {
217 1.14 scw pvr = mfpvr() >> 16;
218 1.14 scw
219 1.14 scw for (i = 0; opb_limits[i].pvr && opb_limits[i].pvr != pvr; i++)
220 1.14 scw ;
221 1.14 scw if (opb_limits[i].pvr == 0)
222 1.14 scw panic("opb_get_bus_space_tag: no limits for this CPU!");
223 1.14 scw
224 1.14 scw opb_tag.pbs_base = opb_limits[i].base;
225 1.14 scw opb_tag.pbs_limit = opb_limits[i].limit;
226 1.14 scw
227 1.14 scw if (bus_space_init(&opb_tag, "opbtag",
228 1.14 scw ex_storage, sizeof(ex_storage)))
229 1.14 scw panic("opb_attach: Failed to initialise opb_tag");
230 1.14 scw opb_tag_init_done = 1;
231 1.14 scw }
232 1.14 scw
233 1.14 scw return (&opb_tag);
234 1.1 simonb }
235