opb.c revision 1.25 1 1.25 kiyohara /* $NetBSD: opb.c,v 1.25 2010/03/18 13:47:04 kiyohara Exp $ */
2 1.1 simonb
3 1.1 simonb /*
4 1.1 simonb * Copyright 2001,2002 Wasabi Systems, Inc.
5 1.1 simonb * All rights reserved.
6 1.1 simonb *
7 1.1 simonb * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 1.1 simonb *
9 1.1 simonb * Redistribution and use in source and binary forms, with or without
10 1.1 simonb * modification, are permitted provided that the following conditions
11 1.1 simonb * are met:
12 1.1 simonb * 1. Redistributions of source code must retain the above copyright
13 1.1 simonb * notice, this list of conditions and the following disclaimer.
14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 simonb * notice, this list of conditions and the following disclaimer in the
16 1.1 simonb * documentation and/or other materials provided with the distribution.
17 1.1 simonb * 3. All advertising materials mentioning features or use of this software
18 1.1 simonb * must display the following acknowledgement:
19 1.1 simonb * This product includes software developed for the NetBSD Project by
20 1.1 simonb * Wasabi Systems, Inc.
21 1.1 simonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 simonb * or promote products derived from this software without specific prior
23 1.1 simonb * written permission.
24 1.1 simonb *
25 1.1 simonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 simonb * POSSIBILITY OF SUCH DAMAGE.
36 1.1 simonb */
37 1.1 simonb
38 1.1 simonb /*
39 1.1 simonb * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
40 1.1 simonb *
41 1.1 simonb * Redistribution and use in source and binary forms, with or without
42 1.1 simonb * modification, are permitted provided that the following conditions
43 1.1 simonb * are met:
44 1.1 simonb * 1. Redistributions of source code must retain the above copyright
45 1.1 simonb * notice, this list of conditions and the following disclaimer.
46 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
47 1.1 simonb * notice, this list of conditions and the following disclaimer in the
48 1.1 simonb * documentation and/or other materials provided with the distribution.
49 1.1 simonb * 3. All advertising materials mentioning features or use of this software
50 1.1 simonb * must display the following acknowledgement:
51 1.1 simonb * This product includes software developed by Christopher G. Demetriou
52 1.1 simonb * for the NetBSD Project.
53 1.1 simonb * 4. The name of the author may not be used to endorse or promote products
54 1.1 simonb * derived from this software without specific prior written permission
55 1.1 simonb *
56 1.1 simonb * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
57 1.1 simonb * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
58 1.1 simonb * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
59 1.1 simonb * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
60 1.1 simonb * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
61 1.1 simonb * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
62 1.1 simonb * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
63 1.1 simonb * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
64 1.1 simonb * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
65 1.1 simonb * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
66 1.1 simonb */
67 1.13 lukem
68 1.13 lukem #include <sys/cdefs.h>
69 1.25 kiyohara __KERNEL_RCSID(0, "$NetBSD: opb.c,v 1.25 2010/03/18 13:47:04 kiyohara Exp $");
70 1.1 simonb
71 1.1 simonb #include "locators.h"
72 1.25 kiyohara #include "opt_emac.h"
73 1.1 simonb
74 1.1 simonb #include <sys/param.h>
75 1.1 simonb #include <sys/systm.h>
76 1.1 simonb #include <sys/device.h>
77 1.14 scw #include <sys/extent.h>
78 1.1 simonb
79 1.25 kiyohara #include <powerpc/ibm4xx/cpu.h>
80 1.25 kiyohara #include <powerpc/ibm4xx/dev/opbreg.h>
81 1.1 simonb #include <powerpc/ibm4xx/dev/opbvar.h>
82 1.5 simonb #include <powerpc/ibm4xx/dev/plbvar.h>
83 1.25 kiyohara #include <powerpc/ibm4xx/dev/rgmiireg.h>
84 1.25 kiyohara #include <powerpc/ibm4xx/dev/zmiireg.h>
85 1.25 kiyohara #include <powerpc/ibm4xx/dcr4xx.h>
86 1.25 kiyohara #include <powerpc/ibm4xx/spr.h>
87 1.25 kiyohara #include <powerpc/spr.h>
88 1.25 kiyohara
89 1.1 simonb #include <powerpc/ibm4xx/ibm405gp.h>
90 1.25 kiyohara #include <powerpc/ibm4xx/amcc405ex.h>
91 1.25 kiyohara
92 1.25 kiyohara static int opb_get_frequency_405gp(void);
93 1.25 kiyohara static int opb_get_frequency_405ex(void);
94 1.25 kiyohara
95 1.1 simonb
96 1.1 simonb /*
97 1.25 kiyohara * The devices on the On-chip Peripheral Bus to the 405GP/EX CPU.
98 1.1 simonb */
99 1.1 simonb const struct opb_dev {
100 1.2 simonb int pvr;
101 1.1 simonb const char *name;
102 1.1 simonb bus_addr_t addr;
103 1.22 thorpej int instance;
104 1.1 simonb int irq;
105 1.25 kiyohara int flags;
106 1.1 simonb } opb_devs [] = {
107 1.15 shige /* IBM405GP */
108 1.25 kiyohara { IBM405GP, "com", IBM405GP_UART0_BASE, 0, 0, 0 },
109 1.25 kiyohara { IBM405GP, "com", IBM405GP_UART1_BASE, 1, 1, 0 },
110 1.25 kiyohara { IBM405GP, "emac", IBM405GP_EMAC0_BASE, 0, 15, 0 },
111 1.25 kiyohara { IBM405GP, "opbgpio", IBM405GP_GPIO0_BASE, 0, -1, 0 },
112 1.25 kiyohara { IBM405GP, "gpiic",IBM405GP_IIC0_BASE, 0, 2, 0 },
113 1.25 kiyohara { IBM405GP, "wdog", -1, 0, -1, 0 },
114 1.15 shige
115 1.15 shige /* IBM405GPR */
116 1.25 kiyohara { IBM405GPR, "com", IBM405GP_UART0_BASE, 0, 0, 0 },
117 1.25 kiyohara { IBM405GPR, "com", IBM405GP_UART1_BASE, 1, 1, 0 },
118 1.25 kiyohara { IBM405GPR, "emac", IBM405GP_EMAC0_BASE, 0, 15, 0 },
119 1.25 kiyohara { IBM405GPR, "opbgpio", IBM405GP_GPIO0_BASE, 0, -1, 0 },
120 1.25 kiyohara { IBM405GPR, "gpiic",IBM405GP_IIC0_BASE, 0, 2, 0 },
121 1.25 kiyohara { IBM405GPR, "wdog", -1, 0, -1, 0 },
122 1.25 kiyohara
123 1.25 kiyohara /* AMCC405EX */
124 1.25 kiyohara { AMCC405EX, "gpt", AMCC405EX_GPT0_BASE, 0, -1, 0 },
125 1.25 kiyohara { AMCC405EX, "com", AMCC405EX_UART0_BASE, 0, 26, 0 },
126 1.25 kiyohara { AMCC405EX, "com", AMCC405EX_UART1_BASE, 1, 1, 0 },
127 1.25 kiyohara { AMCC405EX, "gpiic",AMCC405EX_IIC0_BASE, 0, 2, 0 },
128 1.25 kiyohara { AMCC405EX, "gpiic",AMCC405EX_IIC1_BASE, 1, 7, 0 },
129 1.25 kiyohara { AMCC405EX, "scp", AMCC405EX_SCP0_BASE, 0, 8, 0 }, /* SPI */
130 1.25 kiyohara { AMCC405EX, "opbgpio", AMCC405EX_GPIO0_BASE, -1, -1, 0 },
131 1.25 kiyohara { AMCC405EX, "emac", AMCC405EX_EMAC0_BASE, 0, 24,
132 1.25 kiyohara OPB_FLAGS_EMAC_GBE | OPB_FLAGS_EMAC_STACV2 | OPB_FLAGS_EMAC_HT256 |\
133 1.25 kiyohara OPB_FLAGS_EMAC_RMII_RGMII },
134 1.25 kiyohara { AMCC405EX, "emac", AMCC405EX_EMAC1_BASE, 1, 25,
135 1.25 kiyohara OPB_FLAGS_EMAC_GBE | OPB_FLAGS_EMAC_STACV2 | OPB_FLAGS_EMAC_HT256 |\
136 1.25 kiyohara OPB_FLAGS_EMAC_RMII_RGMII },
137 1.25 kiyohara { AMCC405EX, "wdog", -1, 0, -1, 0 },
138 1.25 kiyohara
139 1.2 simonb { 0, NULL }
140 1.1 simonb };
141 1.1 simonb
142 1.25 kiyohara int (*opb_get_frequency)(void);
143 1.25 kiyohara const struct opb_param {
144 1.14 scw int pvr;
145 1.14 scw bus_addr_t base;
146 1.14 scw bus_addr_t limit;
147 1.25 kiyohara int (*opb_get_frequency)(void);
148 1.25 kiyohara bus_addr_t zmii_base;
149 1.25 kiyohara bus_addr_t rgmii_base;
150 1.25 kiyohara } opb_params[] = {
151 1.25 kiyohara { IBM405GP,
152 1.25 kiyohara IBM405GP_IP_BASE, IBM405GP_IP_BASE + OPBREG_SIZE,
153 1.25 kiyohara opb_get_frequency_405gp,
154 1.25 kiyohara 0, 0 },
155 1.25 kiyohara { IBM405GPR,
156 1.25 kiyohara IBM405GP_IP_BASE, IBM405GP_IP_BASE + OPBREG_SIZE,
157 1.25 kiyohara opb_get_frequency_405gp,
158 1.25 kiyohara 0, 0 },
159 1.25 kiyohara { AMCC405EX,
160 1.25 kiyohara AMCC405EX_OPB_BASE, AMCC405EX_OPB_BASE + OPBREG_SIZE,
161 1.25 kiyohara opb_get_frequency_405ex,
162 1.25 kiyohara 0, AMCC405EX_RGMIIB0_BASE},
163 1.25 kiyohara
164 1.25 kiyohara { 0 }
165 1.14 scw };
166 1.14 scw
167 1.25 kiyohara static int opb_match(device_t, cfdata_t, void *);
168 1.25 kiyohara static void opb_attach(device_t, device_t, void *);
169 1.25 kiyohara static int opb_submatch(device_t, cfdata_t, const int *, void *);
170 1.1 simonb static int opb_print(void *, const char *);
171 1.1 simonb
172 1.25 kiyohara CFATTACH_DECL_NEW(opb, sizeof(struct opb_softc),
173 1.10 thorpej opb_match, opb_attach, NULL, NULL);
174 1.1 simonb
175 1.14 scw static struct powerpc_bus_space opb_tag = {
176 1.23 shige _BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE,
177 1.25 kiyohara 0x00000000,
178 1.14 scw };
179 1.14 scw static char ex_storage[EXTENT_FIXED_STORAGE_SIZE(8)]
180 1.14 scw __attribute__((aligned(8)));
181 1.14 scw static int opb_tag_init_done;
182 1.14 scw
183 1.1 simonb /*
184 1.1 simonb * Probe for the opb; always succeeds.
185 1.1 simonb */
186 1.1 simonb static int
187 1.25 kiyohara opb_match(device_t parent, cfdata_t cf, void *aux)
188 1.1 simonb {
189 1.1 simonb struct opb_attach_args *oaa = aux;
190 1.1 simonb
191 1.25 kiyohara /* match only opb devices */
192 1.6 thorpej if (strcmp(oaa->opb_name, cf->cf_name) != 0)
193 1.25 kiyohara return 0;
194 1.1 simonb
195 1.25 kiyohara return 1;
196 1.1 simonb }
197 1.1 simonb
198 1.1 simonb static int
199 1.25 kiyohara opb_submatch(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
200 1.1 simonb {
201 1.1 simonb struct opb_attach_args *oaa = aux;
202 1.1 simonb
203 1.1 simonb if (cf->cf_loc[OPBCF_ADDR] != OPBCF_ADDR_DEFAULT &&
204 1.1 simonb cf->cf_loc[OPBCF_ADDR] != oaa->opb_addr)
205 1.25 kiyohara return 0;
206 1.1 simonb
207 1.25 kiyohara return config_match(parent, cf, aux);
208 1.1 simonb }
209 1.1 simonb
210 1.1 simonb /*
211 1.1 simonb * Attach the on-chip peripheral bus.
212 1.1 simonb */
213 1.1 simonb static void
214 1.25 kiyohara opb_attach(device_t parent, device_t self, void *aux)
215 1.1 simonb {
216 1.25 kiyohara struct opb_softc *sc = device_private(self);
217 1.5 simonb struct plb_attach_args *paa = aux;
218 1.1 simonb struct opb_attach_args oaa;
219 1.2 simonb int i, pvr;
220 1.1 simonb
221 1.25 kiyohara aprint_naive("\n");
222 1.25 kiyohara aprint_normal("\n");
223 1.2 simonb pvr = mfpvr() >> 16;
224 1.1 simonb
225 1.25 kiyohara sc->sc_dev = self;
226 1.25 kiyohara sc->sc_iot = opb_get_bus_space_tag();
227 1.25 kiyohara
228 1.25 kiyohara for (i = 0; opb_params[i].pvr != 0 && opb_params[i].pvr != pvr; i++)
229 1.25 kiyohara ;
230 1.25 kiyohara if (opb_params[i].pvr == 0)
231 1.25 kiyohara panic("opb_get_bus_space_tag: no params for this CPU!");
232 1.25 kiyohara opb_get_frequency = opb_params[i].opb_get_frequency;
233 1.25 kiyohara #ifdef EMAC_ZMII_PHY
234 1.25 kiyohara if (opb_params[i].zmii_base != 0)
235 1.25 kiyohara bus_space_map(sc->sc_iot, opb_params[i].zmii_base, ZMII0_SIZE,
236 1.25 kiyohara 0, &sc->sc_zmiih);
237 1.25 kiyohara #endif
238 1.25 kiyohara #ifdef EMAC_RGMII_PHY
239 1.25 kiyohara if (opb_params[i].rgmii_base != 0)
240 1.25 kiyohara bus_space_map(sc->sc_iot, opb_params[i].rgmii_base, RGMII0_SIZE,
241 1.25 kiyohara 0, &sc->sc_rgmiih);
242 1.25 kiyohara #endif
243 1.14 scw
244 1.1 simonb for (i = 0; opb_devs[i].name != NULL; i++) {
245 1.2 simonb if (opb_devs[i].pvr != pvr)
246 1.2 simonb continue;
247 1.1 simonb oaa.opb_name = opb_devs[i].name;
248 1.1 simonb oaa.opb_addr = opb_devs[i].addr;
249 1.22 thorpej oaa.opb_instance = opb_devs[i].instance;
250 1.1 simonb oaa.opb_irq = opb_devs[i].irq;
251 1.25 kiyohara oaa.opb_bt = sc->sc_iot;
252 1.5 simonb oaa.opb_dmat = paa->plb_dmat;
253 1.25 kiyohara oaa.opb_flags = opb_devs[i].flags;
254 1.1 simonb
255 1.18 drochner (void) config_found_sm_loc(self, "opb", NULL, &oaa, opb_print,
256 1.18 drochner opb_submatch);
257 1.1 simonb }
258 1.1 simonb }
259 1.1 simonb
260 1.1 simonb static int
261 1.1 simonb opb_print(void *aux, const char *pnp)
262 1.1 simonb {
263 1.1 simonb struct opb_attach_args *oaa = aux;
264 1.1 simonb
265 1.1 simonb if (pnp)
266 1.12 thorpej aprint_normal("%s at %s", oaa->opb_name, pnp);
267 1.1 simonb
268 1.1 simonb if (oaa->opb_addr != OPBCF_ADDR_DEFAULT)
269 1.12 thorpej aprint_normal(" addr 0x%08lx", oaa->opb_addr);
270 1.1 simonb if (oaa->opb_irq != OPBCF_IRQ_DEFAULT)
271 1.12 thorpej aprint_normal(" irq %d", oaa->opb_irq);
272 1.1 simonb
273 1.25 kiyohara return UNCONF;
274 1.14 scw }
275 1.14 scw
276 1.14 scw bus_space_tag_t
277 1.14 scw opb_get_bus_space_tag(void)
278 1.14 scw {
279 1.14 scw int i, pvr;
280 1.14 scw
281 1.14 scw if (!opb_tag_init_done) {
282 1.14 scw pvr = mfpvr() >> 16;
283 1.14 scw
284 1.25 kiyohara for (i = 0; opb_params[i].pvr != 0 && opb_params[i].pvr != pvr;
285 1.25 kiyohara i++)
286 1.14 scw ;
287 1.25 kiyohara if (opb_params[i].pvr == 0)
288 1.25 kiyohara panic("opb_get_bus_space_tag: no params for this CPU!");
289 1.14 scw
290 1.25 kiyohara opb_tag.pbs_base = opb_params[i].base;
291 1.25 kiyohara opb_tag.pbs_limit = opb_params[i].limit;
292 1.14 scw
293 1.14 scw if (bus_space_init(&opb_tag, "opbtag",
294 1.14 scw ex_storage, sizeof(ex_storage)))
295 1.14 scw panic("opb_attach: Failed to initialise opb_tag");
296 1.14 scw opb_tag_init_done = 1;
297 1.14 scw }
298 1.14 scw
299 1.25 kiyohara return &opb_tag;
300 1.25 kiyohara }
301 1.25 kiyohara
302 1.25 kiyohara static int
303 1.25 kiyohara opb_get_frequency_405gp(void)
304 1.25 kiyohara {
305 1.25 kiyohara prop_number_t pn;
306 1.25 kiyohara uint32_t pllmr;
307 1.25 kiyohara unsigned int processor_freq, plb_freq, opb_freq;
308 1.25 kiyohara
309 1.25 kiyohara pn = prop_dictionary_get(board_properties, "processor-frequency");
310 1.25 kiyohara KASSERT(pn != NULL);
311 1.25 kiyohara processor_freq = (unsigned int) prop_number_integer_value(pn);
312 1.25 kiyohara pllmr = mfdcr(DCR_CPC0_PLLMR);
313 1.25 kiyohara plb_freq = processor_freq / CPC0_PLLMR_CBDV(pllmr);
314 1.25 kiyohara opb_freq = plb_freq / CPC0_PLLMR_OPDV(pllmr);
315 1.25 kiyohara
316 1.25 kiyohara return opb_freq;
317 1.25 kiyohara }
318 1.25 kiyohara
319 1.25 kiyohara static int
320 1.25 kiyohara opb_get_frequency_405ex(void)
321 1.25 kiyohara {
322 1.25 kiyohara prop_number_t pn;
323 1.25 kiyohara unsigned int processor_freq, plb_freq, opb_freq;
324 1.25 kiyohara
325 1.25 kiyohara pn = prop_dictionary_get(board_properties, "processor-frequency");
326 1.25 kiyohara KASSERT(pn != NULL);
327 1.25 kiyohara processor_freq = (unsigned int) prop_number_integer_value(pn);
328 1.25 kiyohara plb_freq = processor_freq / CPR0_PLBDV0(mfcpr(DCR_CPR0_PLBD));
329 1.25 kiyohara opb_freq = plb_freq / CPR0_OPBDV0(mfcpr(DCR_CPR0_OPBD));
330 1.25 kiyohara
331 1.25 kiyohara return opb_freq;
332 1.1 simonb }
333