Home | History | Annotate | Line # | Download | only in dev
opb.c revision 1.23.68.2
      1 /* $NetBSD: opb.c,v 1.23.68.2 2010/08/11 22:52:33 yamt Exp $ */
      2 
      3 /*
      4  * Copyright 2001,2002 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *      This product includes software developed for the NetBSD Project by
     20  *      Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 /*
     39  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
     40  *
     41  * Redistribution and use in source and binary forms, with or without
     42  * modification, are permitted provided that the following conditions
     43  * are met:
     44  * 1. Redistributions of source code must retain the above copyright
     45  *    notice, this list of conditions and the following disclaimer.
     46  * 2. Redistributions in binary form must reproduce the above copyright
     47  *    notice, this list of conditions and the following disclaimer in the
     48  *    documentation and/or other materials provided with the distribution.
     49  * 3. All advertising materials mentioning features or use of this software
     50  *    must display the following acknowledgement:
     51  *      This product includes software developed by Christopher G. Demetriou
     52  *	for the NetBSD Project.
     53  * 4. The name of the author may not be used to endorse or promote products
     54  *    derived from this software without specific prior written permission
     55  *
     56  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     57  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     58  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     59  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     60  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     61  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     62  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     63  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     64  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     65  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     66  */
     67 
     68 #include <sys/cdefs.h>
     69 __KERNEL_RCSID(0, "$NetBSD: opb.c,v 1.23.68.2 2010/08/11 22:52:33 yamt Exp $");
     70 
     71 #include "locators.h"
     72 #include "opt_emac.h"
     73 
     74 #include <sys/param.h>
     75 #include <sys/systm.h>
     76 #include <sys/device.h>
     77 #include <sys/extent.h>
     78 
     79 #include <powerpc/ibm4xx/cpu.h>
     80 #include <powerpc/ibm4xx/dev/opbreg.h>
     81 #include <powerpc/ibm4xx/dev/opbvar.h>
     82 #include <powerpc/ibm4xx/dev/plbvar.h>
     83 #include <powerpc/ibm4xx/dev/rgmiireg.h>
     84 #include <powerpc/ibm4xx/dev/zmiireg.h>
     85 #include <powerpc/ibm4xx/dcr4xx.h>
     86 #include <powerpc/ibm4xx/spr.h>
     87 #include <powerpc/spr.h>
     88 
     89 #include <powerpc/ibm4xx/ibm405gp.h>
     90 #include <powerpc/ibm4xx/amcc405ex.h>
     91 
     92 static int opb_get_frequency_405gp(void);
     93 static int opb_get_frequency_405ex(void);
     94 
     95 
     96 /*
     97  * The devices on the On-chip Peripheral Bus to the 405GP/EX CPU.
     98  */
     99 const struct opb_dev {
    100 	int pvr;
    101 	const char *name;
    102 	bus_addr_t addr;
    103 	int instance;
    104 	int irq;
    105 	int flags;
    106 } opb_devs [] = {
    107 	/* IBM405GP */
    108 	{ IBM405GP,	"com",	IBM405GP_UART0_BASE,	0,  0, 0 },
    109 	{ IBM405GP,	"com",	IBM405GP_UART1_BASE,	1,  1, 0 },
    110 	{ IBM405GP,	"emac",	IBM405GP_EMAC0_BASE,	0, 15, 0 },
    111 	{ IBM405GP,	"opbgpio",	IBM405GP_GPIO0_BASE,	0, -1, 0 },
    112 	{ IBM405GP,	"gpiic",IBM405GP_IIC0_BASE,	0,  2, 0 },
    113 	{ IBM405GP,	"wdog",	-1,	        	0, -1, 0 },
    114 
    115 	/* IBM405GPR */
    116 	{ IBM405GPR,	"com",	IBM405GP_UART0_BASE,	0,  0, 0 },
    117 	{ IBM405GPR,	"com",	IBM405GP_UART1_BASE,	1,  1, 0 },
    118 	{ IBM405GPR,	"emac",	IBM405GP_EMAC0_BASE,	0, 15, 0 },
    119 	{ IBM405GPR,	"opbgpio",	IBM405GP_GPIO0_BASE,	0, -1, 0 },
    120 	{ IBM405GPR,	"gpiic",IBM405GP_IIC0_BASE,	0,  2, 0 },
    121 	{ IBM405GPR,	"wdog",	-1,	        	0, -1, 0 },
    122 
    123 	/* AMCC405EX */
    124 	{ AMCC405EX,	"gpt",	AMCC405EX_GPT0_BASE,	 0, -1, 0 },
    125 	{ AMCC405EX,	"com",	AMCC405EX_UART0_BASE,	 0, 26, 0 },
    126 	{ AMCC405EX,	"com",	AMCC405EX_UART1_BASE,	 1,  1, 0 },
    127 	{ AMCC405EX,	"gpiic",AMCC405EX_IIC0_BASE,	 0,  2, 0 },
    128 	{ AMCC405EX,	"gpiic",AMCC405EX_IIC1_BASE,	 1,  7, 0 },
    129 	{ AMCC405EX,	"scp",	AMCC405EX_SCP0_BASE,	 0,  8, 0 }, /* SPI */
    130 	{ AMCC405EX,	"opbgpio",	AMCC405EX_GPIO0_BASE,	-1, -1, 0 },
    131 	{ AMCC405EX,	"emac",	AMCC405EX_EMAC0_BASE,	 0, 24,
    132 	    OPB_FLAGS_EMAC_GBE | OPB_FLAGS_EMAC_STACV2 | OPB_FLAGS_EMAC_HT256 |\
    133 	    OPB_FLAGS_EMAC_RMII_RGMII },
    134 	{ AMCC405EX,	"emac",	AMCC405EX_EMAC1_BASE,	 1, 25,
    135 	    OPB_FLAGS_EMAC_GBE | OPB_FLAGS_EMAC_STACV2 | OPB_FLAGS_EMAC_HT256 |\
    136 	    OPB_FLAGS_EMAC_RMII_RGMII },
    137 	{ AMCC405EX,	"wdog",	-1,			 0, -1, 0 },
    138 
    139 	{ 0,		 NULL }
    140 };
    141 
    142 int (*opb_get_frequency)(void);
    143 const struct opb_param {
    144 	int pvr;
    145 	bus_addr_t base;
    146 	bus_addr_t limit;
    147 	int (*opb_get_frequency)(void);
    148 	bus_addr_t zmii_base;
    149 	bus_addr_t rgmii_base;
    150 } opb_params[] = {
    151 	{ IBM405GP,
    152 	    IBM405GP_IP_BASE,	IBM405GP_IP_BASE + OPBREG_SIZE,
    153 	    opb_get_frequency_405gp,
    154 	    0,				0 },
    155 	{ IBM405GPR,
    156 	    IBM405GP_IP_BASE,	IBM405GP_IP_BASE + OPBREG_SIZE,
    157 	    opb_get_frequency_405gp,
    158 	    0,				0 },
    159 	{ AMCC405EX,
    160 	    AMCC405EX_OPB_BASE,	AMCC405EX_OPB_BASE + OPBREG_SIZE,
    161 	    opb_get_frequency_405ex,
    162 	    0,				AMCC405EX_RGMIIB0_BASE},
    163 
    164 	{ 0 }
    165 };
    166 
    167 static int	opb_match(device_t, cfdata_t, void *);
    168 static void	opb_attach(device_t, device_t, void *);
    169 static int	opb_submatch(device_t, cfdata_t, const int *, void *);
    170 static int	opb_print(void *, const char *);
    171 
    172 CFATTACH_DECL_NEW(opb, sizeof(struct opb_softc),
    173     opb_match, opb_attach, NULL, NULL);
    174 
    175 static struct powerpc_bus_space opb_tag = {
    176 	_BUS_SPACE_BIG_ENDIAN|_BUS_SPACE_MEM_TYPE,
    177 	0x00000000,
    178 };
    179 static char ex_storage[EXTENT_FIXED_STORAGE_SIZE(8)]
    180     __attribute__((aligned(8)));
    181 static int opb_tag_init_done;
    182 
    183 /*
    184  * Probe for the opb; always succeeds.
    185  */
    186 static int
    187 opb_match(device_t parent, cfdata_t cf, void *aux)
    188 {
    189 	struct opb_attach_args *oaa = aux;
    190 
    191 	/* match only opb devices */
    192 	if (strcmp(oaa->opb_name, cf->cf_name) != 0)
    193 		return 0;
    194 
    195 	return 1;
    196 }
    197 
    198 static int
    199 opb_submatch(device_t parent, cfdata_t cf, const int *ldesc, void *aux)
    200 {
    201 	struct opb_attach_args *oaa = aux;
    202 
    203 	if (cf->cf_loc[OPBCF_ADDR] != OPBCF_ADDR_DEFAULT &&
    204 	    cf->cf_loc[OPBCF_ADDR] != oaa->opb_addr)
    205 		return 0;
    206 
    207 	return config_match(parent, cf, aux);
    208 }
    209 
    210 /*
    211  * Attach the on-chip peripheral bus.
    212  */
    213 static void
    214 opb_attach(device_t parent, device_t self, void *aux)
    215 {
    216 	struct opb_softc *sc = device_private(self);
    217 	struct plb_attach_args *paa = aux;
    218 	struct opb_attach_args oaa;
    219 	int i, pvr;
    220 
    221 	aprint_naive("\n");
    222 	aprint_normal("\n");
    223 	pvr = mfpvr() >> 16;
    224 
    225 	sc->sc_dev = self;
    226 	sc->sc_iot = opb_get_bus_space_tag();
    227 
    228 	for (i = 0; opb_params[i].pvr != 0 && opb_params[i].pvr != pvr; i++)
    229 		;
    230 	if (opb_params[i].pvr == 0)
    231 		panic("opb_get_bus_space_tag: no params for this CPU!");
    232 	opb_get_frequency = opb_params[i].opb_get_frequency;
    233 #ifdef EMAC_ZMII_PHY
    234 	if (opb_params[i].zmii_base != 0)
    235 		bus_space_map(sc->sc_iot, opb_params[i].zmii_base, ZMII0_SIZE,
    236 		    0, &sc->sc_zmiih);
    237 #endif
    238 #ifdef EMAC_RGMII_PHY
    239 	if (opb_params[i].rgmii_base != 0)
    240 		bus_space_map(sc->sc_iot, opb_params[i].rgmii_base, RGMII0_SIZE,
    241 		    0, &sc->sc_rgmiih);
    242 #endif
    243 
    244 	for (i = 0; opb_devs[i].name != NULL; i++) {
    245 		if (opb_devs[i].pvr != pvr)
    246 			continue;
    247 		oaa.opb_name = opb_devs[i].name;
    248 		oaa.opb_addr = opb_devs[i].addr;
    249 		oaa.opb_instance = opb_devs[i].instance;
    250 		oaa.opb_irq = opb_devs[i].irq;
    251 		oaa.opb_bt = sc->sc_iot;
    252 		oaa.opb_dmat = paa->plb_dmat;
    253 		oaa.opb_flags = opb_devs[i].flags;
    254 
    255 		(void) config_found_sm_loc(self, "opb", NULL, &oaa, opb_print,
    256 					   opb_submatch);
    257 	}
    258 }
    259 
    260 static int
    261 opb_print(void *aux, const char *pnp)
    262 {
    263 	struct opb_attach_args *oaa = aux;
    264 
    265 	if (pnp)
    266 		aprint_normal("%s at %s", oaa->opb_name, pnp);
    267 
    268 	if (oaa->opb_addr != OPBCF_ADDR_DEFAULT)
    269 		aprint_normal(" addr 0x%08lx", oaa->opb_addr);
    270 	if (oaa->opb_irq != OPBCF_IRQ_DEFAULT)
    271 		aprint_normal(" irq %d", oaa->opb_irq);
    272 
    273 	return UNCONF;
    274 }
    275 
    276 bus_space_tag_t
    277 opb_get_bus_space_tag(void)
    278 {
    279 	int i, pvr;
    280 
    281 	if (!opb_tag_init_done) {
    282 		pvr = mfpvr() >> 16;
    283 
    284 		for (i = 0; opb_params[i].pvr != 0 && opb_params[i].pvr != pvr;
    285 		    i++)
    286 			;
    287 		if (opb_params[i].pvr == 0)
    288 			panic("opb_get_bus_space_tag: no params for this CPU!");
    289 
    290 		opb_tag.pbs_base = opb_params[i].base;
    291 		opb_tag.pbs_limit = opb_params[i].limit;
    292 
    293 		if (bus_space_init(&opb_tag, "opbtag",
    294 		    ex_storage, sizeof(ex_storage)))
    295 			panic("opb_attach: Failed to initialise opb_tag");
    296 		opb_tag_init_done = 1;
    297 	}
    298 
    299 	return &opb_tag;
    300 }
    301 
    302 static int
    303 opb_get_frequency_405gp(void)
    304 {
    305 	prop_number_t pn;
    306 	uint32_t pllmr;
    307 	unsigned int processor_freq, plb_freq, opb_freq;
    308 
    309 	pn = prop_dictionary_get(board_properties, "processor-frequency");
    310 	KASSERT(pn != NULL);
    311 	processor_freq = (unsigned int) prop_number_integer_value(pn);
    312 	pllmr = mfdcr(DCR_CPC0_PLLMR);
    313 	plb_freq = processor_freq / CPC0_PLLMR_CBDV(pllmr);
    314 	opb_freq = plb_freq / CPC0_PLLMR_OPDV(pllmr);
    315 
    316 	return opb_freq;
    317 }
    318 
    319 static int
    320 opb_get_frequency_405ex(void)
    321 {
    322 	prop_number_t pn;
    323 	unsigned int processor_freq, plb_freq, opb_freq;
    324 
    325 	pn = prop_dictionary_get(board_properties, "processor-frequency");
    326 	KASSERT(pn != NULL);
    327 	processor_freq = (unsigned int) prop_number_integer_value(pn);
    328 	plb_freq = processor_freq / CPR0_PLBDV0(mfcpr(DCR_CPR0_PLBD));
    329 	opb_freq = plb_freq / CPR0_OPBDV0(mfcpr(DCR_CPR0_OPBD));
    330 
    331 	return opb_freq;
    332 }
    333