ibm4xx_machdep.c revision 1.22 1 1.22 cherry /* $NetBSD: ibm4xx_machdep.c,v 1.22 2016/12/22 14:47:58 cherry Exp $ */
2 1.1 shige /* Original: ibm40x_machdep.c,v 1.3 2005/01/17 17:19:36 shige Exp $ */
3 1.1 shige
4 1.1 shige /*
5 1.1 shige * Copyright 2001, 2002 Wasabi Systems, Inc.
6 1.1 shige * All rights reserved.
7 1.1 shige *
8 1.1 shige * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
9 1.1 shige *
10 1.1 shige * Redistribution and use in source and binary forms, with or without
11 1.1 shige * modification, are permitted provided that the following conditions
12 1.1 shige * are met:
13 1.1 shige * 1. Redistributions of source code must retain the above copyright
14 1.1 shige * notice, this list of conditions and the following disclaimer.
15 1.1 shige * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 shige * notice, this list of conditions and the following disclaimer in the
17 1.1 shige * documentation and/or other materials provided with the distribution.
18 1.1 shige * 3. All advertising materials mentioning features or use of this software
19 1.1 shige * must display the following acknowledgement:
20 1.1 shige * This product includes software developed for the NetBSD Project by
21 1.1 shige * Wasabi Systems, Inc.
22 1.1 shige * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23 1.1 shige * or promote products derived from this software without specific prior
24 1.1 shige * written permission.
25 1.1 shige *
26 1.1 shige * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27 1.1 shige * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 shige * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 shige * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
30 1.1 shige * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 shige * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 shige * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 shige * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 shige * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 shige * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 shige * POSSIBILITY OF SUCH DAMAGE.
37 1.1 shige */
38 1.1 shige
39 1.1 shige /*
40 1.1 shige * Copyright (C) 1995, 1996 Wolfgang Solfrank.
41 1.1 shige * Copyright (C) 1995, 1996 TooLs GmbH.
42 1.1 shige * All rights reserved.
43 1.1 shige *
44 1.1 shige * Redistribution and use in source and binary forms, with or without
45 1.1 shige * modification, are permitted provided that the following conditions
46 1.1 shige * are met:
47 1.1 shige * 1. Redistributions of source code must retain the above copyright
48 1.1 shige * notice, this list of conditions and the following disclaimer.
49 1.1 shige * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 shige * notice, this list of conditions and the following disclaimer in the
51 1.1 shige * documentation and/or other materials provided with the distribution.
52 1.1 shige * 3. All advertising materials mentioning features or use of this software
53 1.1 shige * must display the following acknowledgement:
54 1.1 shige * This product includes software developed by TooLs GmbH.
55 1.1 shige * 4. The name of TooLs GmbH may not be used to endorse or promote products
56 1.1 shige * derived from this software without specific prior written permission.
57 1.1 shige *
58 1.1 shige * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
59 1.1 shige * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
60 1.1 shige * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
61 1.1 shige * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
62 1.1 shige * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
63 1.1 shige * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
64 1.1 shige * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
65 1.1 shige * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
66 1.1 shige * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
67 1.1 shige * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68 1.1 shige */
69 1.1 shige
70 1.1 shige #include <sys/cdefs.h>
71 1.22 cherry __KERNEL_RCSID(0, "$NetBSD: ibm4xx_machdep.c,v 1.22 2016/12/22 14:47:58 cherry Exp $");
72 1.1 shige
73 1.1 shige #include "opt_compat_netbsd.h"
74 1.1 shige #include "opt_ddb.h"
75 1.1 shige #include "opt_kgdb.h"
76 1.1 shige #include "opt_ipkdb.h"
77 1.17 matt #include "opt_modular.h"
78 1.19 rin #include "ksyms.h" /* for NKSYMS */
79 1.1 shige
80 1.1 shige #include <sys/param.h>
81 1.1 shige #include <sys/msgbuf.h>
82 1.1 shige #include <sys/proc.h>
83 1.16 matt #include <sys/cpu.h>
84 1.17 matt #include <sys/ksyms.h>
85 1.1 shige
86 1.1 shige #include <uvm/uvm_extern.h>
87 1.1 shige
88 1.1 shige #if defined(DDB)
89 1.1 shige #include <machine/db_machdep.h>
90 1.1 shige #include <ddb/db_extern.h>
91 1.1 shige #endif
92 1.1 shige
93 1.1 shige #if defined(KGDB)
94 1.1 shige #include <sys/kgdb.h>
95 1.1 shige #endif
96 1.1 shige
97 1.1 shige #if defined(IPKDB)
98 1.1 shige #include <ipkdb/ipkdb.h>
99 1.1 shige #endif
100 1.1 shige
101 1.1 shige #include <machine/powerpc.h>
102 1.14 matt #include <powerpc/pcb.h>
103 1.16 matt #include <machine/trap.h>
104 1.16 matt
105 1.1 shige #include <powerpc/spr.h>
106 1.13 matt #include <powerpc/ibm4xx/spr.h>
107 1.16 matt
108 1.16 matt #include <powerpc/ibm4xx/cpu.h>
109 1.1 shige
110 1.1 shige /*
111 1.1 shige * Global variables used here and there
112 1.1 shige */
113 1.1 shige paddr_t msgbuf_paddr;
114 1.1 shige vaddr_t msgbuf_vaddr;
115 1.1 shige char msgbuf[MSGBUFSIZE];
116 1.1 shige
117 1.17 matt #if NKSYMS || defined(DDB) || defined(MODULAR)
118 1.17 matt void *startsym, *endsym;
119 1.17 matt #endif
120 1.17 matt
121 1.17 matt /*
122 1.17 matt * Trap vectors
123 1.17 matt */
124 1.17 matt extern const uint32_t defaulttrap[], defaultsize;
125 1.17 matt extern const uint32_t sctrap[], scsize;
126 1.17 matt extern const uint32_t alitrap[], alisize;
127 1.17 matt extern const uint32_t dsitrap[], dsisize;
128 1.17 matt extern const uint32_t isitrap[], isisize;
129 1.17 matt extern const uint32_t mchktrap[], mchksize;
130 1.17 matt extern const uint32_t tlbimiss4xx[], tlbim4size;
131 1.17 matt extern const uint32_t tlbdmiss4xx[], tlbdm4size;
132 1.17 matt extern const uint32_t pitfitwdog[], pitfitwdogsize;
133 1.17 matt extern const uint32_t debugtrap[], debugsize;
134 1.17 matt extern const uint32_t errata51handler[], errata51size;
135 1.19 rin #if defined(DDB)
136 1.17 matt extern const uint32_t ddblow[], ddbsize;
137 1.19 rin #endif
138 1.21 rin #if defined(IPKDB)
139 1.17 matt extern const uint32_t ipkdblow[], ipkdbsize;
140 1.17 matt #endif
141 1.17 matt static const struct exc_info trap_table[] = {
142 1.17 matt { EXC_SC, sctrap, (uintptr_t)&scsize },
143 1.17 matt { EXC_ALI, alitrap, (uintptr_t)&alisize },
144 1.17 matt { EXC_DSI, dsitrap, (uintptr_t)&dsisize },
145 1.17 matt { EXC_ISI, isitrap, (uintptr_t)&isisize },
146 1.17 matt { EXC_MCHK, mchktrap, (uintptr_t)&mchksize },
147 1.17 matt { EXC_ITMISS, tlbimiss4xx, (uintptr_t)&tlbim4size },
148 1.17 matt { EXC_DTMISS, tlbdmiss4xx, (uintptr_t)&tlbdm4size },
149 1.17 matt { EXC_PIT, pitfitwdog, (uintptr_t)&pitfitwdogsize },
150 1.17 matt { EXC_DEBUG, debugtrap, (uintptr_t)&debugsize },
151 1.17 matt { (EXC_DTMISS|EXC_ALI),
152 1.17 matt errata51handler, (uintptr_t)&errata51size },
153 1.17 matt #if defined(DDB)
154 1.17 matt { EXC_PGM, ddblow, (uintptr_t)&ddbsize },
155 1.20 rin #endif
156 1.21 rin #if defined(IPKDB)
157 1.17 matt { EXC_PGM, ipkdblow, (uintptr_t)&ipkdbsize },
158 1.20 rin #endif
159 1.17 matt };
160 1.17 matt
161 1.17 matt /*
162 1.17 matt * Install a trap vector. We cannot use memcpy because the
163 1.17 matt * destination may be zero.
164 1.17 matt */
165 1.17 matt static void
166 1.17 matt trap_copy(const uint32_t *src, vaddr_t dest, size_t len)
167 1.17 matt {
168 1.17 matt uint32_t *dest_p = (void *)dest;
169 1.17 matt
170 1.17 matt while (len > 0) {
171 1.17 matt *dest_p++ = *src++;
172 1.17 matt len -= sizeof(uint32_t);
173 1.17 matt }
174 1.17 matt }
175 1.17 matt
176 1.1 shige /*
177 1.1 shige * ibm4xx_init:
178 1.1 shige */
179 1.1 shige void
180 1.17 matt ibm4xx_init(vaddr_t startkernel, vaddr_t endkernel, void (*handler)(void))
181 1.1 shige {
182 1.1 shige /* Initialize cache info for memcpy, etc. */
183 1.1 shige cpu_probe_cache();
184 1.1 shige
185 1.1 shige /*
186 1.17 matt * Initialize current pcb and pmap pointers.
187 1.1 shige */
188 1.17 matt KASSERT(curcpu() == &cpu_info[0]);
189 1.17 matt KASSERT(lwp0.l_cpu == curcpu());
190 1.17 matt KASSERT(curlwp == &lwp0);
191 1.12 rmind
192 1.17 matt curpcb = lwp_getpcb(curlwp);
193 1.12 rmind memset(curpcb, 0, sizeof(struct pcb));
194 1.1 shige
195 1.1 shige curpcb->pcb_pm = pmap_kernel();
196 1.1 shige
197 1.17 matt for (uintptr_t exc = EXC_RSVD; exc <= EXC_LAST; exc += 0x100) {
198 1.17 matt trap_copy(defaulttrap, exc, (uintptr_t)&defaultsize);
199 1.17 matt }
200 1.1 shige
201 1.17 matt for (size_t i = 0; i < __arraycount(trap_table); i++) {
202 1.17 matt trap_copy(trap_table[i].exc_addr, trap_table[i].exc_vector,
203 1.18 kiyohara trap_table[i].exc_size);
204 1.17 matt }
205 1.18 kiyohara
206 1.1 shige __syncicache((void *)EXC_RST, EXC_LAST - EXC_RST + 0x100);
207 1.17 matt
208 1.1 shige mtspr(SPR_EVPR, 0); /* Set Exception vector base */
209 1.1 shige
210 1.1 shige /* Handle trap instruction as PGM exception */
211 1.17 matt mtspr(SPR_DBCR0, mfspr(SPR_DBCR0) & ~DBCR0_TDE);
212 1.1 shige
213 1.1 shige /*
214 1.1 shige * external interrupt handler install
215 1.1 shige */
216 1.18 kiyohara if (handler)
217 1.1 shige ibm4xx_install_extint(handler);
218 1.1 shige
219 1.1 shige /*
220 1.1 shige * Now enable translation (and machine checks/recoverable interrupts).
221 1.1 shige */
222 1.5 perry __asm volatile ("mfmsr %0; ori %0,%0,%1; mtmsr %0; isync"
223 1.18 kiyohara : : "r"(0), "K"(PSL_IR|PSL_DR));
224 1.1 shige /* XXXX PSL_ME - With ME set kernel gets stuck... */
225 1.1 shige
226 1.17 matt /*
227 1.17 matt * turn on console after enable translation
228 1.17 matt */
229 1.17 matt consinit();
230 1.17 matt
231 1.22 cherry uvm_md_init();
232 1.17 matt
233 1.18 kiyohara /*
234 1.18 kiyohara * Initialize pmap module.
235 1.18 kiyohara */
236 1.18 kiyohara pmap_bootstrap(startkernel, endkernel);
237 1.17 matt
238 1.17 matt /*
239 1.18 kiyohara * Let's take all the indirect calls via our stubs and patch
240 1.17 matt * them to be direct calls.
241 1.17 matt */
242 1.17 matt cpu_fixup_stubs();
243 1.17 matt
244 1.17 matt #if NKSYMS || defined(DDB) || defined(MODULAR)
245 1.17 matt ksyms_addsyms_elf((uintptr_t)endsym - (uintptr_t)startsym,
246 1.17 matt startsym, endsym);
247 1.17 matt #endif
248 1.1 shige }
249 1.1 shige
250 1.1 shige void
251 1.1 shige ibm4xx_install_extint(void (*handler)(void))
252 1.1 shige {
253 1.1 shige extern int extint, extsize;
254 1.1 shige extern u_long extint_call;
255 1.1 shige u_long offset = (u_long)handler - (u_long)&extint_call;
256 1.1 shige int msr;
257 1.1 shige
258 1.1 shige #ifdef DIAGNOSTIC
259 1.1 shige if (offset > 0x1ffffff)
260 1.1 shige panic("install_extint: too far away");
261 1.1 shige #endif
262 1.5 perry __asm volatile ("mfmsr %0; wrteei 0" : "=r"(msr));
263 1.1 shige extint_call = (extint_call & 0xfc000003) | offset;
264 1.1 shige memcpy((void *)EXC_EXI, &extint, (size_t)&extsize);
265 1.1 shige __syncicache((void *)&extint_call, sizeof extint_call);
266 1.1 shige __syncicache((void *)EXC_EXI, (int)&extsize);
267 1.5 perry __asm volatile ("mtmsr %0" :: "r"(msr));
268 1.1 shige }
269 1.1 shige
270 1.1 shige /*
271 1.1 shige * ibm4xx_cpu_startup:
272 1.1 shige * Machine dependent startup code.
273 1.1 shige */
274 1.1 shige void
275 1.1 shige ibm4xx_cpu_startup(const char *model)
276 1.1 shige {
277 1.1 shige vaddr_t minaddr, maxaddr;
278 1.1 shige char pbuf[9];
279 1.1 shige
280 1.1 shige KASSERT(curcpu() != NULL);
281 1.1 shige KASSERT(lwp0.l_cpu != NULL);
282 1.1 shige KASSERT(curcpu()->ci_intstk != 0);
283 1.15 matt KASSERT(curcpu()->ci_idepth == -1);
284 1.1 shige
285 1.1 shige /*
286 1.1 shige * Initialize error message buffer (at end of core).
287 1.1 shige */
288 1.1 shige #if 0 /* For some reason this fails... --Artem
289 1.1 shige * Besides, do we really have to put it at the end of core?
290 1.1 shige * Let's use static buffer for now
291 1.1 shige */
292 1.2 yamt if (!(msgbuf_vaddr = uvm_km_alloc(kernel_map, round_page(MSGBUFSIZE),
293 1.2 yamt 0, UVM_KMF_VAONLY)))
294 1.1 shige panic("startup: no room for message buffer");
295 1.1 shige for (i = 0; i < btoc(MSGBUFSIZE); i++)
296 1.1 shige pmap_kenter_pa(msgbuf_vaddr + i * PAGE_SIZE,
297 1.9 cegger msgbuf_paddr + i * PAGE_SIZE,
298 1.9 cegger VM_PROT_READ|VM_PROT_WRITE, 0);
299 1.7 christos initmsgbuf((void *)msgbuf_vaddr, round_page(MSGBUFSIZE));
300 1.1 shige #else
301 1.7 christos initmsgbuf((void *)msgbuf, round_page(MSGBUFSIZE));
302 1.1 shige #endif
303 1.1 shige
304 1.3 lukem printf("%s%s", copyright, version);
305 1.1 shige if (model != NULL)
306 1.1 shige printf("Model: %s\n", model);
307 1.1 shige
308 1.1 shige format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
309 1.1 shige printf("total memory = %s\n", pbuf);
310 1.1 shige
311 1.1 shige minaddr = 0;
312 1.1 shige /*
313 1.1 shige * Allocate a submap for physio
314 1.1 shige */
315 1.1 shige phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
316 1.6 thorpej VM_PHYS_SIZE, 0, false, NULL);
317 1.1 shige
318 1.1 shige /*
319 1.1 shige * No need to allocate an mbuf cluster submap. Mbuf clusters
320 1.1 shige * are allocated via the pool allocator, and we use direct-mapped
321 1.1 shige * pool pages.
322 1.1 shige */
323 1.1 shige
324 1.1 shige format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
325 1.1 shige printf("avail memory = %s\n", pbuf);
326 1.1 shige }
327 1.1 shige
328 1.1 shige /*
329 1.1 shige * ibm4xx_dumpsys:
330 1.1 shige * Crash dump handling.
331 1.1 shige */
332 1.1 shige void
333 1.1 shige ibm4xx_dumpsys(void)
334 1.1 shige {
335 1.1 shige
336 1.1 shige printf("dumpsys: TBD\n");
337 1.1 shige }
338