ibm4xx_machdep.c revision 1.3.6.2 1 1.3.6.2 riz /* $NetBSD: ibm4xx_machdep.c,v 1.3.6.2 2005/09/15 14:28:44 riz Exp $ */
2 1.3.6.2 riz /* Original: ibm40x_machdep.c,v 1.3 2005/01/17 17:19:36 shige Exp $ */
3 1.3.6.2 riz
4 1.3.6.2 riz /*
5 1.3.6.2 riz * Copyright 2001, 2002 Wasabi Systems, Inc.
6 1.3.6.2 riz * All rights reserved.
7 1.3.6.2 riz *
8 1.3.6.2 riz * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
9 1.3.6.2 riz *
10 1.3.6.2 riz * Redistribution and use in source and binary forms, with or without
11 1.3.6.2 riz * modification, are permitted provided that the following conditions
12 1.3.6.2 riz * are met:
13 1.3.6.2 riz * 1. Redistributions of source code must retain the above copyright
14 1.3.6.2 riz * notice, this list of conditions and the following disclaimer.
15 1.3.6.2 riz * 2. Redistributions in binary form must reproduce the above copyright
16 1.3.6.2 riz * notice, this list of conditions and the following disclaimer in the
17 1.3.6.2 riz * documentation and/or other materials provided with the distribution.
18 1.3.6.2 riz * 3. All advertising materials mentioning features or use of this software
19 1.3.6.2 riz * must display the following acknowledgement:
20 1.3.6.2 riz * This product includes software developed for the NetBSD Project by
21 1.3.6.2 riz * Wasabi Systems, Inc.
22 1.3.6.2 riz * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23 1.3.6.2 riz * or promote products derived from this software without specific prior
24 1.3.6.2 riz * written permission.
25 1.3.6.2 riz *
26 1.3.6.2 riz * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27 1.3.6.2 riz * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.3.6.2 riz * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.3.6.2 riz * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
30 1.3.6.2 riz * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.3.6.2 riz * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.3.6.2 riz * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.3.6.2 riz * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.3.6.2 riz * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.3.6.2 riz * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.3.6.2 riz * POSSIBILITY OF SUCH DAMAGE.
37 1.3.6.2 riz */
38 1.3.6.2 riz
39 1.3.6.2 riz /*
40 1.3.6.2 riz * Copyright (C) 1995, 1996 Wolfgang Solfrank.
41 1.3.6.2 riz * Copyright (C) 1995, 1996 TooLs GmbH.
42 1.3.6.2 riz * All rights reserved.
43 1.3.6.2 riz *
44 1.3.6.2 riz * Redistribution and use in source and binary forms, with or without
45 1.3.6.2 riz * modification, are permitted provided that the following conditions
46 1.3.6.2 riz * are met:
47 1.3.6.2 riz * 1. Redistributions of source code must retain the above copyright
48 1.3.6.2 riz * notice, this list of conditions and the following disclaimer.
49 1.3.6.2 riz * 2. Redistributions in binary form must reproduce the above copyright
50 1.3.6.2 riz * notice, this list of conditions and the following disclaimer in the
51 1.3.6.2 riz * documentation and/or other materials provided with the distribution.
52 1.3.6.2 riz * 3. All advertising materials mentioning features or use of this software
53 1.3.6.2 riz * must display the following acknowledgement:
54 1.3.6.2 riz * This product includes software developed by TooLs GmbH.
55 1.3.6.2 riz * 4. The name of TooLs GmbH may not be used to endorse or promote products
56 1.3.6.2 riz * derived from this software without specific prior written permission.
57 1.3.6.2 riz *
58 1.3.6.2 riz * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
59 1.3.6.2 riz * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
60 1.3.6.2 riz * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
61 1.3.6.2 riz * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
62 1.3.6.2 riz * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
63 1.3.6.2 riz * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
64 1.3.6.2 riz * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
65 1.3.6.2 riz * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
66 1.3.6.2 riz * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
67 1.3.6.2 riz * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68 1.3.6.2 riz */
69 1.3.6.2 riz
70 1.3.6.2 riz #include <sys/cdefs.h>
71 1.3.6.2 riz __KERNEL_RCSID(0, "$NetBSD: ibm4xx_machdep.c,v 1.3.6.2 2005/09/15 14:28:44 riz Exp $");
72 1.3.6.2 riz
73 1.3.6.2 riz #include "opt_compat_netbsd.h"
74 1.3.6.2 riz #include "opt_ddb.h"
75 1.3.6.2 riz #include "opt_kgdb.h"
76 1.3.6.2 riz #include "opt_ipkdb.h"
77 1.3.6.2 riz
78 1.3.6.2 riz #include <sys/param.h>
79 1.3.6.2 riz #include <sys/msgbuf.h>
80 1.3.6.2 riz #include <sys/proc.h>
81 1.3.6.2 riz #include <sys/user.h>
82 1.3.6.2 riz
83 1.3.6.2 riz #include <uvm/uvm_extern.h>
84 1.3.6.2 riz
85 1.3.6.2 riz #if defined(DDB)
86 1.3.6.2 riz #include <machine/db_machdep.h>
87 1.3.6.2 riz #include <ddb/db_extern.h>
88 1.3.6.2 riz #endif
89 1.3.6.2 riz
90 1.3.6.2 riz #if defined(KGDB)
91 1.3.6.2 riz #include <sys/kgdb.h>
92 1.3.6.2 riz #endif
93 1.3.6.2 riz
94 1.3.6.2 riz #if defined(IPKDB)
95 1.3.6.2 riz #include <ipkdb/ipkdb.h>
96 1.3.6.2 riz #endif
97 1.3.6.2 riz
98 1.3.6.2 riz #include <machine/powerpc.h>
99 1.3.6.2 riz #include <powerpc/spr.h>
100 1.3.6.2 riz #include <machine/trap.h>
101 1.3.6.2 riz
102 1.3.6.2 riz /*
103 1.3.6.2 riz * Global variables used here and there
104 1.3.6.2 riz */
105 1.3.6.2 riz extern struct user *proc0paddr;
106 1.3.6.2 riz paddr_t msgbuf_paddr;
107 1.3.6.2 riz vaddr_t msgbuf_vaddr;
108 1.3.6.2 riz char msgbuf[MSGBUFSIZE];
109 1.3.6.2 riz
110 1.3.6.2 riz /*
111 1.3.6.2 riz * ibm4xx_init:
112 1.3.6.2 riz */
113 1.3.6.2 riz void
114 1.3.6.2 riz ibm4xx_init(void (*handler)(void))
115 1.3.6.2 riz {
116 1.3.6.2 riz extern int defaulttrap, defaultsize;
117 1.3.6.2 riz extern int sctrap, scsize;
118 1.3.6.2 riz extern int alitrap, alisize;
119 1.3.6.2 riz extern int dsitrap, dsisize;
120 1.3.6.2 riz extern int isitrap, isisize;
121 1.3.6.2 riz extern int mchktrap, mchksize;
122 1.3.6.2 riz extern int tlbimiss4xx, tlbim4size;
123 1.3.6.2 riz extern int tlbdmiss4xx, tlbdm4size;
124 1.3.6.2 riz extern int pitfitwdog, pitfitwdogsize;
125 1.3.6.2 riz extern int debugtrap, debugsize;
126 1.3.6.2 riz extern int errata51handler, errata51size;
127 1.3.6.2 riz #ifdef DDB
128 1.3.6.2 riz extern int ddblow, ddbsize;
129 1.3.6.2 riz #endif
130 1.3.6.2 riz #ifdef IPKDB
131 1.3.6.2 riz extern int ipkdblow, ipkdbsize;
132 1.3.6.2 riz #endif
133 1.3.6.2 riz uintptr_t exc;
134 1.3.6.2 riz struct cpu_info * const ci = curcpu();
135 1.3.6.2 riz
136 1.3.6.2 riz /* Initialize cache info for memcpy, etc. */
137 1.3.6.2 riz cpu_probe_cache();
138 1.3.6.2 riz
139 1.3.6.2 riz /*
140 1.3.6.2 riz * Initialize lwp0 and current pcb and pmap pointers.
141 1.3.6.2 riz */
142 1.3.6.2 riz KASSERT(ci != NULL);
143 1.3.6.2 riz KASSERT(curcpu() == ci);
144 1.3.6.2 riz lwp0.l_cpu = ci;
145 1.3.6.2 riz lwp0.l_addr = proc0paddr;
146 1.3.6.2 riz memset(lwp0.l_addr, 0, sizeof *lwp0.l_addr);
147 1.3.6.2 riz KASSERT(lwp0.l_cpu != NULL);
148 1.3.6.2 riz
149 1.3.6.2 riz curpcb = &proc0paddr->u_pcb;
150 1.3.6.2 riz memset(curpcb, 0, sizeof(*curpcb));
151 1.3.6.2 riz curpcb->pcb_pm = pmap_kernel();
152 1.3.6.2 riz
153 1.3.6.2 riz /*
154 1.3.6.2 riz * Set up trap vectors
155 1.3.6.2 riz */
156 1.3.6.2 riz for (exc = EXC_RSVD; exc <= EXC_LAST; exc += 0x100)
157 1.3.6.2 riz switch (exc) {
158 1.3.6.2 riz default:
159 1.3.6.2 riz memcpy((void *)exc, &defaulttrap, (size_t)&defaultsize);
160 1.3.6.2 riz break;
161 1.3.6.2 riz case EXC_EXI:
162 1.3.6.2 riz /*
163 1.3.6.2 riz * This one is (potentially) installed during autoconf
164 1.3.6.2 riz */
165 1.3.6.2 riz break;
166 1.3.6.2 riz case EXC_SC:
167 1.3.6.2 riz memcpy((void *)EXC_SC, &sctrap, (size_t)&scsize);
168 1.3.6.2 riz break;
169 1.3.6.2 riz case EXC_ALI:
170 1.3.6.2 riz memcpy((void *)EXC_ALI, &alitrap, (size_t)&alisize);
171 1.3.6.2 riz break;
172 1.3.6.2 riz case EXC_DSI:
173 1.3.6.2 riz memcpy((void *)EXC_DSI, &dsitrap, (size_t)&dsisize);
174 1.3.6.2 riz break;
175 1.3.6.2 riz case EXC_ISI:
176 1.3.6.2 riz memcpy((void *)EXC_ISI, &isitrap, (size_t)&isisize);
177 1.3.6.2 riz break;
178 1.3.6.2 riz case EXC_MCHK:
179 1.3.6.2 riz memcpy((void *)EXC_MCHK, &mchktrap, (size_t)&mchksize);
180 1.3.6.2 riz break;
181 1.3.6.2 riz case EXC_ITMISS:
182 1.3.6.2 riz memcpy((void *)EXC_ITMISS, &tlbimiss4xx,
183 1.3.6.2 riz (size_t)&tlbim4size);
184 1.3.6.2 riz break;
185 1.3.6.2 riz case EXC_DTMISS:
186 1.3.6.2 riz memcpy((void *)EXC_DTMISS, &tlbdmiss4xx,
187 1.3.6.2 riz (size_t)&tlbdm4size);
188 1.3.6.2 riz break;
189 1.3.6.2 riz /*
190 1.3.6.2 riz * EXC_PIT, EXC_FIT, EXC_WDOG handlers
191 1.3.6.2 riz * are spaced by 0x10 bytes only..
192 1.3.6.2 riz */
193 1.3.6.2 riz case EXC_PIT:
194 1.3.6.2 riz memcpy((void *)EXC_PIT, &pitfitwdog,
195 1.3.6.2 riz (size_t)&pitfitwdogsize);
196 1.3.6.2 riz break;
197 1.3.6.2 riz case EXC_DEBUG:
198 1.3.6.2 riz memcpy((void *)EXC_DEBUG, &debugtrap,
199 1.3.6.2 riz (size_t)&debugsize);
200 1.3.6.2 riz break;
201 1.3.6.2 riz case EXC_DTMISS|EXC_ALI:
202 1.3.6.2 riz /* PPC405GP Rev D errata item 51 */
203 1.3.6.2 riz memcpy((void *)(EXC_DTMISS|EXC_ALI), &errata51handler,
204 1.3.6.2 riz (size_t)&errata51size);
205 1.3.6.2 riz break;
206 1.3.6.2 riz #if defined(DDB) || defined(IPKDB)
207 1.3.6.2 riz case EXC_PGM:
208 1.3.6.2 riz #if defined(DDB)
209 1.3.6.2 riz memcpy((void *)exc, &ddblow, (size_t)&ddbsize);
210 1.3.6.2 riz #elif defined(IPKDB)
211 1.3.6.2 riz memcpy((void *)exc, &ipkdblow, (size_t)&ipkdbsize);
212 1.3.6.2 riz #endif
213 1.3.6.2 riz #endif /* DDB | IPKDB */
214 1.3.6.2 riz break;
215 1.3.6.2 riz }
216 1.3.6.2 riz
217 1.3.6.2 riz __syncicache((void *)EXC_RST, EXC_LAST - EXC_RST + 0x100);
218 1.3.6.2 riz mtspr(SPR_EVPR, 0); /* Set Exception vector base */
219 1.3.6.2 riz
220 1.3.6.2 riz consinit();
221 1.3.6.2 riz
222 1.3.6.2 riz /* Handle trap instruction as PGM exception */
223 1.3.6.2 riz {
224 1.3.6.2 riz int dbcr0;
225 1.3.6.2 riz asm volatile("mfspr %0,%1":"=r"(dbcr0):"K"(SPR_DBCR0));
226 1.3.6.2 riz asm volatile("mtspr %0,%1"::"K"(SPR_DBCR0),"r"(dbcr0 & ~DBCR0_TDE));
227 1.3.6.2 riz }
228 1.3.6.2 riz
229 1.3.6.2 riz /*
230 1.3.6.2 riz * external interrupt handler install
231 1.3.6.2 riz */
232 1.3.6.2 riz if (handler)
233 1.3.6.2 riz ibm4xx_install_extint(handler);
234 1.3.6.2 riz
235 1.3.6.2 riz /*
236 1.3.6.2 riz * Now enable translation (and machine checks/recoverable interrupts).
237 1.3.6.2 riz */
238 1.3.6.2 riz asm volatile ("mfmsr %0; ori %0,%0,%1; mtmsr %0; isync"
239 1.3.6.2 riz : : "r"(0), "K"(PSL_IR|PSL_DR));
240 1.3.6.2 riz /* XXXX PSL_ME - With ME set kernel gets stuck... */
241 1.3.6.2 riz
242 1.3.6.2 riz KASSERT(curcpu() == ci);
243 1.3.6.2 riz }
244 1.3.6.2 riz
245 1.3.6.2 riz void
246 1.3.6.2 riz ibm4xx_install_extint(void (*handler)(void))
247 1.3.6.2 riz {
248 1.3.6.2 riz extern int extint, extsize;
249 1.3.6.2 riz extern u_long extint_call;
250 1.3.6.2 riz u_long offset = (u_long)handler - (u_long)&extint_call;
251 1.3.6.2 riz int msr;
252 1.3.6.2 riz
253 1.3.6.2 riz #ifdef DIAGNOSTIC
254 1.3.6.2 riz if (offset > 0x1ffffff)
255 1.3.6.2 riz panic("install_extint: too far away");
256 1.3.6.2 riz #endif
257 1.3.6.2 riz asm volatile ("mfmsr %0; wrteei 0" : "=r"(msr));
258 1.3.6.2 riz extint_call = (extint_call & 0xfc000003) | offset;
259 1.3.6.2 riz memcpy((void *)EXC_EXI, &extint, (size_t)&extsize);
260 1.3.6.2 riz __syncicache((void *)&extint_call, sizeof extint_call);
261 1.3.6.2 riz __syncicache((void *)EXC_EXI, (int)&extsize);
262 1.3.6.2 riz asm volatile ("mtmsr %0" :: "r"(msr));
263 1.3.6.2 riz }
264 1.3.6.2 riz
265 1.3.6.2 riz /*
266 1.3.6.2 riz * ibm4xx_cpu_startup:
267 1.3.6.2 riz * Machine dependent startup code.
268 1.3.6.2 riz */
269 1.3.6.2 riz void
270 1.3.6.2 riz ibm4xx_cpu_startup(const char *model)
271 1.3.6.2 riz {
272 1.3.6.2 riz vaddr_t minaddr, maxaddr;
273 1.3.6.2 riz char pbuf[9];
274 1.3.6.2 riz
275 1.3.6.2 riz KASSERT(curcpu() != NULL);
276 1.3.6.2 riz KASSERT(lwp0.l_cpu != NULL);
277 1.3.6.2 riz KASSERT(curcpu()->ci_intstk != 0);
278 1.3.6.2 riz KASSERT(curcpu()->ci_intrdepth == -1);
279 1.3.6.2 riz
280 1.3.6.2 riz /*
281 1.3.6.2 riz * Initialize error message buffer (at end of core).
282 1.3.6.2 riz */
283 1.3.6.2 riz #if 0 /* For some reason this fails... --Artem
284 1.3.6.2 riz * Besides, do we really have to put it at the end of core?
285 1.3.6.2 riz * Let's use static buffer for now
286 1.3.6.2 riz */
287 1.3.6.2 riz if (!(msgbuf_vaddr = uvm_km_alloc(kernel_map, round_page(MSGBUFSIZE),
288 1.3.6.2 riz 0, UVM_KMF_VAONLY)))
289 1.3.6.2 riz panic("startup: no room for message buffer");
290 1.3.6.2 riz for (i = 0; i < btoc(MSGBUFSIZE); i++)
291 1.3.6.2 riz pmap_kenter_pa(msgbuf_vaddr + i * PAGE_SIZE,
292 1.3.6.2 riz msgbuf_paddr + i * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE);
293 1.3.6.2 riz initmsgbuf((caddr_t)msgbuf_vaddr, round_page(MSGBUFSIZE));
294 1.3.6.2 riz #else
295 1.3.6.2 riz initmsgbuf((caddr_t)msgbuf, round_page(MSGBUFSIZE));
296 1.3.6.2 riz #endif
297 1.3.6.2 riz
298 1.3.6.2 riz printf("%s%s", copyright, version);
299 1.3.6.2 riz if (model != NULL)
300 1.3.6.2 riz printf("Model: %s\n", model);
301 1.3.6.2 riz
302 1.3.6.2 riz format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
303 1.3.6.2 riz printf("total memory = %s\n", pbuf);
304 1.3.6.2 riz
305 1.3.6.2 riz minaddr = 0;
306 1.3.6.2 riz /*
307 1.3.6.2 riz * Allocate a submap for exec arguments. This map effectively
308 1.3.6.2 riz * limits the number of processes exec'ing at any time.
309 1.3.6.2 riz */
310 1.3.6.2 riz exec_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
311 1.3.6.2 riz 16*NCARGS, VM_MAP_PAGEABLE, FALSE, NULL);
312 1.3.6.2 riz
313 1.3.6.2 riz /*
314 1.3.6.2 riz * Allocate a submap for physio
315 1.3.6.2 riz */
316 1.3.6.2 riz phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
317 1.3.6.2 riz VM_PHYS_SIZE, 0, FALSE, NULL);
318 1.3.6.2 riz
319 1.3.6.2 riz /*
320 1.3.6.2 riz * No need to allocate an mbuf cluster submap. Mbuf clusters
321 1.3.6.2 riz * are allocated via the pool allocator, and we use direct-mapped
322 1.3.6.2 riz * pool pages.
323 1.3.6.2 riz */
324 1.3.6.2 riz
325 1.3.6.2 riz format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
326 1.3.6.2 riz printf("avail memory = %s\n", pbuf);
327 1.3.6.2 riz }
328 1.3.6.2 riz
329 1.3.6.2 riz /*
330 1.3.6.2 riz * ibm4xx_dumpsys:
331 1.3.6.2 riz * Crash dump handling.
332 1.3.6.2 riz */
333 1.3.6.2 riz void
334 1.3.6.2 riz ibm4xx_dumpsys(void)
335 1.3.6.2 riz {
336 1.3.6.2 riz
337 1.3.6.2 riz printf("dumpsys: TBD\n");
338 1.3.6.2 riz }
339