ibm4xx_machdep.c revision 1.8.18.2 1 1.8.18.2 matt /* $NetBSD: ibm4xx_machdep.c,v 1.8.18.2 2011/01/17 07:45:59 matt Exp $ */
2 1.1 shige /* Original: ibm40x_machdep.c,v 1.3 2005/01/17 17:19:36 shige Exp $ */
3 1.1 shige
4 1.1 shige /*
5 1.1 shige * Copyright 2001, 2002 Wasabi Systems, Inc.
6 1.1 shige * All rights reserved.
7 1.1 shige *
8 1.1 shige * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
9 1.1 shige *
10 1.1 shige * Redistribution and use in source and binary forms, with or without
11 1.1 shige * modification, are permitted provided that the following conditions
12 1.1 shige * are met:
13 1.1 shige * 1. Redistributions of source code must retain the above copyright
14 1.1 shige * notice, this list of conditions and the following disclaimer.
15 1.1 shige * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 shige * notice, this list of conditions and the following disclaimer in the
17 1.1 shige * documentation and/or other materials provided with the distribution.
18 1.1 shige * 3. All advertising materials mentioning features or use of this software
19 1.1 shige * must display the following acknowledgement:
20 1.1 shige * This product includes software developed for the NetBSD Project by
21 1.1 shige * Wasabi Systems, Inc.
22 1.1 shige * 4. The name of Wasabi Systems, Inc. may not be used to endorse
23 1.1 shige * or promote products derived from this software without specific prior
24 1.1 shige * written permission.
25 1.1 shige *
26 1.1 shige * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
27 1.1 shige * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 shige * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 shige * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
30 1.1 shige * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 shige * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 shige * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 shige * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 shige * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 shige * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 shige * POSSIBILITY OF SUCH DAMAGE.
37 1.1 shige */
38 1.1 shige
39 1.1 shige /*
40 1.1 shige * Copyright (C) 1995, 1996 Wolfgang Solfrank.
41 1.1 shige * Copyright (C) 1995, 1996 TooLs GmbH.
42 1.1 shige * All rights reserved.
43 1.1 shige *
44 1.1 shige * Redistribution and use in source and binary forms, with or without
45 1.1 shige * modification, are permitted provided that the following conditions
46 1.1 shige * are met:
47 1.1 shige * 1. Redistributions of source code must retain the above copyright
48 1.1 shige * notice, this list of conditions and the following disclaimer.
49 1.1 shige * 2. Redistributions in binary form must reproduce the above copyright
50 1.1 shige * notice, this list of conditions and the following disclaimer in the
51 1.1 shige * documentation and/or other materials provided with the distribution.
52 1.1 shige * 3. All advertising materials mentioning features or use of this software
53 1.1 shige * must display the following acknowledgement:
54 1.1 shige * This product includes software developed by TooLs GmbH.
55 1.1 shige * 4. The name of TooLs GmbH may not be used to endorse or promote products
56 1.1 shige * derived from this software without specific prior written permission.
57 1.1 shige *
58 1.1 shige * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
59 1.1 shige * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
60 1.1 shige * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
61 1.1 shige * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
62 1.1 shige * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
63 1.1 shige * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
64 1.1 shige * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
65 1.1 shige * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
66 1.1 shige * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
67 1.1 shige * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
68 1.1 shige */
69 1.1 shige
70 1.1 shige #include <sys/cdefs.h>
71 1.8.18.2 matt __KERNEL_RCSID(0, "$NetBSD: ibm4xx_machdep.c,v 1.8.18.2 2011/01/17 07:45:59 matt Exp $");
72 1.1 shige
73 1.1 shige #include "opt_compat_netbsd.h"
74 1.1 shige #include "opt_ddb.h"
75 1.1 shige #include "opt_kgdb.h"
76 1.1 shige #include "opt_ipkdb.h"
77 1.1 shige
78 1.1 shige #include <sys/param.h>
79 1.1 shige #include <sys/msgbuf.h>
80 1.1 shige #include <sys/proc.h>
81 1.1 shige #include <sys/user.h>
82 1.1 shige
83 1.1 shige #include <uvm/uvm_extern.h>
84 1.1 shige
85 1.1 shige #if defined(DDB)
86 1.1 shige #include <machine/db_machdep.h>
87 1.1 shige #include <ddb/db_extern.h>
88 1.1 shige #endif
89 1.1 shige
90 1.1 shige #if defined(KGDB)
91 1.1 shige #include <sys/kgdb.h>
92 1.1 shige #endif
93 1.1 shige
94 1.1 shige #if defined(IPKDB)
95 1.1 shige #include <ipkdb/ipkdb.h>
96 1.1 shige #endif
97 1.1 shige
98 1.1 shige #include <machine/powerpc.h>
99 1.1 shige #include <powerpc/spr.h>
100 1.8.18.1 matt #include <powerpc/ibm4xx/spr.h>
101 1.1 shige #include <machine/trap.h>
102 1.1 shige
103 1.1 shige /*
104 1.1 shige * Global variables used here and there
105 1.1 shige */
106 1.1 shige extern struct user *proc0paddr;
107 1.1 shige paddr_t msgbuf_paddr;
108 1.1 shige vaddr_t msgbuf_vaddr;
109 1.1 shige char msgbuf[MSGBUFSIZE];
110 1.1 shige
111 1.1 shige /*
112 1.1 shige * ibm4xx_init:
113 1.1 shige */
114 1.1 shige void
115 1.1 shige ibm4xx_init(void (*handler)(void))
116 1.1 shige {
117 1.1 shige extern int defaulttrap, defaultsize;
118 1.1 shige extern int sctrap, scsize;
119 1.1 shige extern int alitrap, alisize;
120 1.1 shige extern int dsitrap, dsisize;
121 1.1 shige extern int isitrap, isisize;
122 1.1 shige extern int mchktrap, mchksize;
123 1.1 shige extern int tlbimiss4xx, tlbim4size;
124 1.1 shige extern int tlbdmiss4xx, tlbdm4size;
125 1.1 shige extern int pitfitwdog, pitfitwdogsize;
126 1.1 shige extern int debugtrap, debugsize;
127 1.1 shige extern int errata51handler, errata51size;
128 1.1 shige #ifdef DDB
129 1.1 shige extern int ddblow, ddbsize;
130 1.1 shige #endif
131 1.1 shige #ifdef IPKDB
132 1.1 shige extern int ipkdblow, ipkdbsize;
133 1.1 shige #endif
134 1.1 shige uintptr_t exc;
135 1.1 shige struct cpu_info * const ci = curcpu();
136 1.1 shige
137 1.1 shige /* Initialize cache info for memcpy, etc. */
138 1.1 shige cpu_probe_cache();
139 1.1 shige
140 1.1 shige /*
141 1.1 shige * Initialize lwp0 and current pcb and pmap pointers.
142 1.1 shige */
143 1.1 shige KASSERT(ci != NULL);
144 1.1 shige KASSERT(curcpu() == ci);
145 1.1 shige lwp0.l_cpu = ci;
146 1.1 shige lwp0.l_addr = proc0paddr;
147 1.8.18.2 matt lwp0.l_md.md_fpucpu = ci;
148 1.8.18.2 matt lwp0.l_md.md_veccpu = ci;
149 1.8.18.2 matt lwp0.l_md.md_utf = trapframe(&lwp0);
150 1.8.18.2 matt ci->ci_fpulwp = &lwp0;
151 1.8.18.2 matt ci->ci_veclwp = &lwp0;
152 1.1 shige memset(lwp0.l_addr, 0, sizeof *lwp0.l_addr);
153 1.1 shige KASSERT(lwp0.l_cpu != NULL);
154 1.1 shige
155 1.8.18.2 matt curpcb = lwp_getpcb(&lwp0);
156 1.1 shige curpcb->pcb_pm = pmap_kernel();
157 1.1 shige
158 1.1 shige /*
159 1.1 shige * Set up trap vectors
160 1.1 shige */
161 1.1 shige for (exc = EXC_RSVD; exc <= EXC_LAST; exc += 0x100)
162 1.1 shige switch (exc) {
163 1.1 shige default:
164 1.1 shige memcpy((void *)exc, &defaulttrap, (size_t)&defaultsize);
165 1.1 shige break;
166 1.1 shige case EXC_EXI:
167 1.1 shige /*
168 1.1 shige * This one is (potentially) installed during autoconf
169 1.1 shige */
170 1.1 shige break;
171 1.1 shige case EXC_SC:
172 1.1 shige memcpy((void *)EXC_SC, &sctrap, (size_t)&scsize);
173 1.1 shige break;
174 1.1 shige case EXC_ALI:
175 1.1 shige memcpy((void *)EXC_ALI, &alitrap, (size_t)&alisize);
176 1.1 shige break;
177 1.1 shige case EXC_DSI:
178 1.1 shige memcpy((void *)EXC_DSI, &dsitrap, (size_t)&dsisize);
179 1.1 shige break;
180 1.1 shige case EXC_ISI:
181 1.1 shige memcpy((void *)EXC_ISI, &isitrap, (size_t)&isisize);
182 1.1 shige break;
183 1.1 shige case EXC_MCHK:
184 1.1 shige memcpy((void *)EXC_MCHK, &mchktrap, (size_t)&mchksize);
185 1.1 shige break;
186 1.1 shige case EXC_ITMISS:
187 1.1 shige memcpy((void *)EXC_ITMISS, &tlbimiss4xx,
188 1.1 shige (size_t)&tlbim4size);
189 1.1 shige break;
190 1.1 shige case EXC_DTMISS:
191 1.1 shige memcpy((void *)EXC_DTMISS, &tlbdmiss4xx,
192 1.1 shige (size_t)&tlbdm4size);
193 1.1 shige break;
194 1.1 shige /*
195 1.1 shige * EXC_PIT, EXC_FIT, EXC_WDOG handlers
196 1.1 shige * are spaced by 0x10 bytes only..
197 1.1 shige */
198 1.1 shige case EXC_PIT:
199 1.1 shige memcpy((void *)EXC_PIT, &pitfitwdog,
200 1.1 shige (size_t)&pitfitwdogsize);
201 1.1 shige break;
202 1.1 shige case EXC_DEBUG:
203 1.1 shige memcpy((void *)EXC_DEBUG, &debugtrap,
204 1.1 shige (size_t)&debugsize);
205 1.1 shige break;
206 1.1 shige case EXC_DTMISS|EXC_ALI:
207 1.1 shige /* PPC405GP Rev D errata item 51 */
208 1.1 shige memcpy((void *)(EXC_DTMISS|EXC_ALI), &errata51handler,
209 1.1 shige (size_t)&errata51size);
210 1.1 shige break;
211 1.1 shige #if defined(DDB) || defined(IPKDB)
212 1.1 shige case EXC_PGM:
213 1.1 shige #if defined(DDB)
214 1.1 shige memcpy((void *)exc, &ddblow, (size_t)&ddbsize);
215 1.1 shige #elif defined(IPKDB)
216 1.1 shige memcpy((void *)exc, &ipkdblow, (size_t)&ipkdbsize);
217 1.1 shige #endif
218 1.1 shige #endif /* DDB | IPKDB */
219 1.1 shige break;
220 1.1 shige }
221 1.1 shige
222 1.1 shige __syncicache((void *)EXC_RST, EXC_LAST - EXC_RST + 0x100);
223 1.1 shige mtspr(SPR_EVPR, 0); /* Set Exception vector base */
224 1.1 shige
225 1.1 shige consinit();
226 1.1 shige
227 1.1 shige /* Handle trap instruction as PGM exception */
228 1.1 shige {
229 1.1 shige int dbcr0;
230 1.5 perry __asm volatile("mfspr %0,%1":"=r"(dbcr0):"K"(SPR_DBCR0));
231 1.5 perry __asm volatile("mtspr %0,%1"::"K"(SPR_DBCR0),"r"(dbcr0 & ~DBCR0_TDE));
232 1.1 shige }
233 1.1 shige
234 1.1 shige /*
235 1.1 shige * external interrupt handler install
236 1.1 shige */
237 1.1 shige if (handler)
238 1.1 shige ibm4xx_install_extint(handler);
239 1.1 shige
240 1.1 shige /*
241 1.1 shige * Now enable translation (and machine checks/recoverable interrupts).
242 1.1 shige */
243 1.5 perry __asm volatile ("mfmsr %0; ori %0,%0,%1; mtmsr %0; isync"
244 1.1 shige : : "r"(0), "K"(PSL_IR|PSL_DR));
245 1.1 shige /* XXXX PSL_ME - With ME set kernel gets stuck... */
246 1.1 shige
247 1.1 shige KASSERT(curcpu() == ci);
248 1.1 shige }
249 1.1 shige
250 1.1 shige void
251 1.1 shige ibm4xx_install_extint(void (*handler)(void))
252 1.1 shige {
253 1.1 shige extern int extint, extsize;
254 1.1 shige extern u_long extint_call;
255 1.1 shige u_long offset = (u_long)handler - (u_long)&extint_call;
256 1.1 shige int msr;
257 1.1 shige
258 1.1 shige #ifdef DIAGNOSTIC
259 1.1 shige if (offset > 0x1ffffff)
260 1.1 shige panic("install_extint: too far away");
261 1.1 shige #endif
262 1.5 perry __asm volatile ("mfmsr %0; wrteei 0" : "=r"(msr));
263 1.1 shige extint_call = (extint_call & 0xfc000003) | offset;
264 1.1 shige memcpy((void *)EXC_EXI, &extint, (size_t)&extsize);
265 1.1 shige __syncicache((void *)&extint_call, sizeof extint_call);
266 1.1 shige __syncicache((void *)EXC_EXI, (int)&extsize);
267 1.5 perry __asm volatile ("mtmsr %0" :: "r"(msr));
268 1.1 shige }
269 1.1 shige
270 1.1 shige /*
271 1.1 shige * ibm4xx_cpu_startup:
272 1.1 shige * Machine dependent startup code.
273 1.1 shige */
274 1.1 shige void
275 1.1 shige ibm4xx_cpu_startup(const char *model)
276 1.1 shige {
277 1.1 shige vaddr_t minaddr, maxaddr;
278 1.1 shige char pbuf[9];
279 1.1 shige
280 1.1 shige KASSERT(curcpu() != NULL);
281 1.1 shige KASSERT(lwp0.l_cpu != NULL);
282 1.1 shige KASSERT(curcpu()->ci_intstk != 0);
283 1.8.18.1 matt KASSERT(curcpu()->ci_idepth == -1);
284 1.1 shige
285 1.1 shige /*
286 1.1 shige * Initialize error message buffer (at end of core).
287 1.1 shige */
288 1.1 shige #if 0 /* For some reason this fails... --Artem
289 1.1 shige * Besides, do we really have to put it at the end of core?
290 1.1 shige * Let's use static buffer for now
291 1.1 shige */
292 1.2 yamt if (!(msgbuf_vaddr = uvm_km_alloc(kernel_map, round_page(MSGBUFSIZE),
293 1.2 yamt 0, UVM_KMF_VAONLY)))
294 1.1 shige panic("startup: no room for message buffer");
295 1.1 shige for (i = 0; i < btoc(MSGBUFSIZE); i++)
296 1.1 shige pmap_kenter_pa(msgbuf_vaddr + i * PAGE_SIZE,
297 1.1 shige msgbuf_paddr + i * PAGE_SIZE, VM_PROT_READ|VM_PROT_WRITE);
298 1.7 christos initmsgbuf((void *)msgbuf_vaddr, round_page(MSGBUFSIZE));
299 1.1 shige #else
300 1.7 christos initmsgbuf((void *)msgbuf, round_page(MSGBUFSIZE));
301 1.1 shige #endif
302 1.1 shige
303 1.3 lukem printf("%s%s", copyright, version);
304 1.1 shige if (model != NULL)
305 1.1 shige printf("Model: %s\n", model);
306 1.1 shige
307 1.1 shige format_bytes(pbuf, sizeof(pbuf), ctob(physmem));
308 1.1 shige printf("total memory = %s\n", pbuf);
309 1.1 shige
310 1.1 shige minaddr = 0;
311 1.1 shige /*
312 1.1 shige * Allocate a submap for physio
313 1.1 shige */
314 1.1 shige phys_map = uvm_km_suballoc(kernel_map, &minaddr, &maxaddr,
315 1.6 thorpej VM_PHYS_SIZE, 0, false, NULL);
316 1.1 shige
317 1.1 shige /*
318 1.1 shige * No need to allocate an mbuf cluster submap. Mbuf clusters
319 1.1 shige * are allocated via the pool allocator, and we use direct-mapped
320 1.1 shige * pool pages.
321 1.1 shige */
322 1.1 shige
323 1.1 shige format_bytes(pbuf, sizeof(pbuf), ptoa(uvmexp.free));
324 1.1 shige printf("avail memory = %s\n", pbuf);
325 1.1 shige }
326 1.1 shige
327 1.1 shige /*
328 1.1 shige * ibm4xx_dumpsys:
329 1.1 shige * Crash dump handling.
330 1.1 shige */
331 1.1 shige void
332 1.1 shige ibm4xx_dumpsys(void)
333 1.1 shige {
334 1.1 shige
335 1.1 shige printf("dumpsys: TBD\n");
336 1.1 shige }
337