pchb.c revision 1.4 1 1.4 kiyohara /* $NetBSD: pchb.c,v 1.4 2005/09/04 15:23:55 kiyohara Exp $ */
2 1.1 shige
3 1.1 shige /*-
4 1.1 shige * Copyright (c) 1996 The NetBSD Foundation, Inc.
5 1.1 shige * All rights reserved.
6 1.1 shige *
7 1.1 shige * This code is derived from software contributed to The NetBSD Foundation
8 1.1 shige * by Jason R. Thorpe.
9 1.1 shige *
10 1.1 shige * Redistribution and use in source and binary forms, with or without
11 1.1 shige * modification, are permitted provided that the following conditions
12 1.1 shige * are met:
13 1.1 shige * 1. Redistributions of source code must retain the above copyright
14 1.1 shige * notice, this list of conditions and the following disclaimer.
15 1.1 shige * 2. Redistributions in binary form must reproduce the above copyright
16 1.1 shige * notice, this list of conditions and the following disclaimer in the
17 1.1 shige * documentation and/or other materials provided with the distribution.
18 1.1 shige * 3. All advertising materials mentioning features or use of this software
19 1.1 shige * must display the following acknowledgement:
20 1.1 shige * This product includes software developed by the NetBSD
21 1.1 shige * Foundation, Inc. and its contributors.
22 1.1 shige * 4. Neither the name of The NetBSD Foundation nor the names of its
23 1.1 shige * contributors may be used to endorse or promote products derived
24 1.1 shige * from this software without specific prior written permission.
25 1.1 shige *
26 1.1 shige * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 1.1 shige * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 1.1 shige * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 1.1 shige * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE
30 1.1 shige * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 1.1 shige * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 1.1 shige * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 1.1 shige * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 1.1 shige * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 1.1 shige * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 1.1 shige * POSSIBILITY OF SUCH DAMAGE.
37 1.1 shige */
38 1.1 shige #include <sys/cdefs.h>
39 1.4 kiyohara __KERNEL_RCSID(0, "$NetBSD: pchb.c,v 1.4 2005/09/04 15:23:55 kiyohara Exp $");
40 1.1 shige
41 1.1 shige #include "pci.h"
42 1.1 shige #include "opt_pci.h"
43 1.1 shige
44 1.1 shige #include <sys/types.h>
45 1.1 shige #include <sys/param.h>
46 1.1 shige #include <sys/systm.h>
47 1.1 shige #include <sys/device.h>
48 1.1 shige #include <sys/extent.h>
49 1.1 shige #include <sys/malloc.h>
50 1.1 shige
51 1.1 shige #define _IBM4XX_BUS_DMA_PRIVATE
52 1.1 shige
53 1.1 shige #include <powerpc/ibm4xx/ibm405gp.h>
54 1.1 shige #include <powerpc/ibm4xx/dev/plbvar.h>
55 1.1 shige
56 1.1 shige #include <dev/pci/pcivar.h>
57 1.1 shige #include <dev/pci/pcireg.h>
58 1.1 shige #include <dev/pci/pcidevs.h>
59 1.1 shige #include <dev/pci/pciconf.h>
60 1.1 shige
61 1.1 shige static int pchbmatch(struct device *, struct cfdata *, void *);
62 1.1 shige static void pchbattach(struct device *, struct device *, void *);
63 1.1 shige static int pchbprint(void *, const char *);
64 1.4 kiyohara static pci_chipset_tag_t alloc_chipset_tag(int);
65 1.1 shige
66 1.1 shige CFATTACH_DECL(pchb, sizeof(struct device),
67 1.1 shige pchbmatch, pchbattach, NULL, NULL);
68 1.1 shige
69 1.1 shige static int pcifound = 0;
70 1.1 shige
71 1.1 shige /* IO window located @ e8000000 and maps to 0-0xffff */
72 1.1 shige static struct powerpc_bus_space pchb_io_tag = {
73 1.1 shige _BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_IO_TYPE,
74 1.1 shige IBM405GP_PLB_PCI_IO_START, /* offset */
75 1.1 shige IBM405GP_PCI_PCI_IO_START, /* extent base */
76 1.1 shige IBM405GP_PCI_PCI_IO_START + 0xffff, /* extent limit */
77 1.1 shige };
78 1.1 shige
79 1.1 shige /* PCI memory window is directly mapped */
80 1.1 shige static struct powerpc_bus_space pchb_mem_tag = {
81 1.1 shige _BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE,
82 1.1 shige 0x00000000, /* offset */
83 1.1 shige IBM405GP_PCI_MEM_START, /* extent base */
84 1.1 shige IBM405GP_PCI_MEM_START + 0x1fffffff, /* extent limit */
85 1.1 shige };
86 1.1 shige
87 1.1 shige
88 1.1 shige static int
89 1.1 shige pchbmatch(struct device *parent, struct cfdata *cf, void *aux)
90 1.1 shige {
91 1.1 shige struct plb_attach_args *paa = aux;
92 1.1 shige /* XXX chipset tag unused by walnut, so just pass 0 */
93 1.4 kiyohara pci_chipset_tag_t pc = alloc_chipset_tag(0);
94 1.1 shige pcitag_t tag;
95 1.1 shige int class, id;
96 1.1 shige
97 1.1 shige /* match only pchb devices */
98 1.1 shige if (strcmp(paa->plb_name, cf->cf_name) != 0)
99 1.1 shige return 0;
100 1.1 shige
101 1.1 shige pci_machdep_init();
102 1.1 shige tag = pci_make_tag(pc, 0, 0, 0);
103 1.1 shige
104 1.1 shige class = pci_conf_read(pc, tag, PCI_CLASS_REG);
105 1.1 shige id = pci_conf_read(pc, tag, PCI_ID_REG);
106 1.1 shige
107 1.1 shige /*
108 1.1 shige * Match all known PCI host chipsets.
109 1.1 shige */
110 1.1 shige if (PCI_CLASS(class) == PCI_CLASS_BRIDGE &&
111 1.1 shige PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_HOST) {
112 1.1 shige switch (PCI_VENDOR(id)) {
113 1.1 shige case PCI_VENDOR_IBM:
114 1.1 shige switch (PCI_PRODUCT(id)) {
115 1.1 shige case PCI_PRODUCT_IBM_405GP:
116 1.1 shige return (!pcifound);
117 1.1 shige }
118 1.1 shige break;
119 1.1 shige }
120 1.1 shige }
121 1.1 shige return (0);
122 1.1 shige }
123 1.1 shige
124 1.1 shige static void
125 1.1 shige pchbattach(struct device *parent, struct device *self, void *aux)
126 1.1 shige {
127 1.1 shige struct plb_attach_args *paa = aux;
128 1.1 shige struct pcibus_attach_args pba;
129 1.1 shige char devinfo[256];
130 1.1 shige #ifdef PCI_CONFIGURE_VERBOSE
131 1.1 shige extern int pci_conf_debug;
132 1.1 shige
133 1.1 shige pci_conf_debug = 1;
134 1.1 shige #endif
135 1.4 kiyohara pci_chipset_tag_t pc = alloc_chipset_tag(0);
136 1.1 shige pcitag_t tag;
137 1.1 shige int class, id;
138 1.1 shige
139 1.1 shige pci_machdep_init();
140 1.1 shige tag = pci_make_tag(pc, 0, 0, 0);
141 1.1 shige
142 1.1 shige class = pci_conf_read(pc, tag, PCI_CLASS_REG);
143 1.1 shige id = pci_conf_read(pc, tag, PCI_ID_REG);
144 1.1 shige
145 1.1 shige printf("\n");
146 1.1 shige pcifound++;
147 1.1 shige /*
148 1.1 shige * All we do is print out a description. Eventually, we
149 1.1 shige * might want to add code that does something that's
150 1.1 shige * possibly chipset-specific.
151 1.1 shige */
152 1.1 shige
153 1.2 kleink pci_devinfo(id, class, 0, devinfo, sizeof(devinfo));
154 1.1 shige printf("%s: %s (rev. 0x%02x)\n", self->dv_xname, devinfo,
155 1.1 shige PCI_REVISION(class));
156 1.1 shige
157 1.1 shige pci_machdep_init(); /* Redundant... */
158 1.1 shige ibm4xx_setup_pci();
159 1.1 shige #ifdef PCI_CONFIGURE_VERBOSE
160 1.1 shige ibm4xx_show_pci_map();
161 1.1 shige #endif
162 1.1 shige
163 1.1 shige if (bus_space_init(&pchb_io_tag, "pchbio", NULL, 0))
164 1.1 shige panic("pchbattach: can't init IO tag");
165 1.1 shige if (bus_space_init(&pchb_mem_tag, "pchbmem", NULL, 0))
166 1.1 shige panic("pchbattach: can't init MEM tag");
167 1.1 shige
168 1.1 shige #ifdef PCI_NETBSD_CONFIGURE
169 1.4 kiyohara pc->memext = extent_create("pcimem", IBM405GP_PCI_MEM_START,
170 1.1 shige IBM405GP_PCI_MEM_START + 0x1fffffff, M_DEVBUF, NULL, 0,
171 1.1 shige EX_NOWAIT);
172 1.4 kiyohara pc->ioext = extent_create("pciio", IBM405GP_PCI_PCI_IO_START,
173 1.1 shige IBM405GP_PCI_PCI_IO_START + 0xffff, M_DEVBUF, NULL, 0, EX_NOWAIT);
174 1.4 kiyohara pci_configure_bus(pc, pc->ioext, pc->memext, NULL, 0, 32);
175 1.1 shige #endif /* PCI_NETBSD_CONFIGURE */
176 1.1 shige
177 1.1 shige #ifdef PCI_CONFIGURE_VERBOSE
178 1.1 shige printf("running config_found PCI\n");
179 1.1 shige #endif
180 1.1 shige /* IO window located @ e8000000 and maps to 0-0xffff */
181 1.1 shige pba.pba_iot = &pchb_io_tag;
182 1.1 shige /* PCI memory window is directly mapped */
183 1.1 shige pba.pba_memt = &pchb_mem_tag;
184 1.1 shige pba.pba_dmat = paa->plb_dmat;
185 1.1 shige pba.pba_dmat64 = NULL;
186 1.4 kiyohara pba.pba_pc = pc;
187 1.1 shige pba.pba_bus = 0;
188 1.1 shige pba.pba_bridgetag = NULL;
189 1.1 shige pba.pba_flags = PCI_FLAGS_MEM_ENABLED | PCI_FLAGS_IO_ENABLED;
190 1.3 drochner config_found_ia(self, "pcibus", &pba, pchbprint);
191 1.1 shige }
192 1.1 shige
193 1.1 shige
194 1.1 shige static int
195 1.1 shige pchbprint(void *aux, const char *p)
196 1.1 shige {
197 1.1 shige
198 1.1 shige if (p == NULL)
199 1.1 shige return (UNCONF);
200 1.1 shige return (QUIET);
201 1.1 shige }
202 1.1 shige
203 1.1 shige #if 0
204 1.1 shige static void
205 1.1 shige scan_pci_bus(void)
206 1.1 shige {
207 1.1 shige pcitag_t tag;
208 1.1 shige int i, x;
209 1.1 shige
210 1.1 shige for (i=0;i<32;i++){
211 1.1 shige tag = pci_make_tag(0, 0, i, 0);
212 1.1 shige x = pci_conf_read(0, tag, 0);
213 1.1 shige printf("%d tag=%08x : %08x\n", i, tag, x);
214 1.1 shige #if 0
215 1.1 shige if (PCI_VENDOR(x) == PCI_VENDOR_INTEL
216 1.1 shige && PCI_PRODUCT(x) == PCI_PRODUCT_INTEL_80960_RP) {
217 1.1 shige /* Do not configure PCI bus analyzer */
218 1.1 shige continue;
219 1.1 shige }
220 1.1 shige x = pci_conf_read(0, tag, PCI_COMMAND_STATUS_REG);
221 1.1 shige x |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
222 1.1 shige pci_conf_write(0, tag, PCI_COMMAND_STATUS_REG, x);
223 1.1 shige #endif
224 1.1 shige }
225 1.1 shige }
226 1.1 shige #endif
227 1.4 kiyohara
228 1.4 kiyohara static pci_chipset_tag_t
229 1.4 kiyohara alloc_chipset_tag(int node)
230 1.4 kiyohara {
231 1.4 kiyohara pci_chipset_tag_t npc;
232 1.4 kiyohara
233 1.4 kiyohara npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT);
234 1.4 kiyohara if (npc == NULL)
235 1.4 kiyohara panic("could not allocate pci_chipset_tag_t");
236 1.4 kiyohara npc->rootnode = node;
237 1.4 kiyohara
238 1.4 kiyohara return (npc);
239 1.4 kiyohara }
240