Home | History | Annotate | Line # | Download | only in pci
pchb.c revision 1.6
      1  1.6    martin /*	$NetBSD: pchb.c,v 1.6 2008/05/04 00:08:45 martin Exp $	*/
      2  1.1     shige 
      3  1.1     shige /*-
      4  1.1     shige  * Copyright (c) 1996 The NetBSD Foundation, Inc.
      5  1.1     shige  * All rights reserved.
      6  1.1     shige  *
      7  1.1     shige  * This code is derived from software contributed to The NetBSD Foundation
      8  1.1     shige  * by Jason R. Thorpe.
      9  1.1     shige  *
     10  1.1     shige  * Redistribution and use in source and binary forms, with or without
     11  1.1     shige  * modification, are permitted provided that the following conditions
     12  1.1     shige  * are met:
     13  1.1     shige  * 1. Redistributions of source code must retain the above copyright
     14  1.1     shige  *    notice, this list of conditions and the following disclaimer.
     15  1.1     shige  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.1     shige  *    notice, this list of conditions and the following disclaimer in the
     17  1.1     shige  *    documentation and/or other materials provided with the distribution.
     18  1.1     shige  *
     19  1.1     shige  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  1.1     shige  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  1.1     shige  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  1.6    martin  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  1.6    martin  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  1.1     shige  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  1.1     shige  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  1.1     shige  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  1.1     shige  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  1.1     shige  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  1.1     shige  * POSSIBILITY OF SUCH DAMAGE.
     30  1.1     shige  */
     31  1.1     shige #include <sys/cdefs.h>
     32  1.6    martin __KERNEL_RCSID(0, "$NetBSD: pchb.c,v 1.6 2008/05/04 00:08:45 martin Exp $");
     33  1.1     shige 
     34  1.1     shige #include "pci.h"
     35  1.1     shige #include "opt_pci.h"
     36  1.1     shige 
     37  1.1     shige #include <sys/types.h>
     38  1.1     shige #include <sys/param.h>
     39  1.1     shige #include <sys/systm.h>
     40  1.1     shige #include <sys/device.h>
     41  1.1     shige #include <sys/extent.h>
     42  1.1     shige #include <sys/malloc.h>
     43  1.1     shige 
     44  1.1     shige #define _IBM4XX_BUS_DMA_PRIVATE
     45  1.1     shige 
     46  1.1     shige #include <powerpc/ibm4xx/ibm405gp.h>
     47  1.1     shige #include <powerpc/ibm4xx/dev/plbvar.h>
     48  1.1     shige 
     49  1.1     shige #include <dev/pci/pcivar.h>
     50  1.1     shige #include <dev/pci/pcireg.h>
     51  1.1     shige #include <dev/pci/pcidevs.h>
     52  1.1     shige #include <dev/pci/pciconf.h>
     53  1.1     shige 
     54  1.1     shige static int	pchbmatch(struct device *, struct cfdata *, void *);
     55  1.1     shige static void	pchbattach(struct device *, struct device *, void *);
     56  1.1     shige static int	pchbprint(void *, const char *);
     57  1.4  kiyohara static pci_chipset_tag_t	alloc_chipset_tag(int);
     58  1.1     shige 
     59  1.1     shige CFATTACH_DECL(pchb, sizeof(struct device),
     60  1.1     shige     pchbmatch, pchbattach, NULL, NULL);
     61  1.1     shige 
     62  1.1     shige static int pcifound = 0;
     63  1.1     shige 
     64  1.1     shige /* IO window located @ e8000000 and maps to 0-0xffff */
     65  1.1     shige static struct powerpc_bus_space pchb_io_tag = {
     66  1.1     shige 	_BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_IO_TYPE,
     67  1.1     shige 	IBM405GP_PLB_PCI_IO_START,		/* offset */
     68  1.1     shige 	IBM405GP_PCI_PCI_IO_START,		/* extent base */
     69  1.1     shige 	IBM405GP_PCI_PCI_IO_START + 0xffff,	/* extent limit */
     70  1.1     shige };
     71  1.1     shige 
     72  1.1     shige /* PCI memory window is directly mapped */
     73  1.1     shige static struct powerpc_bus_space pchb_mem_tag = {
     74  1.1     shige 	_BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE,
     75  1.1     shige 	0x00000000,					/* offset */
     76  1.1     shige 	IBM405GP_PCI_MEM_START,			/* extent base */
     77  1.1     shige 	IBM405GP_PCI_MEM_START + 0x1fffffff,	/* extent limit */
     78  1.1     shige };
     79  1.1     shige 
     80  1.1     shige 
     81  1.1     shige static int
     82  1.1     shige pchbmatch(struct device *parent, struct cfdata *cf, void *aux)
     83  1.1     shige {
     84  1.1     shige 	struct plb_attach_args *paa = aux;
     85  1.1     shige 	/* XXX chipset tag unused by walnut, so just pass 0 */
     86  1.4  kiyohara 	pci_chipset_tag_t pc = alloc_chipset_tag(0);
     87  1.1     shige 	pcitag_t tag;
     88  1.1     shige 	int class, id;
     89  1.1     shige 
     90  1.1     shige 	/* match only pchb devices */
     91  1.1     shige 	if (strcmp(paa->plb_name, cf->cf_name) != 0)
     92  1.1     shige 		return 0;
     93  1.1     shige 
     94  1.1     shige 	pci_machdep_init();
     95  1.1     shige 	tag = pci_make_tag(pc, 0, 0, 0);
     96  1.1     shige 
     97  1.1     shige 	class = pci_conf_read(pc, tag, PCI_CLASS_REG);
     98  1.1     shige 	id = pci_conf_read(pc, tag, PCI_ID_REG);
     99  1.1     shige 
    100  1.1     shige 	/*
    101  1.1     shige 	 * Match all known PCI host chipsets.
    102  1.1     shige 	 */
    103  1.1     shige 	if (PCI_CLASS(class) == PCI_CLASS_BRIDGE &&
    104  1.1     shige 	    PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_HOST) {
    105  1.1     shige 		switch (PCI_VENDOR(id)) {
    106  1.1     shige 		case PCI_VENDOR_IBM:
    107  1.1     shige 			switch (PCI_PRODUCT(id)) {
    108  1.1     shige 			case PCI_PRODUCT_IBM_405GP:
    109  1.1     shige 				return (!pcifound);
    110  1.1     shige 			}
    111  1.1     shige 			break;
    112  1.1     shige 		}
    113  1.1     shige 	}
    114  1.1     shige 	return (0);
    115  1.1     shige }
    116  1.1     shige 
    117  1.1     shige static void
    118  1.1     shige pchbattach(struct device *parent, struct device *self, void *aux)
    119  1.1     shige {
    120  1.1     shige 	struct plb_attach_args *paa = aux;
    121  1.1     shige 	struct pcibus_attach_args pba;
    122  1.1     shige 	char devinfo[256];
    123  1.1     shige #ifdef PCI_CONFIGURE_VERBOSE
    124  1.1     shige 	extern int pci_conf_debug;
    125  1.1     shige 
    126  1.1     shige 	pci_conf_debug = 1;
    127  1.1     shige #endif
    128  1.4  kiyohara 	pci_chipset_tag_t pc = alloc_chipset_tag(0);
    129  1.1     shige 	pcitag_t tag;
    130  1.1     shige 	int class, id;
    131  1.1     shige 
    132  1.1     shige 	pci_machdep_init();
    133  1.1     shige 	tag = pci_make_tag(pc, 0, 0, 0);
    134  1.1     shige 
    135  1.1     shige 	class = pci_conf_read(pc, tag, PCI_CLASS_REG);
    136  1.1     shige 	id = pci_conf_read(pc, tag, PCI_ID_REG);
    137  1.1     shige 
    138  1.1     shige 	printf("\n");
    139  1.1     shige 	pcifound++;
    140  1.1     shige 	/*
    141  1.1     shige 	 * All we do is print out a description.  Eventually, we
    142  1.1     shige 	 * might want to add code that does something that's
    143  1.1     shige 	 * possibly chipset-specific.
    144  1.1     shige 	 */
    145  1.1     shige 
    146  1.2    kleink 	pci_devinfo(id, class, 0, devinfo, sizeof(devinfo));
    147  1.1     shige 	printf("%s: %s (rev. 0x%02x)\n", self->dv_xname, devinfo,
    148  1.1     shige 	    PCI_REVISION(class));
    149  1.1     shige 
    150  1.1     shige 	pci_machdep_init(); /* Redundant... */
    151  1.1     shige 	ibm4xx_setup_pci();
    152  1.1     shige #ifdef PCI_CONFIGURE_VERBOSE
    153  1.1     shige 	ibm4xx_show_pci_map();
    154  1.1     shige #endif
    155  1.1     shige 
    156  1.1     shige 	if (bus_space_init(&pchb_io_tag, "pchbio", NULL, 0))
    157  1.1     shige 		panic("pchbattach: can't init IO tag");
    158  1.1     shige 	if (bus_space_init(&pchb_mem_tag, "pchbmem", NULL, 0))
    159  1.1     shige 		panic("pchbattach: can't init MEM tag");
    160  1.1     shige 
    161  1.1     shige #ifdef PCI_NETBSD_CONFIGURE
    162  1.4  kiyohara 	pc->memext = extent_create("pcimem", IBM405GP_PCI_MEM_START,
    163  1.1     shige 	    IBM405GP_PCI_MEM_START + 0x1fffffff, M_DEVBUF, NULL, 0,
    164  1.1     shige 	    EX_NOWAIT);
    165  1.4  kiyohara 	pc->ioext = extent_create("pciio", IBM405GP_PCI_PCI_IO_START,
    166  1.1     shige 	    IBM405GP_PCI_PCI_IO_START + 0xffff, M_DEVBUF, NULL, 0, EX_NOWAIT);
    167  1.4  kiyohara 	pci_configure_bus(pc, pc->ioext, pc->memext, NULL, 0, 32);
    168  1.1     shige #endif /* PCI_NETBSD_CONFIGURE */
    169  1.1     shige 
    170  1.1     shige #ifdef PCI_CONFIGURE_VERBOSE
    171  1.1     shige 	printf("running config_found PCI\n");
    172  1.1     shige #endif
    173  1.1     shige 	/* IO window located @ e8000000 and maps to 0-0xffff */
    174  1.1     shige 	pba.pba_iot = &pchb_io_tag;
    175  1.1     shige 	/* PCI memory window is directly mapped */
    176  1.1     shige 	pba.pba_memt = &pchb_mem_tag;
    177  1.1     shige 	pba.pba_dmat = paa->plb_dmat;
    178  1.1     shige 	pba.pba_dmat64 = NULL;
    179  1.4  kiyohara 	pba.pba_pc = pc;
    180  1.1     shige 	pba.pba_bus = 0;
    181  1.1     shige 	pba.pba_bridgetag = NULL;
    182  1.1     shige 	pba.pba_flags = PCI_FLAGS_MEM_ENABLED | PCI_FLAGS_IO_ENABLED;
    183  1.3  drochner 	config_found_ia(self, "pcibus", &pba, pchbprint);
    184  1.1     shige }
    185  1.1     shige 
    186  1.1     shige 
    187  1.1     shige static int
    188  1.1     shige pchbprint(void *aux, const char *p)
    189  1.1     shige {
    190  1.1     shige 
    191  1.1     shige 	if (p == NULL)
    192  1.1     shige 		return (UNCONF);
    193  1.1     shige 	return (QUIET);
    194  1.1     shige }
    195  1.1     shige 
    196  1.1     shige #if 0
    197  1.1     shige static void
    198  1.1     shige scan_pci_bus(void)
    199  1.1     shige {
    200  1.1     shige 	pcitag_t tag;
    201  1.1     shige 	int i, x;
    202  1.1     shige 
    203  1.1     shige 	for (i=0;i<32;i++){
    204  1.1     shige 		tag = pci_make_tag(0, 0, i, 0);
    205  1.1     shige 		x = pci_conf_read(0, tag, 0);
    206  1.1     shige 		printf("%d tag=%08x : %08x\n", i, tag, x);
    207  1.1     shige #if 0
    208  1.1     shige 		if (PCI_VENDOR(x) == PCI_VENDOR_INTEL
    209  1.1     shige 		    && PCI_PRODUCT(x) == PCI_PRODUCT_INTEL_80960_RP) {
    210  1.1     shige 			/* Do not configure PCI bus analyzer */
    211  1.1     shige 			continue;
    212  1.1     shige 		}
    213  1.1     shige 		x = pci_conf_read(0, tag, PCI_COMMAND_STATUS_REG);
    214  1.1     shige 		x |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE;
    215  1.1     shige 		pci_conf_write(0, tag, PCI_COMMAND_STATUS_REG, x);
    216  1.1     shige #endif
    217  1.1     shige 	}
    218  1.1     shige }
    219  1.1     shige #endif
    220  1.4  kiyohara 
    221  1.4  kiyohara static pci_chipset_tag_t
    222  1.4  kiyohara alloc_chipset_tag(int node)
    223  1.4  kiyohara {
    224  1.4  kiyohara 	pci_chipset_tag_t npc;
    225  1.4  kiyohara 
    226  1.4  kiyohara 	npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT);
    227  1.4  kiyohara 	if (npc == NULL)
    228  1.4  kiyohara 		panic("could not allocate pci_chipset_tag_t");
    229  1.4  kiyohara 	npc->rootnode = node;
    230  1.4  kiyohara 
    231  1.4  kiyohara 	return (npc);
    232  1.4  kiyohara }
    233