pchb.c revision 1.4
1 /* $NetBSD: pchb.c,v 1.4 2005/09/04 15:23:55 kiyohara Exp $ */ 2 3 /*- 4 * Copyright (c) 1996 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE 30 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 #include <sys/cdefs.h> 39 __KERNEL_RCSID(0, "$NetBSD: pchb.c,v 1.4 2005/09/04 15:23:55 kiyohara Exp $"); 40 41 #include "pci.h" 42 #include "opt_pci.h" 43 44 #include <sys/types.h> 45 #include <sys/param.h> 46 #include <sys/systm.h> 47 #include <sys/device.h> 48 #include <sys/extent.h> 49 #include <sys/malloc.h> 50 51 #define _IBM4XX_BUS_DMA_PRIVATE 52 53 #include <powerpc/ibm4xx/ibm405gp.h> 54 #include <powerpc/ibm4xx/dev/plbvar.h> 55 56 #include <dev/pci/pcivar.h> 57 #include <dev/pci/pcireg.h> 58 #include <dev/pci/pcidevs.h> 59 #include <dev/pci/pciconf.h> 60 61 static int pchbmatch(struct device *, struct cfdata *, void *); 62 static void pchbattach(struct device *, struct device *, void *); 63 static int pchbprint(void *, const char *); 64 static pci_chipset_tag_t alloc_chipset_tag(int); 65 66 CFATTACH_DECL(pchb, sizeof(struct device), 67 pchbmatch, pchbattach, NULL, NULL); 68 69 static int pcifound = 0; 70 71 /* IO window located @ e8000000 and maps to 0-0xffff */ 72 static struct powerpc_bus_space pchb_io_tag = { 73 _BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_IO_TYPE, 74 IBM405GP_PLB_PCI_IO_START, /* offset */ 75 IBM405GP_PCI_PCI_IO_START, /* extent base */ 76 IBM405GP_PCI_PCI_IO_START + 0xffff, /* extent limit */ 77 }; 78 79 /* PCI memory window is directly mapped */ 80 static struct powerpc_bus_space pchb_mem_tag = { 81 _BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE, 82 0x00000000, /* offset */ 83 IBM405GP_PCI_MEM_START, /* extent base */ 84 IBM405GP_PCI_MEM_START + 0x1fffffff, /* extent limit */ 85 }; 86 87 88 static int 89 pchbmatch(struct device *parent, struct cfdata *cf, void *aux) 90 { 91 struct plb_attach_args *paa = aux; 92 /* XXX chipset tag unused by walnut, so just pass 0 */ 93 pci_chipset_tag_t pc = alloc_chipset_tag(0); 94 pcitag_t tag; 95 int class, id; 96 97 /* match only pchb devices */ 98 if (strcmp(paa->plb_name, cf->cf_name) != 0) 99 return 0; 100 101 pci_machdep_init(); 102 tag = pci_make_tag(pc, 0, 0, 0); 103 104 class = pci_conf_read(pc, tag, PCI_CLASS_REG); 105 id = pci_conf_read(pc, tag, PCI_ID_REG); 106 107 /* 108 * Match all known PCI host chipsets. 109 */ 110 if (PCI_CLASS(class) == PCI_CLASS_BRIDGE && 111 PCI_SUBCLASS(class) == PCI_SUBCLASS_BRIDGE_HOST) { 112 switch (PCI_VENDOR(id)) { 113 case PCI_VENDOR_IBM: 114 switch (PCI_PRODUCT(id)) { 115 case PCI_PRODUCT_IBM_405GP: 116 return (!pcifound); 117 } 118 break; 119 } 120 } 121 return (0); 122 } 123 124 static void 125 pchbattach(struct device *parent, struct device *self, void *aux) 126 { 127 struct plb_attach_args *paa = aux; 128 struct pcibus_attach_args pba; 129 char devinfo[256]; 130 #ifdef PCI_CONFIGURE_VERBOSE 131 extern int pci_conf_debug; 132 133 pci_conf_debug = 1; 134 #endif 135 pci_chipset_tag_t pc = alloc_chipset_tag(0); 136 pcitag_t tag; 137 int class, id; 138 139 pci_machdep_init(); 140 tag = pci_make_tag(pc, 0, 0, 0); 141 142 class = pci_conf_read(pc, tag, PCI_CLASS_REG); 143 id = pci_conf_read(pc, tag, PCI_ID_REG); 144 145 printf("\n"); 146 pcifound++; 147 /* 148 * All we do is print out a description. Eventually, we 149 * might want to add code that does something that's 150 * possibly chipset-specific. 151 */ 152 153 pci_devinfo(id, class, 0, devinfo, sizeof(devinfo)); 154 printf("%s: %s (rev. 0x%02x)\n", self->dv_xname, devinfo, 155 PCI_REVISION(class)); 156 157 pci_machdep_init(); /* Redundant... */ 158 ibm4xx_setup_pci(); 159 #ifdef PCI_CONFIGURE_VERBOSE 160 ibm4xx_show_pci_map(); 161 #endif 162 163 if (bus_space_init(&pchb_io_tag, "pchbio", NULL, 0)) 164 panic("pchbattach: can't init IO tag"); 165 if (bus_space_init(&pchb_mem_tag, "pchbmem", NULL, 0)) 166 panic("pchbattach: can't init MEM tag"); 167 168 #ifdef PCI_NETBSD_CONFIGURE 169 pc->memext = extent_create("pcimem", IBM405GP_PCI_MEM_START, 170 IBM405GP_PCI_MEM_START + 0x1fffffff, M_DEVBUF, NULL, 0, 171 EX_NOWAIT); 172 pc->ioext = extent_create("pciio", IBM405GP_PCI_PCI_IO_START, 173 IBM405GP_PCI_PCI_IO_START + 0xffff, M_DEVBUF, NULL, 0, EX_NOWAIT); 174 pci_configure_bus(pc, pc->ioext, pc->memext, NULL, 0, 32); 175 #endif /* PCI_NETBSD_CONFIGURE */ 176 177 #ifdef PCI_CONFIGURE_VERBOSE 178 printf("running config_found PCI\n"); 179 #endif 180 /* IO window located @ e8000000 and maps to 0-0xffff */ 181 pba.pba_iot = &pchb_io_tag; 182 /* PCI memory window is directly mapped */ 183 pba.pba_memt = &pchb_mem_tag; 184 pba.pba_dmat = paa->plb_dmat; 185 pba.pba_dmat64 = NULL; 186 pba.pba_pc = pc; 187 pba.pba_bus = 0; 188 pba.pba_bridgetag = NULL; 189 pba.pba_flags = PCI_FLAGS_MEM_ENABLED | PCI_FLAGS_IO_ENABLED; 190 config_found_ia(self, "pcibus", &pba, pchbprint); 191 } 192 193 194 static int 195 pchbprint(void *aux, const char *p) 196 { 197 198 if (p == NULL) 199 return (UNCONF); 200 return (QUIET); 201 } 202 203 #if 0 204 static void 205 scan_pci_bus(void) 206 { 207 pcitag_t tag; 208 int i, x; 209 210 for (i=0;i<32;i++){ 211 tag = pci_make_tag(0, 0, i, 0); 212 x = pci_conf_read(0, tag, 0); 213 printf("%d tag=%08x : %08x\n", i, tag, x); 214 #if 0 215 if (PCI_VENDOR(x) == PCI_VENDOR_INTEL 216 && PCI_PRODUCT(x) == PCI_PRODUCT_INTEL_80960_RP) { 217 /* Do not configure PCI bus analyzer */ 218 continue; 219 } 220 x = pci_conf_read(0, tag, PCI_COMMAND_STATUS_REG); 221 x |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | PCI_COMMAND_MASTER_ENABLE; 222 pci_conf_write(0, tag, PCI_COMMAND_STATUS_REG, x); 223 #endif 224 } 225 } 226 #endif 227 228 static pci_chipset_tag_t 229 alloc_chipset_tag(int node) 230 { 231 pci_chipset_tag_t npc; 232 233 npc = malloc(sizeof *npc, M_DEVBUF, M_NOWAIT); 234 if (npc == NULL) 235 panic("could not allocate pci_chipset_tag_t"); 236 npc->rootnode = node; 237 238 return (npc); 239 } 240
Indexes created Tue Sep 30 11:09:46 GMT 2025