pci_machdep.c revision 1.11 1 /* $NetBSD: pci_machdep.c,v 1.11 2015/10/02 05:22:51 msaitoh Exp $ */
2
3 /*
4 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
5 * Copyright (c) 1994 Charles M. Hannum. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Charles M. Hannum.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*
34 * Machine-specific functions for PCI autoconfiguration.
35 *
36 * On PCs, there are two methods of generating PCI configuration cycles.
37 * We try to detect the appropriate mechanism for this machine and set
38 * up a few function pointers to access the correct method directly.
39 *
40 * The configuration method can be hard-coded in the config file by
41 * using `options PCI_CONF_MODE=N', where `N' is the configuration mode
42 * as defined section 3.6.4.1, `Generating Configuration Cycles'.
43 */
44
45 #include <sys/cdefs.h>
46 __KERNEL_RCSID(0, "$NetBSD: pci_machdep.c,v 1.11 2015/10/02 05:22:51 msaitoh Exp $");
47
48 #include <sys/types.h>
49 #include <sys/param.h>
50 #include <sys/time.h>
51 #include <sys/systm.h>
52 #include <sys/errno.h>
53 #include <sys/device.h>
54 #include <sys/extent.h>
55 #include <sys/bus.h>
56 #include <sys/intr.h>
57
58 #include <uvm/uvm_extern.h>
59
60 #include <dev/pci/pcivar.h>
61 #include <dev/pci/pcireg.h>
62 #include <dev/pci/pcidevs.h>
63 #include <dev/pci/pciconf.h>
64
65 #include <powerpc/ibm4xx/ibm405gp.h>
66 #include <powerpc/ibm4xx/pci_machdep.h>
67 #include <powerpc/ibm4xx/dev/pcicreg.h>
68
69 static struct powerpc_bus_space pci_iot = {
70 _BUS_SPACE_LITTLE_ENDIAN | _BUS_SPACE_MEM_TYPE,
71 0x00000000,
72 IBM405GP_PCIC0_BASE, /* extent base */
73 IBM405GP_PCIC0_BASE + 8, /* extent limit */
74 };
75
76 static bus_space_handle_t pci_ioh;
77
78 void
79 ibm4xx_pci_machdep_init(void)
80 {
81
82 if (pci_ioh == 0 &&
83 (bus_space_init(&pci_iot, "pcicfg", NULL, 0) ||
84 bus_space_map(&pci_iot, IBM405GP_PCIC0_BASE, 8, 0, &pci_ioh)))
85 panic("Cannot map PCI registers");
86 }
87
88 void
89 ibm4xx_pci_attach_hook(device_t parent, device_t self,
90 struct pcibus_attach_args *pba)
91 {
92
93 #ifdef PCI_CONFIGURE_VERBOSE
94 printf("pci_attach_hook\n");
95 ibm4xx_show_pci_map();
96 #endif
97 ibm4xx_setup_pci();
98 #ifdef PCI_CONFIGURE_VERBOSE
99 ibm4xx_show_pci_map();
100 #endif
101 }
102
103 pcitag_t
104 ibm4xx_pci_make_tag(void *v, int bus, int device, int function)
105 {
106 pcitag_t tag;
107
108 if (bus >= 256 || device >= 32 || function >= 8)
109 panic("pci_make_tag: bad request");
110
111 /* XXX magic number */
112 tag = 0x80000000 | (bus << 16) | (device << 11) | (function << 8);
113
114 return tag;
115 }
116
117 void
118 ibm4xx_pci_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp)
119 {
120
121 if (bp != NULL)
122 *bp = (tag >> 16) & 0xff;
123 if (dp != NULL)
124 *dp = (tag >> 11) & 0x1f;
125 if (fp != NULL)
126 *fp = (tag >> 8) & 0x07;
127 }
128
129 pcireg_t
130 ibm4xx_pci_conf_read(void *v, pcitag_t tag, int reg)
131 {
132 pcireg_t data;
133
134 if ((unsigned int)reg >= PCI_CONF_SIZE)
135 return (pcireg_t) -1;
136
137 /* 405GT BIOS disables interrupts here. Should we? --Art */
138 bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGADDR, tag | reg);
139 data = bus_space_read_4(&pci_iot, pci_ioh, PCIC_CFGDATA);
140 /* 405GP pass2 errata #6 */
141 bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGADDR, 0);
142 return data;
143 }
144
145 void
146 ibm4xx_pci_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data)
147 {
148
149 if ((unsigned int)reg >= PCI_CONF_SIZE)
150 return;
151
152 bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGADDR, tag | reg);
153 bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGDATA, data);
154 /* 405GP pass2 errata #6 */
155 bus_space_write_4(&pci_iot, pci_ioh, PCIC_CFGADDR, 0);
156 }
157
158 int
159 ibm4xx_pci_intr_setattr(void *v, pci_intr_handle_t *ihp, int attr,
160 uint64_t data)
161 {
162
163 switch (attr) {
164 case PCI_INTR_MPSAFE:
165 return 0;
166 default:
167 return ENODEV;
168 }
169 }
170
171 /* Avoid overconfiguration */
172 int
173 ibm4xx_pci_conf_hook(void *v, int bus, int dev, int func, pcireg_t id)
174 {
175
176 if ((PCI_VENDOR(id) == PCI_VENDOR_IBM && PCI_PRODUCT(id) == PCI_PRODUCT_IBM_405GP) ||
177 (PCI_VENDOR(id) == PCI_VENDOR_INTEL && PCI_PRODUCT(id) == PCI_PRODUCT_INTEL_80960_RP)) {
178 /* Don't configure the bridge and PCI probe. */
179 return 0;
180 }
181 return PCI_CONF_DEFAULT;
182 }
183