pmap.c revision 1.5.4.5 1 1.5.4.5 nathanw /* $NetBSD: pmap.c,v 1.5.4.5 2002/04/17 00:04:11 nathanw Exp $ */
2 1.5.4.2 briggs
3 1.5.4.2 briggs /*
4 1.5.4.2 briggs * Copyright 2001 Wasabi Systems, Inc.
5 1.5.4.2 briggs * All rights reserved.
6 1.5.4.2 briggs *
7 1.5.4.2 briggs * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 1.5.4.2 briggs *
9 1.5.4.2 briggs * Redistribution and use in source and binary forms, with or without
10 1.5.4.2 briggs * modification, are permitted provided that the following conditions
11 1.5.4.2 briggs * are met:
12 1.5.4.2 briggs * 1. Redistributions of source code must retain the above copyright
13 1.5.4.2 briggs * notice, this list of conditions and the following disclaimer.
14 1.5.4.2 briggs * 2. Redistributions in binary form must reproduce the above copyright
15 1.5.4.2 briggs * notice, this list of conditions and the following disclaimer in the
16 1.5.4.2 briggs * documentation and/or other materials provided with the distribution.
17 1.5.4.2 briggs * 3. All advertising materials mentioning features or use of this software
18 1.5.4.2 briggs * must display the following acknowledgement:
19 1.5.4.2 briggs * This product includes software developed for the NetBSD Project by
20 1.5.4.2 briggs * Wasabi Systems, Inc.
21 1.5.4.2 briggs * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.5.4.2 briggs * or promote products derived from this software without specific prior
23 1.5.4.2 briggs * written permission.
24 1.5.4.2 briggs *
25 1.5.4.2 briggs * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.5.4.2 briggs * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.5.4.2 briggs * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.5.4.2 briggs * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.5.4.2 briggs * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.5.4.2 briggs * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.5.4.2 briggs * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.5.4.2 briggs * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.5.4.2 briggs * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.5.4.2 briggs * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.5.4.2 briggs * POSSIBILITY OF SUCH DAMAGE.
36 1.5.4.2 briggs */
37 1.5.4.2 briggs
38 1.5.4.2 briggs /*
39 1.5.4.2 briggs * Copyright (C) 1995, 1996 Wolfgang Solfrank.
40 1.5.4.2 briggs * Copyright (C) 1995, 1996 TooLs GmbH.
41 1.5.4.2 briggs * All rights reserved.
42 1.5.4.2 briggs *
43 1.5.4.2 briggs * Redistribution and use in source and binary forms, with or without
44 1.5.4.2 briggs * modification, are permitted provided that the following conditions
45 1.5.4.2 briggs * are met:
46 1.5.4.2 briggs * 1. Redistributions of source code must retain the above copyright
47 1.5.4.2 briggs * notice, this list of conditions and the following disclaimer.
48 1.5.4.2 briggs * 2. Redistributions in binary form must reproduce the above copyright
49 1.5.4.2 briggs * notice, this list of conditions and the following disclaimer in the
50 1.5.4.2 briggs * documentation and/or other materials provided with the distribution.
51 1.5.4.2 briggs * 3. All advertising materials mentioning features or use of this software
52 1.5.4.2 briggs * must display the following acknowledgement:
53 1.5.4.2 briggs * This product includes software developed by TooLs GmbH.
54 1.5.4.2 briggs * 4. The name of TooLs GmbH may not be used to endorse or promote products
55 1.5.4.2 briggs * derived from this software without specific prior written permission.
56 1.5.4.2 briggs *
57 1.5.4.2 briggs * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
58 1.5.4.2 briggs * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 1.5.4.2 briggs * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 1.5.4.2 briggs * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 1.5.4.2 briggs * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
62 1.5.4.2 briggs * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 1.5.4.2 briggs * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
64 1.5.4.2 briggs * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
65 1.5.4.2 briggs * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 1.5.4.2 briggs * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 1.5.4.2 briggs */
68 1.5.4.2 briggs
69 1.5.4.3 nathanw #undef PPC_4XX_NOCACHE
70 1.5.4.2 briggs
71 1.5.4.2 briggs #include <sys/param.h>
72 1.5.4.2 briggs #include <sys/malloc.h>
73 1.5.4.2 briggs #include <sys/proc.h>
74 1.5.4.2 briggs #include <sys/user.h>
75 1.5.4.2 briggs #include <sys/queue.h>
76 1.5.4.2 briggs #include <sys/systm.h>
77 1.5.4.2 briggs #include <sys/pool.h>
78 1.5.4.2 briggs #include <sys/device.h>
79 1.5.4.2 briggs #include <sys/lwp.h>
80 1.5.4.2 briggs
81 1.5.4.2 briggs #include <uvm/uvm.h>
82 1.5.4.2 briggs
83 1.5.4.4 nathanw #include <machine/cpu.h>
84 1.5.4.2 briggs #include <machine/pcb.h>
85 1.5.4.2 briggs #include <machine/powerpc.h>
86 1.5.4.2 briggs
87 1.5.4.2 briggs #include <powerpc/spr.h>
88 1.5.4.4 nathanw #include <machine/tlb.h>
89 1.5.4.2 briggs
90 1.5.4.2 briggs /*
91 1.5.4.2 briggs * kernmap is an array of PTEs large enough to map in
92 1.5.4.2 briggs * 4GB. At 16KB/page it is 256K entries or 2MB.
93 1.5.4.2 briggs */
94 1.5.4.2 briggs #define KERNMAP_SIZE ((0xffffffffU/NBPG)+1)
95 1.5.4.2 briggs caddr_t kernmap;
96 1.5.4.2 briggs
97 1.5.4.2 briggs #define MINCTX 2
98 1.5.4.2 briggs #define NUMCTX 256
99 1.5.4.2 briggs volatile struct pmap *ctxbusy[NUMCTX];
100 1.5.4.2 briggs
101 1.5.4.2 briggs #define TLBF_USED 0x1
102 1.5.4.2 briggs #define TLBF_REF 0x2
103 1.5.4.2 briggs #define TLBF_LOCKED 0x4
104 1.5.4.2 briggs #define TLB_LOCKED(i) (tlb_info[(i)].ti_flags & TLBF_LOCKED)
105 1.5.4.2 briggs typedef struct tlb_info_s {
106 1.5.4.2 briggs char ti_flags;
107 1.5.4.2 briggs char ti_ctx; /* TLB_PID assiciated with the entry */
108 1.5.4.2 briggs u_int ti_va;
109 1.5.4.2 briggs } tlb_info_t;
110 1.5.4.2 briggs
111 1.5.4.2 briggs volatile tlb_info_t tlb_info[NTLB];
112 1.5.4.2 briggs /* We'll use a modified FIFO replacement policy cause it's cheap */
113 1.5.4.2 briggs volatile int tlbnext = TLB_NRESERVED;
114 1.5.4.2 briggs
115 1.5.4.2 briggs u_long dtlb_miss_count = 0;
116 1.5.4.2 briggs u_long itlb_miss_count = 0;
117 1.5.4.2 briggs u_long ktlb_miss_count = 0;
118 1.5.4.2 briggs u_long utlb_miss_count = 0;
119 1.5.4.2 briggs
120 1.5.4.2 briggs /* Event counters -- XXX type `INTR' so we can see them with vmstat -i */
121 1.5.4.2 briggs struct evcnt tlbmiss_ev = EVCNT_INITIALIZER(EVCNT_TYPE_INTR,
122 1.5.4.2 briggs NULL, "cpu", "tlbmiss");
123 1.5.4.2 briggs struct evcnt tlbhit_ev = EVCNT_INITIALIZER(EVCNT_TYPE_INTR,
124 1.5.4.2 briggs NULL, "cpu", "tlbhit");
125 1.5.4.2 briggs struct evcnt tlbflush_ev = EVCNT_INITIALIZER(EVCNT_TYPE_INTR,
126 1.5.4.2 briggs NULL, "cpu", "tlbflush");
127 1.5.4.2 briggs struct evcnt tlbenter_ev = EVCNT_INITIALIZER(EVCNT_TYPE_INTR,
128 1.5.4.2 briggs NULL, "cpu", "tlbenter");
129 1.5.4.2 briggs
130 1.5.4.2 briggs struct pmap kernel_pmap_;
131 1.5.4.2 briggs
132 1.5.4.2 briggs int physmem;
133 1.5.4.2 briggs static int npgs;
134 1.5.4.2 briggs static u_int nextavail;
135 1.5.4.2 briggs #ifndef MSGBUFADDR
136 1.5.4.2 briggs extern paddr_t msgbuf_paddr;
137 1.5.4.2 briggs #endif
138 1.5.4.2 briggs
139 1.5.4.2 briggs static struct mem_region *mem, *avail;
140 1.5.4.2 briggs
141 1.5.4.2 briggs /*
142 1.5.4.2 briggs * This is a cache of referenced/modified bits.
143 1.5.4.2 briggs * Bits herein are shifted by ATTRSHFT.
144 1.5.4.2 briggs */
145 1.5.4.2 briggs static char *pmap_attrib;
146 1.5.4.2 briggs
147 1.5.4.2 briggs #define PV_WIRED 0x1
148 1.5.4.2 briggs #define PV_WIRE(pv) ((pv)->pv_va |= PV_WIRED)
149 1.5.4.2 briggs #define PV_CMPVA(va,pv) (!(((pv)->pv_va^(va))&(~PV_WIRED)))
150 1.5.4.2 briggs
151 1.5.4.2 briggs struct pv_entry {
152 1.5.4.2 briggs struct pv_entry *pv_next; /* Linked list of mappings */
153 1.5.4.2 briggs vaddr_t pv_va; /* virtual address of mapping */
154 1.5.4.2 briggs struct pmap *pv_pm;
155 1.5.4.2 briggs };
156 1.5.4.2 briggs
157 1.5.4.2 briggs struct pv_entry *pv_table;
158 1.5.4.2 briggs static struct pool pv_pool;
159 1.5.4.2 briggs
160 1.5.4.2 briggs static int pmap_initialized;
161 1.5.4.2 briggs
162 1.5.4.2 briggs static int ctx_flush(int);
163 1.5.4.2 briggs
164 1.5.4.2 briggs inline struct pv_entry *pa_to_pv(paddr_t);
165 1.5.4.2 briggs static inline char *pa_to_attr(paddr_t);
166 1.5.4.2 briggs
167 1.5.4.2 briggs static inline volatile u_int *pte_find(struct pmap *, vaddr_t);
168 1.5.4.2 briggs static inline int pte_enter(struct pmap *, vaddr_t, u_int);
169 1.5.4.2 briggs
170 1.5.4.2 briggs static void pmap_pinit(pmap_t);
171 1.5.4.2 briggs static void pmap_release(pmap_t);
172 1.5.4.2 briggs static inline int pmap_enter_pv(struct pmap *, vaddr_t, paddr_t);
173 1.5.4.2 briggs static void pmap_remove_pv(struct pmap *, vaddr_t, paddr_t);
174 1.5.4.2 briggs
175 1.5.4.2 briggs
176 1.5.4.2 briggs inline struct pv_entry *
177 1.5.4.2 briggs pa_to_pv(paddr_t pa)
178 1.5.4.2 briggs {
179 1.5.4.2 briggs int bank, pg;
180 1.5.4.2 briggs
181 1.5.4.2 briggs bank = vm_physseg_find(atop(pa), &pg);
182 1.5.4.2 briggs if (bank == -1)
183 1.5.4.2 briggs return NULL;
184 1.5.4.2 briggs return &vm_physmem[bank].pmseg.pvent[pg];
185 1.5.4.2 briggs }
186 1.5.4.2 briggs
187 1.5.4.2 briggs static inline char *
188 1.5.4.2 briggs pa_to_attr(paddr_t pa)
189 1.5.4.2 briggs {
190 1.5.4.2 briggs int bank, pg;
191 1.5.4.2 briggs
192 1.5.4.2 briggs bank = vm_physseg_find(atop(pa), &pg);
193 1.5.4.2 briggs if (bank == -1)
194 1.5.4.2 briggs return NULL;
195 1.5.4.2 briggs return &vm_physmem[bank].pmseg.attrs[pg];
196 1.5.4.2 briggs }
197 1.5.4.2 briggs
198 1.5.4.2 briggs /*
199 1.5.4.2 briggs * Insert PTE into page table.
200 1.5.4.2 briggs */
201 1.5.4.2 briggs int
202 1.5.4.2 briggs pte_enter(struct pmap *pm, vaddr_t va, u_int pte)
203 1.5.4.2 briggs {
204 1.5.4.2 briggs int seg = STIDX(va);
205 1.5.4.2 briggs int ptn = PTIDX(va);
206 1.5.4.2 briggs paddr_t pa;
207 1.5.4.2 briggs
208 1.5.4.2 briggs if (!pm->pm_ptbl[seg]) {
209 1.5.4.2 briggs /* Don't allocate a page to clear a non-existent mapping. */
210 1.5.4.2 briggs if (!pte) return (1);
211 1.5.4.2 briggs /* Allocate a page XXXX this will sleep! */
212 1.5.4.2 briggs pa = 0;
213 1.5.4.2 briggs pm->pm_ptbl[seg] = (uint *)uvm_km_alloc1(kernel_map, NBPG, 1);
214 1.5.4.2 briggs }
215 1.5.4.2 briggs pm->pm_ptbl[seg][ptn] = pte;
216 1.5.4.2 briggs
217 1.5.4.2 briggs /* Flush entry. */
218 1.5.4.2 briggs ppc4xx_tlb_flush(va, pm->pm_ctx);
219 1.5.4.2 briggs return (1);
220 1.5.4.2 briggs }
221 1.5.4.2 briggs
222 1.5.4.2 briggs /*
223 1.5.4.2 briggs * Get a pointer to a PTE in a page table.
224 1.5.4.2 briggs */
225 1.5.4.2 briggs volatile u_int *
226 1.5.4.2 briggs pte_find(struct pmap *pm, vaddr_t va)
227 1.5.4.2 briggs {
228 1.5.4.2 briggs int seg = STIDX(va);
229 1.5.4.2 briggs int ptn = PTIDX(va);
230 1.5.4.2 briggs
231 1.5.4.2 briggs if (pm->pm_ptbl[seg])
232 1.5.4.2 briggs return (&pm->pm_ptbl[seg][ptn]);
233 1.5.4.2 briggs
234 1.5.4.2 briggs return (NULL);
235 1.5.4.2 briggs }
236 1.5.4.2 briggs
237 1.5.4.2 briggs /*
238 1.5.4.2 briggs * This is called during initppc, before the system is really initialized.
239 1.5.4.2 briggs */
240 1.5.4.2 briggs void
241 1.5.4.2 briggs pmap_bootstrap(u_int kernelstart, u_int kernelend)
242 1.5.4.2 briggs {
243 1.5.4.2 briggs struct mem_region *mp, *mp1;
244 1.5.4.2 briggs int cnt, i;
245 1.5.4.2 briggs u_int s, e, sz;
246 1.5.4.2 briggs
247 1.5.4.2 briggs /*
248 1.5.4.2 briggs * Allocate the kernel page table at the end of
249 1.5.4.2 briggs * kernel space so it's in the locked TTE.
250 1.5.4.2 briggs */
251 1.5.4.2 briggs kernmap = (caddr_t)kernelend;
252 1.5.4.2 briggs
253 1.5.4.2 briggs /*
254 1.5.4.2 briggs * Initialize kernel page table.
255 1.5.4.2 briggs */
256 1.5.4.2 briggs for (i = 0; i < STSZ; i++) {
257 1.5.4.4 nathanw pmap_kernel()->pm_ptbl[i] = 0;
258 1.5.4.2 briggs }
259 1.5.4.2 briggs ctxbusy[0] = ctxbusy[1] = pmap_kernel();
260 1.5.4.2 briggs
261 1.5.4.2 briggs /*
262 1.5.4.2 briggs * Announce page-size to the VM-system
263 1.5.4.2 briggs */
264 1.5.4.2 briggs uvmexp.pagesize = NBPG;
265 1.5.4.2 briggs uvm_setpagesize();
266 1.5.4.2 briggs
267 1.5.4.2 briggs /*
268 1.5.4.2 briggs * Get memory.
269 1.5.4.2 briggs */
270 1.5.4.2 briggs mem_regions(&mem, &avail);
271 1.5.4.2 briggs for (mp = mem; mp->size; mp++) {
272 1.5.4.2 briggs physmem += btoc(mp->size);
273 1.5.4.2 briggs printf("+%lx,",mp->size);
274 1.5.4.2 briggs }
275 1.5.4.2 briggs printf("\n");
276 1.5.4.2 briggs ppc4xx_tlb_init();
277 1.5.4.2 briggs /*
278 1.5.4.2 briggs * Count the number of available entries.
279 1.5.4.2 briggs */
280 1.5.4.2 briggs for (cnt = 0, mp = avail; mp->size; mp++)
281 1.5.4.2 briggs cnt++;
282 1.5.4.2 briggs
283 1.5.4.2 briggs /*
284 1.5.4.2 briggs * Page align all regions.
285 1.5.4.2 briggs * Non-page aligned memory isn't very interesting to us.
286 1.5.4.2 briggs * Also, sort the entries for ascending addresses.
287 1.5.4.2 briggs */
288 1.5.4.2 briggs kernelstart &= ~PGOFSET;
289 1.5.4.2 briggs kernelend = (kernelend + PGOFSET) & ~PGOFSET;
290 1.5.4.2 briggs for (mp = avail; mp->size; mp++) {
291 1.5.4.2 briggs s = mp->start;
292 1.5.4.2 briggs e = mp->start + mp->size;
293 1.5.4.2 briggs printf("%08x-%08x -> ",s,e);
294 1.5.4.2 briggs /*
295 1.5.4.2 briggs * Check whether this region holds all of the kernel.
296 1.5.4.2 briggs */
297 1.5.4.2 briggs if (s < kernelstart && e > kernelend) {
298 1.5.4.2 briggs avail[cnt].start = kernelend;
299 1.5.4.2 briggs avail[cnt++].size = e - kernelend;
300 1.5.4.2 briggs e = kernelstart;
301 1.5.4.2 briggs }
302 1.5.4.2 briggs /*
303 1.5.4.2 briggs * Look whether this regions starts within the kernel.
304 1.5.4.2 briggs */
305 1.5.4.2 briggs if (s >= kernelstart && s < kernelend) {
306 1.5.4.2 briggs if (e <= kernelend)
307 1.5.4.2 briggs goto empty;
308 1.5.4.2 briggs s = kernelend;
309 1.5.4.2 briggs }
310 1.5.4.2 briggs /*
311 1.5.4.2 briggs * Now look whether this region ends within the kernel.
312 1.5.4.2 briggs */
313 1.5.4.2 briggs if (e > kernelstart && e <= kernelend) {
314 1.5.4.2 briggs if (s >= kernelstart)
315 1.5.4.2 briggs goto empty;
316 1.5.4.2 briggs e = kernelstart;
317 1.5.4.2 briggs }
318 1.5.4.2 briggs /*
319 1.5.4.2 briggs * Now page align the start and size of the region.
320 1.5.4.2 briggs */
321 1.5.4.2 briggs s = round_page(s);
322 1.5.4.2 briggs e = trunc_page(e);
323 1.5.4.2 briggs if (e < s)
324 1.5.4.2 briggs e = s;
325 1.5.4.2 briggs sz = e - s;
326 1.5.4.2 briggs printf("%08x-%08x = %x\n",s,e,sz);
327 1.5.4.2 briggs /*
328 1.5.4.2 briggs * Check whether some memory is left here.
329 1.5.4.2 briggs */
330 1.5.4.2 briggs if (sz == 0) {
331 1.5.4.2 briggs empty:
332 1.5.4.2 briggs memmove(mp, mp + 1,
333 1.5.4.2 briggs (cnt - (mp - avail)) * sizeof *mp);
334 1.5.4.2 briggs cnt--;
335 1.5.4.2 briggs mp--;
336 1.5.4.2 briggs continue;
337 1.5.4.2 briggs }
338 1.5.4.2 briggs /*
339 1.5.4.2 briggs * Do an insertion sort.
340 1.5.4.2 briggs */
341 1.5.4.2 briggs npgs += btoc(sz);
342 1.5.4.2 briggs for (mp1 = avail; mp1 < mp; mp1++)
343 1.5.4.2 briggs if (s < mp1->start)
344 1.5.4.2 briggs break;
345 1.5.4.2 briggs if (mp1 < mp) {
346 1.5.4.2 briggs memmove(mp1 + 1, mp1, (char *)mp - (char *)mp1);
347 1.5.4.2 briggs mp1->start = s;
348 1.5.4.2 briggs mp1->size = sz;
349 1.5.4.2 briggs } else {
350 1.5.4.2 briggs mp->start = s;
351 1.5.4.2 briggs mp->size = sz;
352 1.5.4.2 briggs }
353 1.5.4.2 briggs }
354 1.5.4.2 briggs
355 1.5.4.2 briggs /*
356 1.5.4.2 briggs * We cannot do pmap_steal_memory here,
357 1.5.4.2 briggs * since we don't run with translation enabled yet.
358 1.5.4.2 briggs */
359 1.5.4.2 briggs #ifndef MSGBUFADDR
360 1.5.4.2 briggs /*
361 1.5.4.2 briggs * allow for msgbuf
362 1.5.4.2 briggs */
363 1.5.4.2 briggs sz = round_page(MSGBUFSIZE);
364 1.5.4.2 briggs mp = NULL;
365 1.5.4.2 briggs for (mp1 = avail; mp1->size; mp1++)
366 1.5.4.2 briggs if (mp1->size >= sz)
367 1.5.4.2 briggs mp = mp1;
368 1.5.4.2 briggs if (mp == NULL)
369 1.5.4.2 briggs panic("not enough memory?");
370 1.5.4.2 briggs
371 1.5.4.2 briggs npgs -= btoc(sz);
372 1.5.4.2 briggs msgbuf_paddr = mp->start + mp->size - sz;
373 1.5.4.2 briggs mp->size -= sz;
374 1.5.4.2 briggs if (mp->size <= 0)
375 1.5.4.2 briggs memmove(mp, mp + 1, (cnt - (mp - avail)) * sizeof *mp);
376 1.5.4.2 briggs #endif
377 1.5.4.2 briggs
378 1.5.4.2 briggs printf("Loading pages\n");
379 1.5.4.2 briggs for (mp = avail; mp->size; mp++)
380 1.5.4.2 briggs uvm_page_physload(atop(mp->start), atop(mp->start + mp->size),
381 1.5.4.2 briggs atop(mp->start), atop(mp->start + mp->size),
382 1.5.4.2 briggs VM_FREELIST_DEFAULT);
383 1.5.4.2 briggs
384 1.5.4.2 briggs /*
385 1.5.4.2 briggs * Initialize kernel pmap and hardware.
386 1.5.4.2 briggs */
387 1.5.4.2 briggs /* Setup TLB pid allocator so it knows we alreadu using PID 1 */
388 1.5.4.2 briggs pmap_kernel()->pm_ctx = KERNEL_PID;
389 1.5.4.2 briggs nextavail = avail->start;
390 1.5.4.2 briggs
391 1.5.4.2 briggs
392 1.5.4.2 briggs evcnt_attach_static(&tlbhit_ev);
393 1.5.4.2 briggs evcnt_attach_static(&tlbmiss_ev);
394 1.5.4.2 briggs evcnt_attach_static(&tlbflush_ev);
395 1.5.4.2 briggs evcnt_attach_static(&tlbenter_ev);
396 1.5.4.2 briggs printf("Done\n");
397 1.5.4.2 briggs }
398 1.5.4.2 briggs
399 1.5.4.2 briggs /*
400 1.5.4.2 briggs * Restrict given range to physical memory
401 1.5.4.2 briggs *
402 1.5.4.2 briggs * (Used by /dev/mem)
403 1.5.4.2 briggs */
404 1.5.4.2 briggs void
405 1.5.4.2 briggs pmap_real_memory(paddr_t *start, psize_t *size)
406 1.5.4.2 briggs {
407 1.5.4.2 briggs struct mem_region *mp;
408 1.5.4.2 briggs
409 1.5.4.2 briggs for (mp = mem; mp->size; mp++) {
410 1.5.4.2 briggs if (*start + *size > mp->start &&
411 1.5.4.2 briggs *start < mp->start + mp->size) {
412 1.5.4.2 briggs if (*start < mp->start) {
413 1.5.4.2 briggs *size -= mp->start - *start;
414 1.5.4.2 briggs *start = mp->start;
415 1.5.4.2 briggs }
416 1.5.4.2 briggs if (*start + *size > mp->start + mp->size)
417 1.5.4.2 briggs *size = mp->start + mp->size - *start;
418 1.5.4.2 briggs return;
419 1.5.4.2 briggs }
420 1.5.4.2 briggs }
421 1.5.4.2 briggs *size = 0;
422 1.5.4.2 briggs }
423 1.5.4.2 briggs
424 1.5.4.2 briggs /*
425 1.5.4.2 briggs * Initialize anything else for pmap handling.
426 1.5.4.2 briggs * Called during vm_init().
427 1.5.4.2 briggs */
428 1.5.4.2 briggs void
429 1.5.4.2 briggs pmap_init(void)
430 1.5.4.2 briggs {
431 1.5.4.2 briggs struct pv_entry *pv;
432 1.5.4.2 briggs vsize_t sz;
433 1.5.4.2 briggs vaddr_t addr;
434 1.5.4.2 briggs int i, s;
435 1.5.4.2 briggs int bank;
436 1.5.4.2 briggs char *attr;
437 1.5.4.2 briggs
438 1.5.4.2 briggs sz = (vsize_t)((sizeof(struct pv_entry) + 1) * npgs);
439 1.5.4.2 briggs sz = round_page(sz);
440 1.5.4.2 briggs addr = uvm_km_zalloc(kernel_map, sz);
441 1.5.4.2 briggs s = splvm();
442 1.5.4.2 briggs pv = pv_table = (struct pv_entry *)addr;
443 1.5.4.2 briggs for (i = npgs; --i >= 0;)
444 1.5.4.2 briggs pv++->pv_pm = NULL;
445 1.5.4.2 briggs pmap_attrib = (char *)pv;
446 1.5.4.2 briggs memset(pv, 0, npgs);
447 1.5.4.2 briggs
448 1.5.4.2 briggs pv = pv_table;
449 1.5.4.2 briggs attr = pmap_attrib;
450 1.5.4.2 briggs for (bank = 0; bank < vm_nphysseg; bank++) {
451 1.5.4.2 briggs sz = vm_physmem[bank].end - vm_physmem[bank].start;
452 1.5.4.2 briggs vm_physmem[bank].pmseg.pvent = pv;
453 1.5.4.2 briggs vm_physmem[bank].pmseg.attrs = attr;
454 1.5.4.2 briggs pv += sz;
455 1.5.4.2 briggs attr += sz;
456 1.5.4.2 briggs }
457 1.5.4.2 briggs
458 1.5.4.2 briggs pmap_initialized = 1;
459 1.5.4.2 briggs splx(s);
460 1.5.4.2 briggs
461 1.5.4.2 briggs /* Setup a pool for additional pvlist structures */
462 1.5.4.4 nathanw pool_init(&pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pv_entry", NULL);
463 1.5.4.2 briggs }
464 1.5.4.2 briggs
465 1.5.4.2 briggs /*
466 1.5.4.2 briggs * How much virtual space is available to the kernel?
467 1.5.4.2 briggs */
468 1.5.4.2 briggs void
469 1.5.4.2 briggs pmap_virtual_space(vaddr_t *start, vaddr_t *end)
470 1.5.4.2 briggs {
471 1.5.4.2 briggs
472 1.5.4.2 briggs #if 0
473 1.5.4.2 briggs /*
474 1.5.4.2 briggs * Reserve one segment for kernel virtual memory
475 1.5.4.2 briggs */
476 1.5.4.2 briggs *start = (vaddr_t)(KERNEL_SR << ADDR_SR_SHFT);
477 1.5.4.2 briggs *end = *start + SEGMENT_LENGTH;
478 1.5.4.2 briggs #else
479 1.5.4.2 briggs *start = (vaddr_t) VM_MIN_KERNEL_ADDRESS;
480 1.5.4.2 briggs *end = (vaddr_t) VM_MAX_KERNEL_ADDRESS;
481 1.5.4.2 briggs #endif
482 1.5.4.2 briggs }
483 1.5.4.2 briggs
484 1.5.4.2 briggs #ifdef PMAP_GROWKERNEL
485 1.5.4.2 briggs /*
486 1.5.4.2 briggs * Preallocate kernel page tables to a specified VA.
487 1.5.4.2 briggs * This simply loops through the first TTE for each
488 1.5.4.2 briggs * page table from the beginning of the kernel pmap,
489 1.5.4.2 briggs * reads the entry, and if the result is
490 1.5.4.2 briggs * zero (either invalid entry or no page table) it stores
491 1.5.4.2 briggs * a zero there, populating page tables in the process.
492 1.5.4.2 briggs * This is not the most efficient technique but i don't
493 1.5.4.2 briggs * expect it to be called that often.
494 1.5.4.2 briggs */
495 1.5.4.2 briggs extern struct vm_page *vm_page_alloc1 __P((void));
496 1.5.4.2 briggs extern void vm_page_free1 __P((struct vm_page *));
497 1.5.4.2 briggs
498 1.5.4.2 briggs vaddr_t kbreak = VM_MIN_KERNEL_ADDRESS;
499 1.5.4.2 briggs
500 1.5.4.2 briggs vaddr_t
501 1.5.4.2 briggs pmap_growkernel(maxkvaddr)
502 1.5.4.2 briggs vaddr_t maxkvaddr;
503 1.5.4.2 briggs {
504 1.5.4.2 briggs int s;
505 1.5.4.2 briggs int seg;
506 1.5.4.2 briggs paddr_t pg;
507 1.5.4.2 briggs struct pmap *pm = pmap_kernel();
508 1.5.4.2 briggs
509 1.5.4.2 briggs s = splvm();
510 1.5.4.2 briggs
511 1.5.4.2 briggs /* Align with the start of a page table */
512 1.5.4.2 briggs for (kbreak &= ~(PTMAP-1); kbreak < maxkvaddr;
513 1.5.4.2 briggs kbreak += PTMAP) {
514 1.5.4.2 briggs seg = STIDX(kbreak);
515 1.5.4.2 briggs
516 1.5.4.2 briggs if (pte_find(pm, kbreak)) continue;
517 1.5.4.2 briggs
518 1.5.4.2 briggs if (uvm.page_init_done) {
519 1.5.4.2 briggs pg = (paddr_t)VM_PAGE_TO_PHYS(vm_page_alloc1());
520 1.5.4.2 briggs } else {
521 1.5.4.2 briggs if (!uvm_page_physget(&pg))
522 1.5.4.2 briggs panic("pmap_growkernel: no memory");
523 1.5.4.2 briggs }
524 1.5.4.2 briggs if (!pg) panic("pmap_growkernel: no pages");
525 1.5.4.2 briggs pmap_zero_page((paddr_t)pg);
526 1.5.4.2 briggs
527 1.5.4.2 briggs /* XXX This is based on all phymem being addressable */
528 1.5.4.2 briggs pm->pm_ptbl[seg] = (u_int *)pg;
529 1.5.4.2 briggs }
530 1.5.4.2 briggs splx(s);
531 1.5.4.2 briggs return (kbreak);
532 1.5.4.2 briggs }
533 1.5.4.2 briggs
534 1.5.4.2 briggs /*
535 1.5.4.2 briggs * vm_page_alloc1:
536 1.5.4.2 briggs *
537 1.5.4.2 briggs * Allocate and return a memory cell with no associated object.
538 1.5.4.2 briggs */
539 1.5.4.2 briggs struct vm_page *
540 1.5.4.2 briggs vm_page_alloc1()
541 1.5.4.2 briggs {
542 1.5.4.2 briggs struct vm_page *pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_USERESERVE);
543 1.5.4.2 briggs if (pg) {
544 1.5.4.2 briggs pg->wire_count = 1; /* no mappings yet */
545 1.5.4.2 briggs pg->flags &= ~PG_BUSY; /* never busy */
546 1.5.4.2 briggs }
547 1.5.4.2 briggs return pg;
548 1.5.4.2 briggs }
549 1.5.4.2 briggs
550 1.5.4.2 briggs /*
551 1.5.4.2 briggs * vm_page_free1:
552 1.5.4.2 briggs *
553 1.5.4.2 briggs * Returns the given page to the free list,
554 1.5.4.2 briggs * disassociating it with any VM object.
555 1.5.4.2 briggs *
556 1.5.4.2 briggs * Object and page must be locked prior to entry.
557 1.5.4.2 briggs */
558 1.5.4.2 briggs void
559 1.5.4.2 briggs vm_page_free1(mem)
560 1.5.4.2 briggs struct vm_page *mem;
561 1.5.4.2 briggs {
562 1.5.4.4 nathanw #ifdef DIAGNOSTIC
563 1.5.4.2 briggs if (mem->flags != (PG_CLEAN|PG_FAKE)) {
564 1.5.4.2 briggs printf("Freeing invalid page %p\n", mem);
565 1.5.4.2 briggs printf("pa = %llx\n", (unsigned long long)VM_PAGE_TO_PHYS(mem));
566 1.5.4.4 nathanw #ifdef DDB
567 1.5.4.2 briggs Debugger();
568 1.5.4.4 nathanw #endif
569 1.5.4.2 briggs return;
570 1.5.4.2 briggs }
571 1.5.4.4 nathanw #endif
572 1.5.4.2 briggs mem->flags |= PG_BUSY;
573 1.5.4.2 briggs mem->wire_count = 0;
574 1.5.4.2 briggs uvm_pagefree(mem);
575 1.5.4.2 briggs }
576 1.5.4.2 briggs #endif
577 1.5.4.2 briggs
578 1.5.4.2 briggs /*
579 1.5.4.2 briggs * Create and return a physical map.
580 1.5.4.2 briggs */
581 1.5.4.2 briggs struct pmap *
582 1.5.4.2 briggs pmap_create(void)
583 1.5.4.2 briggs {
584 1.5.4.2 briggs struct pmap *pm;
585 1.5.4.2 briggs
586 1.5.4.2 briggs pm = (struct pmap *)malloc(sizeof *pm, M_VMPMAP, M_WAITOK);
587 1.5.4.2 briggs memset((caddr_t)pm, 0, sizeof *pm);
588 1.5.4.2 briggs pmap_pinit(pm);
589 1.5.4.2 briggs return pm;
590 1.5.4.2 briggs }
591 1.5.4.2 briggs
592 1.5.4.2 briggs /*
593 1.5.4.2 briggs * Initialize a preallocated and zeroed pmap structure.
594 1.5.4.2 briggs */
595 1.5.4.2 briggs void
596 1.5.4.2 briggs pmap_pinit(struct pmap *pm)
597 1.5.4.2 briggs {
598 1.5.4.2 briggs int i;
599 1.5.4.2 briggs
600 1.5.4.2 briggs /*
601 1.5.4.2 briggs * Allocate some segment registers for this pmap.
602 1.5.4.2 briggs */
603 1.5.4.2 briggs pm->pm_refs = 1;
604 1.5.4.2 briggs for (i = 0; i < STSZ; i++)
605 1.5.4.2 briggs pm->pm_ptbl[i] = NULL;
606 1.5.4.2 briggs }
607 1.5.4.2 briggs
608 1.5.4.2 briggs /*
609 1.5.4.2 briggs * Add a reference to the given pmap.
610 1.5.4.2 briggs */
611 1.5.4.2 briggs void
612 1.5.4.2 briggs pmap_reference(struct pmap *pm)
613 1.5.4.2 briggs {
614 1.5.4.2 briggs
615 1.5.4.2 briggs pm->pm_refs++;
616 1.5.4.2 briggs }
617 1.5.4.2 briggs
618 1.5.4.2 briggs /*
619 1.5.4.2 briggs * Retire the given pmap from service.
620 1.5.4.2 briggs * Should only be called if the map contains no valid mappings.
621 1.5.4.2 briggs */
622 1.5.4.2 briggs void
623 1.5.4.2 briggs pmap_destroy(struct pmap *pm)
624 1.5.4.2 briggs {
625 1.5.4.2 briggs
626 1.5.4.2 briggs if (--pm->pm_refs == 0) {
627 1.5.4.2 briggs pmap_release(pm);
628 1.5.4.2 briggs free((caddr_t)pm, M_VMPMAP);
629 1.5.4.2 briggs }
630 1.5.4.2 briggs }
631 1.5.4.2 briggs
632 1.5.4.2 briggs /*
633 1.5.4.2 briggs * Release any resources held by the given physical map.
634 1.5.4.2 briggs * Called when a pmap initialized by pmap_pinit is being released.
635 1.5.4.2 briggs */
636 1.5.4.2 briggs static void
637 1.5.4.2 briggs pmap_release(struct pmap *pm)
638 1.5.4.2 briggs {
639 1.5.4.2 briggs int i;
640 1.5.4.2 briggs
641 1.5.4.2 briggs for (i = 0; i < STSZ; i++)
642 1.5.4.2 briggs if (pm->pm_ptbl[i]) {
643 1.5.4.2 briggs uvm_km_free(kernel_map, (vaddr_t)pm->pm_ptbl[i], NBPG);
644 1.5.4.2 briggs pm->pm_ptbl[i] = NULL;
645 1.5.4.2 briggs }
646 1.5.4.2 briggs if (pm->pm_ctx) ctx_free(pm);
647 1.5.4.2 briggs }
648 1.5.4.2 briggs
649 1.5.4.2 briggs /*
650 1.5.4.2 briggs * Copy the range specified by src_addr/len
651 1.5.4.2 briggs * from the source map to the range dst_addr/len
652 1.5.4.2 briggs * in the destination map.
653 1.5.4.2 briggs *
654 1.5.4.2 briggs * This routine is only advisory and need not do anything.
655 1.5.4.2 briggs */
656 1.5.4.2 briggs void
657 1.5.4.2 briggs pmap_copy(struct pmap *dst_pmap, struct pmap *src_pmap, vaddr_t dst_addr,
658 1.5.4.2 briggs vsize_t len, vaddr_t src_addr)
659 1.5.4.2 briggs {
660 1.5.4.2 briggs }
661 1.5.4.2 briggs
662 1.5.4.2 briggs /*
663 1.5.4.2 briggs * Require that all active physical maps contain no
664 1.5.4.2 briggs * incorrect entries NOW.
665 1.5.4.2 briggs */
666 1.5.4.2 briggs void
667 1.5.4.2 briggs pmap_update(struct pmap *pmap)
668 1.5.4.2 briggs {
669 1.5.4.2 briggs }
670 1.5.4.2 briggs
671 1.5.4.2 briggs /*
672 1.5.4.2 briggs * Garbage collects the physical map system for
673 1.5.4.2 briggs * pages which are no longer used.
674 1.5.4.2 briggs * Success need not be guaranteed -- that is, there
675 1.5.4.2 briggs * may well be pages which are not referenced, but
676 1.5.4.2 briggs * others may be collected.
677 1.5.4.2 briggs * Called by the pageout daemon when pages are scarce.
678 1.5.4.2 briggs */
679 1.5.4.2 briggs void
680 1.5.4.2 briggs pmap_collect(struct pmap *pm)
681 1.5.4.2 briggs {
682 1.5.4.2 briggs }
683 1.5.4.2 briggs
684 1.5.4.2 briggs /*
685 1.5.4.2 briggs * Fill the given physical page with zeroes.
686 1.5.4.2 briggs */
687 1.5.4.2 briggs void
688 1.5.4.2 briggs pmap_zero_page(paddr_t pa)
689 1.5.4.2 briggs {
690 1.5.4.2 briggs
691 1.5.4.3 nathanw #ifdef PPC_4XX_NOCACHE
692 1.5.4.2 briggs memset((caddr_t)pa, 0, NBPG);
693 1.5.4.2 briggs #else
694 1.5.4.2 briggs int i;
695 1.5.4.2 briggs
696 1.5.4.2 briggs for (i = NBPG/CACHELINESIZE; i > 0; i--) {
697 1.5.4.2 briggs __asm __volatile ("dcbz 0,%0" :: "r"(pa));
698 1.5.4.2 briggs pa += CACHELINESIZE;
699 1.5.4.2 briggs }
700 1.5.4.2 briggs #endif
701 1.5.4.2 briggs }
702 1.5.4.2 briggs
703 1.5.4.2 briggs /*
704 1.5.4.2 briggs * Copy the given physical source page to its destination.
705 1.5.4.2 briggs */
706 1.5.4.2 briggs void
707 1.5.4.2 briggs pmap_copy_page(paddr_t src, paddr_t dst)
708 1.5.4.2 briggs {
709 1.5.4.2 briggs
710 1.5.4.2 briggs memcpy((caddr_t)dst, (caddr_t)src, NBPG);
711 1.5.4.2 briggs dcache_flush_page(dst);
712 1.5.4.2 briggs }
713 1.5.4.2 briggs
714 1.5.4.2 briggs /*
715 1.5.4.2 briggs * This returns whether this is the first mapping of a page.
716 1.5.4.2 briggs */
717 1.5.4.2 briggs static inline int
718 1.5.4.2 briggs pmap_enter_pv(struct pmap *pm, vaddr_t va, paddr_t pa)
719 1.5.4.2 briggs {
720 1.5.4.2 briggs struct pv_entry *pv, *npv = NULL;
721 1.5.4.2 briggs int s;
722 1.5.4.2 briggs
723 1.5.4.2 briggs if (!pmap_initialized)
724 1.5.4.2 briggs return 0;
725 1.5.4.2 briggs
726 1.5.4.2 briggs s = splvm();
727 1.5.4.2 briggs
728 1.5.4.2 briggs pv = pa_to_pv(pa);
729 1.5.4.4 nathanw for (npv = pv; npv; npv = npv->pv_next)
730 1.5.4.4 nathanw if (npv->pv_va == va && npv->pv_pm == pm) {
731 1.5.4.4 nathanw printf("Duplicate pv: va %lx pm %p\n", va, pm);
732 1.5.4.4 nathanw Debugger();
733 1.5.4.4 nathanw return (1);
734 1.5.4.4 nathanw }
735 1.5.4.4 nathanw
736 1.5.4.2 briggs if (!pv->pv_pm) {
737 1.5.4.2 briggs /*
738 1.5.4.2 briggs * No entries yet, use header as the first entry.
739 1.5.4.2 briggs */
740 1.5.4.2 briggs pv->pv_va = va;
741 1.5.4.2 briggs pv->pv_pm = pm;
742 1.5.4.2 briggs pv->pv_next = NULL;
743 1.5.4.2 briggs } else {
744 1.5.4.2 briggs /*
745 1.5.4.2 briggs * There is at least one other VA mapping this page.
746 1.5.4.2 briggs * Place this entry after the header.
747 1.5.4.2 briggs */
748 1.5.4.2 briggs npv = pool_get(&pv_pool, PR_WAITOK);
749 1.5.4.2 briggs if (!npv) return (0);
750 1.5.4.2 briggs npv->pv_va = va;
751 1.5.4.2 briggs npv->pv_pm = pm;
752 1.5.4.2 briggs npv->pv_next = pv->pv_next;
753 1.5.4.2 briggs pv->pv_next = npv;
754 1.5.4.2 briggs }
755 1.5.4.2 briggs splx(s);
756 1.5.4.2 briggs return (1);
757 1.5.4.2 briggs }
758 1.5.4.2 briggs
759 1.5.4.2 briggs static void
760 1.5.4.2 briggs pmap_remove_pv(struct pmap *pm, vaddr_t va, paddr_t pa)
761 1.5.4.2 briggs {
762 1.5.4.2 briggs struct pv_entry *pv, *npv;
763 1.5.4.2 briggs
764 1.5.4.2 briggs /*
765 1.5.4.2 briggs * Remove from the PV table.
766 1.5.4.2 briggs */
767 1.5.4.2 briggs pv = pa_to_pv(pa);
768 1.5.4.2 briggs if (!pv) return;
769 1.5.4.2 briggs
770 1.5.4.2 briggs /*
771 1.5.4.2 briggs * If it is the first entry on the list, it is actually
772 1.5.4.2 briggs * in the header and we must copy the following entry up
773 1.5.4.2 briggs * to the header. Otherwise we must search the list for
774 1.5.4.2 briggs * the entry. In either case we free the now unused entry.
775 1.5.4.2 briggs */
776 1.5.4.2 briggs if (pm == pv->pv_pm && PV_CMPVA(va, pv)) {
777 1.5.4.2 briggs if ((npv = pv->pv_next)) {
778 1.5.4.2 briggs *pv = *npv;
779 1.5.4.2 briggs pool_put(&pv_pool, npv);
780 1.5.4.2 briggs } else
781 1.5.4.2 briggs pv->pv_pm = NULL;
782 1.5.4.2 briggs } else {
783 1.5.4.2 briggs for (; (npv = pv->pv_next) != NULL; pv = npv)
784 1.5.4.2 briggs if (pm == npv->pv_pm && PV_CMPVA(va, npv))
785 1.5.4.2 briggs break;
786 1.5.4.2 briggs if (npv) {
787 1.5.4.2 briggs pv->pv_next = npv->pv_next;
788 1.5.4.2 briggs pool_put(&pv_pool, npv);
789 1.5.4.2 briggs }
790 1.5.4.2 briggs }
791 1.5.4.2 briggs }
792 1.5.4.2 briggs
793 1.5.4.2 briggs /*
794 1.5.4.2 briggs * Insert physical page at pa into the given pmap at virtual address va.
795 1.5.4.2 briggs */
796 1.5.4.2 briggs int
797 1.5.4.2 briggs pmap_enter(struct pmap *pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags)
798 1.5.4.2 briggs {
799 1.5.4.2 briggs int s;
800 1.5.4.2 briggs u_int tte;
801 1.5.4.2 briggs int managed;
802 1.5.4.2 briggs
803 1.5.4.2 briggs /*
804 1.5.4.2 briggs * Have to remove any existing mapping first.
805 1.5.4.2 briggs */
806 1.5.4.2 briggs pmap_remove(pm, va, va + NBPG);
807 1.5.4.2 briggs
808 1.5.4.2 briggs if (flags & PMAP_WIRED) flags |= prot;
809 1.5.4.2 briggs
810 1.5.4.2 briggs /* If it has no protections don't bother w/the rest */
811 1.5.4.2 briggs if (!(flags & VM_PROT_ALL))
812 1.5.4.2 briggs return (0);
813 1.5.4.2 briggs
814 1.5.4.2 briggs managed = 0;
815 1.5.4.2 briggs if (vm_physseg_find(atop(pa), NULL) != -1)
816 1.5.4.2 briggs managed = 1;
817 1.5.4.2 briggs
818 1.5.4.2 briggs /*
819 1.5.4.2 briggs * Generate TTE.
820 1.5.4.2 briggs *
821 1.5.4.2 briggs * XXXX
822 1.5.4.2 briggs *
823 1.5.4.2 briggs * Since the kernel does not handle execution privileges properly,
824 1.5.4.2 briggs * we will handle read and execute permissions together.
825 1.5.4.2 briggs */
826 1.5.4.2 briggs tte = TTE_PA(pa) | TTE_EX;
827 1.5.4.2 briggs /* XXXX -- need to support multiple page sizes. */
828 1.5.4.2 briggs tte |= TTE_SZ_16K;
829 1.5.4.2 briggs #ifdef DIAGNOSTIC
830 1.5.4.2 briggs if ((flags & (PME_NOCACHE | PME_WRITETHROUG)) ==
831 1.5.4.2 briggs (PME_NOCACHE | PME_WRITETHROUG))
832 1.5.4.2 briggs panic("pmap_enter: uncached & writethrough\n");
833 1.5.4.2 briggs #endif
834 1.5.4.2 briggs if (flags & PME_NOCACHE)
835 1.5.4.2 briggs /* Must be I/O mapping */
836 1.5.4.2 briggs tte |= TTE_I | TTE_G;
837 1.5.4.3 nathanw #ifdef PPC_4XX_NOCACHE
838 1.5.4.2 briggs tte |= TTE_I;
839 1.5.4.2 briggs #else
840 1.5.4.2 briggs else if (flags & PME_WRITETHROUG)
841 1.5.4.2 briggs /* Uncached and writethrough are not compatible */
842 1.5.4.2 briggs tte |= TTE_W;
843 1.5.4.2 briggs #endif
844 1.5.4.2 briggs if (pm == pmap_kernel())
845 1.5.4.2 briggs tte |= TTE_ZONE(ZONE_PRIV);
846 1.5.4.2 briggs else
847 1.5.4.2 briggs tte |= TTE_ZONE(ZONE_USER);
848 1.5.4.2 briggs
849 1.5.4.2 briggs if (flags & VM_PROT_WRITE)
850 1.5.4.2 briggs tte |= TTE_WR;
851 1.5.4.2 briggs
852 1.5.4.2 briggs /*
853 1.5.4.2 briggs * Now record mapping for later back-translation.
854 1.5.4.2 briggs */
855 1.5.4.2 briggs if (pmap_initialized && managed) {
856 1.5.4.2 briggs char *attr;
857 1.5.4.2 briggs
858 1.5.4.2 briggs if (!pmap_enter_pv(pm, va, pa)) {
859 1.5.4.2 briggs /* Could not enter pv on a managed page */
860 1.5.4.2 briggs return 1;
861 1.5.4.2 briggs }
862 1.5.4.2 briggs
863 1.5.4.2 briggs /* Now set attributes. */
864 1.5.4.2 briggs attr = pa_to_attr(pa);
865 1.5.4.2 briggs #ifdef DIAGNOSTIC
866 1.5.4.2 briggs if (!attr)
867 1.5.4.2 briggs panic("managed but no attr\n");
868 1.5.4.2 briggs #endif
869 1.5.4.2 briggs if (flags & VM_PROT_ALL)
870 1.5.4.2 briggs *attr |= PTE_HI_REF;
871 1.5.4.2 briggs if (flags & VM_PROT_WRITE)
872 1.5.4.2 briggs *attr |= PTE_HI_CHG;
873 1.5.4.2 briggs }
874 1.5.4.2 briggs
875 1.5.4.2 briggs s = splvm();
876 1.5.4.2 briggs pm->pm_stats.resident_count++;
877 1.5.4.2 briggs
878 1.5.4.2 briggs /* Insert page into page table. */
879 1.5.4.2 briggs pte_enter(pm, va, tte);
880 1.5.4.2 briggs
881 1.5.4.2 briggs /* If this is a real fault, enter it in the tlb */
882 1.5.4.2 briggs if (tte && ((flags & PMAP_WIRED) == 0)) {
883 1.5.4.2 briggs ppc4xx_tlb_enter(pm->pm_ctx, va, tte);
884 1.5.4.2 briggs }
885 1.5.4.2 briggs splx(s);
886 1.5.4.5 nathanw
887 1.5.4.5 nathanw /* Flush the real memory from the instruction cache. */
888 1.5.4.5 nathanw if ((prot & VM_PROT_EXECUTE) && (tte & TTE_I) == 0)
889 1.5.4.5 nathanw __syncicache((void *)pa, PAGE_SIZE);
890 1.5.4.5 nathanw
891 1.5.4.2 briggs return 0;
892 1.5.4.2 briggs }
893 1.5.4.2 briggs
894 1.5.4.2 briggs void
895 1.5.4.2 briggs pmap_unwire(struct pmap *pm, vaddr_t va)
896 1.5.4.2 briggs {
897 1.5.4.2 briggs struct pv_entry *pv, *npv;
898 1.5.4.2 briggs paddr_t pa;
899 1.5.4.2 briggs int s = splvm();
900 1.5.4.2 briggs
901 1.5.4.2 briggs if (pm == NULL) {
902 1.5.4.2 briggs return;
903 1.5.4.2 briggs }
904 1.5.4.2 briggs
905 1.5.4.2 briggs if (!pmap_extract(pm, va, &pa)) {
906 1.5.4.2 briggs return;
907 1.5.4.2 briggs }
908 1.5.4.2 briggs
909 1.5.4.2 briggs va |= PV_WIRED;
910 1.5.4.2 briggs
911 1.5.4.2 briggs pv = pa_to_pv(pa);
912 1.5.4.2 briggs if (!pv) return;
913 1.5.4.2 briggs
914 1.5.4.2 briggs /*
915 1.5.4.2 briggs * If it is the first entry on the list, it is actually
916 1.5.4.2 briggs * in the header and we must copy the following entry up
917 1.5.4.2 briggs * to the header. Otherwise we must search the list for
918 1.5.4.2 briggs * the entry. In either case we free the now unused entry.
919 1.5.4.2 briggs */
920 1.5.4.2 briggs for (npv = pv; (npv = pv->pv_next) != NULL; pv = npv) {
921 1.5.4.2 briggs if (pm == npv->pv_pm && PV_CMPVA(va, npv)) {
922 1.5.4.2 briggs npv->pv_va &= ~PV_WIRED;
923 1.5.4.2 briggs break;
924 1.5.4.2 briggs }
925 1.5.4.2 briggs }
926 1.5.4.2 briggs splx(s);
927 1.5.4.2 briggs }
928 1.5.4.2 briggs
929 1.5.4.2 briggs void
930 1.5.4.2 briggs pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot)
931 1.5.4.2 briggs {
932 1.5.4.2 briggs int s;
933 1.5.4.2 briggs u_int tte;
934 1.5.4.2 briggs struct pmap *pm = pmap_kernel();
935 1.5.4.2 briggs
936 1.5.4.2 briggs /*
937 1.5.4.2 briggs * Have to remove any existing mapping first.
938 1.5.4.2 briggs */
939 1.5.4.2 briggs
940 1.5.4.2 briggs /*
941 1.5.4.2 briggs * Generate TTE.
942 1.5.4.2 briggs *
943 1.5.4.2 briggs * XXXX
944 1.5.4.2 briggs *
945 1.5.4.2 briggs * Since the kernel does not handle execution privileges properly,
946 1.5.4.2 briggs * we will handle read and execute permissions together.
947 1.5.4.2 briggs */
948 1.5.4.2 briggs tte = 0;
949 1.5.4.2 briggs if (prot & VM_PROT_ALL) {
950 1.5.4.2 briggs
951 1.5.4.2 briggs tte = TTE_PA(pa) | TTE_EX | TTE_ZONE(ZONE_PRIV);
952 1.5.4.2 briggs /* XXXX -- need to support multiple page sizes. */
953 1.5.4.2 briggs tte |= TTE_SZ_16K;
954 1.5.4.2 briggs #ifdef DIAGNOSTIC
955 1.5.4.2 briggs if ((prot & (PME_NOCACHE | PME_WRITETHROUG)) ==
956 1.5.4.2 briggs (PME_NOCACHE | PME_WRITETHROUG))
957 1.5.4.2 briggs panic("pmap_kenter_pa: uncached & writethrough\n");
958 1.5.4.2 briggs #endif
959 1.5.4.2 briggs if (prot & PME_NOCACHE)
960 1.5.4.2 briggs /* Must be I/O mapping */
961 1.5.4.2 briggs tte |= TTE_I | TTE_G;
962 1.5.4.3 nathanw #ifdef PPC_4XX_NOCACHE
963 1.5.4.2 briggs tte |= TTE_I;
964 1.5.4.2 briggs #else
965 1.5.4.2 briggs else if (prot & PME_WRITETHROUG)
966 1.5.4.2 briggs /* Uncached and writethrough are not compatible */
967 1.5.4.2 briggs tte |= TTE_W;
968 1.5.4.2 briggs #endif
969 1.5.4.2 briggs if (prot & VM_PROT_WRITE)
970 1.5.4.2 briggs tte |= TTE_WR;
971 1.5.4.2 briggs }
972 1.5.4.2 briggs
973 1.5.4.2 briggs s = splvm();
974 1.5.4.2 briggs pm->pm_stats.resident_count++;
975 1.5.4.2 briggs
976 1.5.4.2 briggs /* Insert page into page table. */
977 1.5.4.2 briggs pte_enter(pm, va, tte);
978 1.5.4.2 briggs splx(s);
979 1.5.4.2 briggs }
980 1.5.4.2 briggs
981 1.5.4.2 briggs void
982 1.5.4.2 briggs pmap_kremove(vaddr_t va, vsize_t len)
983 1.5.4.2 briggs {
984 1.5.4.2 briggs
985 1.5.4.2 briggs while (len > 0) {
986 1.5.4.2 briggs pte_enter(pmap_kernel(), va, 0);
987 1.5.4.2 briggs va += PAGE_SIZE;
988 1.5.4.2 briggs len -= PAGE_SIZE;
989 1.5.4.2 briggs }
990 1.5.4.2 briggs }
991 1.5.4.2 briggs
992 1.5.4.2 briggs /*
993 1.5.4.2 briggs * Remove the given range of mapping entries.
994 1.5.4.2 briggs */
995 1.5.4.2 briggs void
996 1.5.4.2 briggs pmap_remove(struct pmap *pm, vaddr_t va, vaddr_t endva)
997 1.5.4.2 briggs {
998 1.5.4.2 briggs int s;
999 1.5.4.2 briggs paddr_t pa;
1000 1.5.4.2 briggs volatile u_int *ptp;
1001 1.5.4.2 briggs
1002 1.5.4.2 briggs s = splvm();
1003 1.5.4.2 briggs while (va < endva) {
1004 1.5.4.2 briggs
1005 1.5.4.2 briggs if ((ptp = pte_find(pm, va)) && (pa = *ptp)) {
1006 1.5.4.2 briggs pa = TTE_PA(pa);
1007 1.5.4.2 briggs pmap_remove_pv(pm, va, pa);
1008 1.5.4.2 briggs *ptp = 0;
1009 1.5.4.2 briggs ppc4xx_tlb_flush(va, pm->pm_ctx);
1010 1.5.4.2 briggs pm->pm_stats.resident_count--;
1011 1.5.4.2 briggs }
1012 1.5.4.2 briggs va += NBPG;
1013 1.5.4.2 briggs }
1014 1.5.4.2 briggs
1015 1.5.4.2 briggs splx(s);
1016 1.5.4.2 briggs }
1017 1.5.4.2 briggs
1018 1.5.4.2 briggs /*
1019 1.5.4.2 briggs * Get the physical page address for the given pmap/virtual address.
1020 1.5.4.2 briggs */
1021 1.5.4.2 briggs boolean_t
1022 1.5.4.2 briggs pmap_extract(struct pmap *pm, vaddr_t va, paddr_t *pap)
1023 1.5.4.2 briggs {
1024 1.5.4.2 briggs int seg = STIDX(va);
1025 1.5.4.2 briggs int ptn = PTIDX(va);
1026 1.5.4.2 briggs u_int pa = 0;
1027 1.5.4.2 briggs int s = splvm();
1028 1.5.4.2 briggs
1029 1.5.4.2 briggs if (pm->pm_ptbl[seg] && (pa = pm->pm_ptbl[seg][ptn])) {
1030 1.5.4.2 briggs *pap = TTE_PA(pa) | (va & PGOFSET);
1031 1.5.4.2 briggs }
1032 1.5.4.2 briggs splx(s);
1033 1.5.4.2 briggs return (pa != 0);
1034 1.5.4.2 briggs }
1035 1.5.4.2 briggs
1036 1.5.4.2 briggs /*
1037 1.5.4.2 briggs * Lower the protection on the specified range of this pmap.
1038 1.5.4.2 briggs *
1039 1.5.4.2 briggs * There are only two cases: either the protection is going to 0,
1040 1.5.4.2 briggs * or it is going to read-only.
1041 1.5.4.2 briggs */
1042 1.5.4.2 briggs void
1043 1.5.4.2 briggs pmap_protect(struct pmap *pm, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
1044 1.5.4.2 briggs {
1045 1.5.4.2 briggs volatile u_int *ptp;
1046 1.5.4.2 briggs int s;
1047 1.5.4.2 briggs
1048 1.5.4.2 briggs if (prot & VM_PROT_READ) {
1049 1.5.4.2 briggs s = splvm();
1050 1.5.4.2 briggs while (sva < eva) {
1051 1.5.4.2 briggs if ((ptp = pte_find(pm, sva)) != NULL) {
1052 1.5.4.2 briggs *ptp &= ~TTE_WR;
1053 1.5.4.2 briggs ppc4xx_tlb_flush(sva, pm->pm_ctx);
1054 1.5.4.2 briggs }
1055 1.5.4.2 briggs sva += NBPG;
1056 1.5.4.2 briggs }
1057 1.5.4.2 briggs splx(s);
1058 1.5.4.2 briggs return;
1059 1.5.4.2 briggs }
1060 1.5.4.2 briggs pmap_remove(pm, sva, eva);
1061 1.5.4.2 briggs }
1062 1.5.4.2 briggs
1063 1.5.4.2 briggs boolean_t
1064 1.5.4.2 briggs check_attr(struct vm_page *pg, u_int mask, int clear)
1065 1.5.4.2 briggs {
1066 1.5.4.2 briggs paddr_t pa = VM_PAGE_TO_PHYS(pg);
1067 1.5.4.2 briggs int s;
1068 1.5.4.2 briggs char *attr;
1069 1.5.4.2 briggs int rv;
1070 1.5.4.2 briggs
1071 1.5.4.2 briggs /*
1072 1.5.4.2 briggs * First modify bits in cache.
1073 1.5.4.2 briggs */
1074 1.5.4.2 briggs s = splvm();
1075 1.5.4.2 briggs attr = pa_to_attr(pa);
1076 1.5.4.2 briggs if (attr == NULL)
1077 1.5.4.2 briggs return FALSE;
1078 1.5.4.2 briggs
1079 1.5.4.2 briggs rv = ((*attr & mask) != 0);
1080 1.5.4.4 nathanw if (clear) {
1081 1.5.4.2 briggs *attr &= ~mask;
1082 1.5.4.4 nathanw pmap_page_protect(pg, (mask == PTE_HI_CHG) ? VM_PROT_READ : 0);
1083 1.5.4.4 nathanw }
1084 1.5.4.2 briggs splx(s);
1085 1.5.4.2 briggs return rv;
1086 1.5.4.2 briggs }
1087 1.5.4.2 briggs
1088 1.5.4.2 briggs
1089 1.5.4.2 briggs /*
1090 1.5.4.2 briggs * Lower the protection on the specified physical page.
1091 1.5.4.2 briggs *
1092 1.5.4.2 briggs * There are only two cases: either the protection is going to 0,
1093 1.5.4.2 briggs * or it is going to read-only.
1094 1.5.4.2 briggs */
1095 1.5.4.2 briggs void
1096 1.5.4.2 briggs pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
1097 1.5.4.2 briggs {
1098 1.5.4.2 briggs paddr_t pa = VM_PAGE_TO_PHYS(pg);
1099 1.5.4.2 briggs vaddr_t va;
1100 1.5.4.2 briggs struct pv_entry *pvh, *pv, *npv;
1101 1.5.4.2 briggs struct pmap *pm;
1102 1.5.4.2 briggs
1103 1.5.4.2 briggs pvh = pa_to_pv(pa);
1104 1.5.4.2 briggs if (pvh == NULL)
1105 1.5.4.2 briggs return;
1106 1.5.4.2 briggs
1107 1.5.4.2 briggs /* Handle extra pvs which may be deleted in the operation */
1108 1.5.4.2 briggs for (pv = pvh->pv_next; pv; pv = npv) {
1109 1.5.4.2 briggs npv = pv->pv_next;
1110 1.5.4.2 briggs
1111 1.5.4.2 briggs pm = pv->pv_pm;
1112 1.5.4.2 briggs va = pv->pv_va;
1113 1.5.4.2 briggs pmap_protect(pm, va, va+NBPG, prot);
1114 1.5.4.2 briggs }
1115 1.5.4.2 briggs /* Now check the head pv */
1116 1.5.4.2 briggs if (pvh->pv_pm) {
1117 1.5.4.2 briggs pv = pvh;
1118 1.5.4.2 briggs pm = pv->pv_pm;
1119 1.5.4.2 briggs va = pv->pv_va;
1120 1.5.4.2 briggs pmap_protect(pm, va, va+NBPG, prot);
1121 1.5.4.2 briggs }
1122 1.5.4.2 briggs }
1123 1.5.4.2 briggs
1124 1.5.4.2 briggs /*
1125 1.5.4.2 briggs * Activate the address space for the specified process. If the process
1126 1.5.4.2 briggs * is the current process, load the new MMU context.
1127 1.5.4.2 briggs */
1128 1.5.4.2 briggs void
1129 1.5.4.2 briggs pmap_activate(struct lwp *l)
1130 1.5.4.2 briggs {
1131 1.5.4.2 briggs #if 0
1132 1.5.4.2 briggs struct pcb *pcb = &l->l_proc->p_addr->u_pcb;
1133 1.5.4.2 briggs pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap;
1134 1.5.4.2 briggs
1135 1.5.4.2 briggs /*
1136 1.5.4.2 briggs * XXX Normally performed in cpu_fork().
1137 1.5.4.2 briggs */
1138 1.5.4.2 briggs printf("pmap_activate(%p), pmap=%p\n",l,pmap);
1139 1.5.4.2 briggs if (pcb->pcb_pm != pmap) {
1140 1.5.4.2 briggs pcb->pcb_pm = pmap;
1141 1.5.4.2 briggs (void) pmap_extract(pmap_kernel(), (vaddr_t)pcb->pcb_pm,
1142 1.5.4.2 briggs (paddr_t *)&pcb->pcb_pmreal);
1143 1.5.4.2 briggs }
1144 1.5.4.2 briggs
1145 1.5.4.2 briggs if (l == curproc) {
1146 1.5.4.2 briggs /* Store pointer to new current pmap. */
1147 1.5.4.2 briggs curpm = pcb->pcb_pmreal;
1148 1.5.4.2 briggs }
1149 1.5.4.2 briggs #endif
1150 1.5.4.2 briggs }
1151 1.5.4.2 briggs
1152 1.5.4.2 briggs /*
1153 1.5.4.2 briggs * Deactivate the specified process's address space.
1154 1.5.4.2 briggs */
1155 1.5.4.2 briggs void
1156 1.5.4.2 briggs pmap_deactivate(struct lwp *l)
1157 1.5.4.2 briggs {
1158 1.5.4.2 briggs }
1159 1.5.4.2 briggs
1160 1.5.4.2 briggs /*
1161 1.5.4.2 briggs * Synchronize caches corresponding to [addr, addr+len) in p.
1162 1.5.4.2 briggs */
1163 1.5.4.2 briggs void
1164 1.5.4.2 briggs pmap_procwr(struct proc *p, vaddr_t va, size_t len)
1165 1.5.4.2 briggs {
1166 1.5.4.2 briggs struct pmap *pm = p->p_vmspace->vm_map.pmap;
1167 1.5.4.2 briggs int msr, ctx, opid;
1168 1.5.4.2 briggs
1169 1.5.4.2 briggs
1170 1.5.4.2 briggs /*
1171 1.5.4.2 briggs * Need to turn off IMMU and switch to user context.
1172 1.5.4.2 briggs * (icbi uses DMMU).
1173 1.5.4.2 briggs */
1174 1.5.4.2 briggs if (!(ctx = pm->pm_ctx)) {
1175 1.5.4.2 briggs /* No context -- assign it one */
1176 1.5.4.2 briggs ctx_alloc(pm);
1177 1.5.4.2 briggs ctx = pm->pm_ctx;
1178 1.5.4.2 briggs }
1179 1.5.4.2 briggs __asm __volatile("mfmsr %0;"
1180 1.5.4.2 briggs "li %1, 0x20;"
1181 1.5.4.2 briggs "andc %1,%0,%1;"
1182 1.5.4.2 briggs "mtmsr %1;"
1183 1.5.4.2 briggs "sync;isync;"
1184 1.5.4.2 briggs "mfpid %1;"
1185 1.5.4.2 briggs "mtpid %2;"
1186 1.5.4.2 briggs "sync; isync;"
1187 1.5.4.2 briggs "1:"
1188 1.5.4.2 briggs "dcbf 0,%3;"
1189 1.5.4.2 briggs "icbi 0,%3;"
1190 1.5.4.2 briggs "addi %3,%3,32;"
1191 1.5.4.2 briggs "addic. %4,%4,-32;"
1192 1.5.4.2 briggs "bge 1b;"
1193 1.5.4.2 briggs "mtpid %1;"
1194 1.5.4.2 briggs "mtmsr %0;"
1195 1.5.4.2 briggs "sync; isync"
1196 1.5.4.2 briggs : "=&r" (msr), "=&r" (opid)
1197 1.5.4.2 briggs : "r" (ctx), "r" (va), "r" (len));
1198 1.5.4.2 briggs }
1199 1.5.4.2 briggs
1200 1.5.4.2 briggs
1201 1.5.4.2 briggs /* This has to be done in real mode !!! */
1202 1.5.4.2 briggs void
1203 1.5.4.2 briggs ppc4xx_tlb_flush(vaddr_t va, int pid)
1204 1.5.4.2 briggs {
1205 1.5.4.2 briggs u_long i, found;
1206 1.5.4.2 briggs u_long msr;
1207 1.5.4.2 briggs
1208 1.5.4.2 briggs /* If there's no context then it can't be mapped. */
1209 1.5.4.2 briggs if (!pid) return;
1210 1.5.4.2 briggs
1211 1.5.4.2 briggs asm("mfpid %1;" /* Save PID */
1212 1.5.4.2 briggs "mfmsr %2;" /* Save MSR */
1213 1.5.4.2 briggs "li %0,0;" /* Now clear MSR */
1214 1.5.4.2 briggs "mtmsr %0;"
1215 1.5.4.2 briggs "mtpid %4;" /* Set PID */
1216 1.5.4.2 briggs "sync;"
1217 1.5.4.2 briggs "tlbsx. %0,0,%3;" /* Search TLB */
1218 1.5.4.2 briggs "sync;"
1219 1.5.4.2 briggs "mtpid %1;" /* Restore PID */
1220 1.5.4.2 briggs "mtmsr %2;" /* Restore MSR */
1221 1.5.4.2 briggs "sync;isync;"
1222 1.5.4.2 briggs "li %1,1;"
1223 1.5.4.2 briggs "beq 1f;"
1224 1.5.4.2 briggs "li %1,0;"
1225 1.5.4.2 briggs "1:"
1226 1.5.4.2 briggs : "=&r" (i), "=&r" (found), "=&r" (msr)
1227 1.5.4.2 briggs : "r" (va), "r" (pid));
1228 1.5.4.2 briggs if (found && !TLB_LOCKED(i)) {
1229 1.5.4.2 briggs
1230 1.5.4.2 briggs /* Now flush translation */
1231 1.5.4.2 briggs asm volatile(
1232 1.5.4.2 briggs "tlbwe %0,%1,0;"
1233 1.5.4.2 briggs "sync;isync;"
1234 1.5.4.2 briggs : : "r" (0), "r" (i));
1235 1.5.4.2 briggs
1236 1.5.4.2 briggs tlb_info[i].ti_ctx = 0;
1237 1.5.4.2 briggs tlb_info[i].ti_flags = 0;
1238 1.5.4.2 briggs tlbnext = i;
1239 1.5.4.2 briggs /* Successful flushes */
1240 1.5.4.2 briggs tlbflush_ev.ev_count++;
1241 1.5.4.2 briggs }
1242 1.5.4.2 briggs }
1243 1.5.4.2 briggs
1244 1.5.4.2 briggs void
1245 1.5.4.2 briggs ppc4xx_tlb_flush_all(void)
1246 1.5.4.2 briggs {
1247 1.5.4.2 briggs u_long i;
1248 1.5.4.2 briggs
1249 1.5.4.2 briggs for (i = 0; i < NTLB; i++)
1250 1.5.4.2 briggs if (!TLB_LOCKED(i)) {
1251 1.5.4.2 briggs asm volatile(
1252 1.5.4.2 briggs "tlbwe %0,%1,0;"
1253 1.5.4.2 briggs "sync;isync;"
1254 1.5.4.2 briggs : : "r" (0), "r" (i));
1255 1.5.4.2 briggs tlb_info[i].ti_ctx = 0;
1256 1.5.4.2 briggs tlb_info[i].ti_flags = 0;
1257 1.5.4.2 briggs }
1258 1.5.4.2 briggs
1259 1.5.4.2 briggs asm volatile("sync;isync");
1260 1.5.4.2 briggs }
1261 1.5.4.2 briggs
1262 1.5.4.2 briggs /* Find a TLB entry to evict. */
1263 1.5.4.2 briggs static int
1264 1.5.4.2 briggs ppc4xx_tlb_find_victim(void)
1265 1.5.4.2 briggs {
1266 1.5.4.2 briggs int flags;
1267 1.5.4.2 briggs
1268 1.5.4.2 briggs for (;;) {
1269 1.5.4.2 briggs if (++tlbnext >= NTLB)
1270 1.5.4.2 briggs tlbnext = TLB_NRESERVED;
1271 1.5.4.2 briggs flags = tlb_info[tlbnext].ti_flags;
1272 1.5.4.2 briggs if (!(flags & TLBF_USED) ||
1273 1.5.4.2 briggs (flags & (TLBF_LOCKED | TLBF_REF)) == 0) {
1274 1.5.4.2 briggs u_long va, stack = (u_long)&va;
1275 1.5.4.2 briggs
1276 1.5.4.2 briggs if (!((tlb_info[tlbnext].ti_va ^ stack) & (~PGOFSET)) &&
1277 1.5.4.2 briggs (tlb_info[tlbnext].ti_ctx == KERNEL_PID) &&
1278 1.5.4.2 briggs (flags & TLBF_USED)) {
1279 1.5.4.2 briggs /* Kernel stack page */
1280 1.5.4.2 briggs flags |= TLBF_USED;
1281 1.5.4.2 briggs tlb_info[tlbnext].ti_flags = flags;
1282 1.5.4.2 briggs } else {
1283 1.5.4.2 briggs /* Found it! */
1284 1.5.4.2 briggs return (tlbnext);
1285 1.5.4.2 briggs }
1286 1.5.4.2 briggs } else {
1287 1.5.4.2 briggs tlb_info[tlbnext].ti_flags = (flags & ~TLBF_REF);
1288 1.5.4.2 briggs }
1289 1.5.4.2 briggs }
1290 1.5.4.2 briggs }
1291 1.5.4.2 briggs
1292 1.5.4.2 briggs void
1293 1.5.4.2 briggs ppc4xx_tlb_enter(int ctx, vaddr_t va, u_int pte)
1294 1.5.4.2 briggs {
1295 1.5.4.2 briggs u_long th, tl, idx;
1296 1.5.4.2 briggs tlbpid_t pid;
1297 1.5.4.2 briggs u_short msr;
1298 1.5.4.4 nathanw paddr_t pa;
1299 1.5.4.4 nathanw int s, sz;
1300 1.5.4.4 nathanw
1301 1.5.4.2 briggs
1302 1.5.4.2 briggs tlbenter_ev.ev_count++;
1303 1.5.4.2 briggs
1304 1.5.4.4 nathanw sz = (pte & TTE_SZ_MASK) >> TTE_SZ_SHIFT;
1305 1.5.4.4 nathanw pa = (pte & TTE_RPN_MASK(sz));
1306 1.5.4.4 nathanw th = (va & TLB_EPN_MASK) | (sz << TLB_SIZE_SHFT) | TLB_VALID;
1307 1.5.4.4 nathanw tl = (pte & ~TLB_RPN_MASK) | pa;
1308 1.5.4.4 nathanw tl |= ppc4xx_tlbflags(va, pa);
1309 1.5.4.2 briggs
1310 1.5.4.2 briggs s = splhigh();
1311 1.5.4.2 briggs idx = ppc4xx_tlb_find_victim();
1312 1.5.4.2 briggs
1313 1.5.4.2 briggs #ifdef DIAGNOSTIC
1314 1.5.4.2 briggs if ((idx < TLB_NRESERVED) || (idx >= NTLB)) {
1315 1.5.4.2 briggs panic("ppc4xx_tlb_enter: repacing entry %ld\n", idx);
1316 1.5.4.2 briggs }
1317 1.5.4.2 briggs #endif
1318 1.5.4.2 briggs
1319 1.5.4.2 briggs tlb_info[idx].ti_va = (va & TLB_EPN_MASK);
1320 1.5.4.2 briggs tlb_info[idx].ti_ctx = ctx;
1321 1.5.4.2 briggs tlb_info[idx].ti_flags = TLBF_USED | TLBF_REF;
1322 1.5.4.2 briggs
1323 1.5.4.2 briggs asm volatile(
1324 1.5.4.2 briggs "mfmsr %0;" /* Save MSR */
1325 1.5.4.2 briggs "li %1,0;"
1326 1.5.4.2 briggs "tlbwe %1,%3,0;" /* Invalidate old entry. */
1327 1.5.4.2 briggs "mtmsr %1;" /* Clear MSR */
1328 1.5.4.2 briggs "mfpid %1;" /* Save old PID */
1329 1.5.4.2 briggs "mtpid %2;" /* Load translation ctx */
1330 1.5.4.2 briggs "sync; isync;"
1331 1.5.4.2 briggs #ifdef DEBUG
1332 1.5.4.2 briggs "andi. %3,%3,63;"
1333 1.5.4.2 briggs "tweqi %3,0;" /* XXXXX DEBUG trap on index 0 */
1334 1.5.4.2 briggs #endif
1335 1.5.4.2 briggs "tlbwe %4,%3,1; tlbwe %5,%3,0;" /* Set TLB */
1336 1.5.4.2 briggs "sync; isync;"
1337 1.5.4.2 briggs "mtpid %1; mtmsr %0;" /* Restore PID and MSR */
1338 1.5.4.2 briggs "sync; isync;"
1339 1.5.4.2 briggs : "=&r" (msr), "=&r" (pid)
1340 1.5.4.2 briggs : "r" (ctx), "r" (idx), "r" (tl), "r" (th));
1341 1.5.4.2 briggs splx(s);
1342 1.5.4.2 briggs }
1343 1.5.4.2 briggs
1344 1.5.4.2 briggs void
1345 1.5.4.2 briggs ppc4xx_tlb_unpin(int i)
1346 1.5.4.2 briggs {
1347 1.5.4.2 briggs
1348 1.5.4.2 briggs if (i == -1)
1349 1.5.4.2 briggs for (i = 0; i < TLB_NRESERVED; i++)
1350 1.5.4.2 briggs tlb_info[i].ti_flags &= ~TLBF_LOCKED;
1351 1.5.4.2 briggs else
1352 1.5.4.2 briggs tlb_info[i].ti_flags &= ~TLBF_LOCKED;
1353 1.5.4.2 briggs }
1354 1.5.4.2 briggs
1355 1.5.4.2 briggs void
1356 1.5.4.2 briggs ppc4xx_tlb_init(void)
1357 1.5.4.2 briggs {
1358 1.5.4.2 briggs int i;
1359 1.5.4.2 briggs
1360 1.5.4.2 briggs /* Mark reserved TLB entries */
1361 1.5.4.2 briggs for (i = 0; i < TLB_NRESERVED; i++) {
1362 1.5.4.2 briggs tlb_info[i].ti_flags = TLBF_LOCKED | TLBF_USED;
1363 1.5.4.2 briggs tlb_info[i].ti_ctx = KERNEL_PID;
1364 1.5.4.2 briggs }
1365 1.5.4.2 briggs
1366 1.5.4.2 briggs /* Setup security zones */
1367 1.5.4.2 briggs /* Z0 - accessible by kernel only if TLB entry permissions allow
1368 1.5.4.2 briggs * Z1,Z2 - access is controlled by TLB entry permissions
1369 1.5.4.2 briggs * Z3 - full access regardless of TLB entry permissions
1370 1.5.4.2 briggs */
1371 1.5.4.2 briggs
1372 1.5.4.2 briggs asm volatile(
1373 1.5.4.2 briggs "mtspr %0,%1;"
1374 1.5.4.2 briggs "sync;"
1375 1.5.4.2 briggs :: "K"(SPR_ZPR), "r" (0x1b000000));
1376 1.5.4.2 briggs }
1377 1.5.4.2 briggs
1378 1.5.4.2 briggs
1379 1.5.4.2 briggs /*
1380 1.5.4.2 briggs * We should pass the ctx in from trap code.
1381 1.5.4.2 briggs */
1382 1.5.4.2 briggs int
1383 1.5.4.2 briggs pmap_tlbmiss(vaddr_t va, int ctx)
1384 1.5.4.2 briggs {
1385 1.5.4.2 briggs volatile u_int *pte;
1386 1.5.4.2 briggs u_long tte;
1387 1.5.4.2 briggs
1388 1.5.4.2 briggs tlbmiss_ev.ev_count++;
1389 1.5.4.2 briggs
1390 1.5.4.2 briggs /*
1391 1.5.4.2 briggs * XXXX We will reserve 0-0x80000000 for va==pa mappings.
1392 1.5.4.2 briggs */
1393 1.5.4.2 briggs if (ctx != KERNEL_PID || (va & 0x80000000)) {
1394 1.5.4.2 briggs pte = pte_find((struct pmap *)ctxbusy[ctx], va);
1395 1.5.4.2 briggs if (pte == NULL) {
1396 1.5.4.2 briggs /* Map unmanaged addresses directly for kernel access */
1397 1.5.4.2 briggs return 1;
1398 1.5.4.2 briggs }
1399 1.5.4.2 briggs tte = *pte;
1400 1.5.4.2 briggs if (tte == 0) {
1401 1.5.4.2 briggs return 1;
1402 1.5.4.2 briggs }
1403 1.5.4.2 briggs } else {
1404 1.5.4.2 briggs /* Create a 16MB writeable mapping. */
1405 1.5.4.3 nathanw #ifdef PPC_4XX_NOCACHE
1406 1.5.4.2 briggs tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_I | TTE_WR;
1407 1.5.4.2 briggs #else
1408 1.5.4.2 briggs tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_WR;
1409 1.5.4.2 briggs #endif
1410 1.5.4.2 briggs }
1411 1.5.4.2 briggs tlbhit_ev.ev_count++;
1412 1.5.4.2 briggs ppc4xx_tlb_enter(ctx, va, tte);
1413 1.5.4.2 briggs
1414 1.5.4.2 briggs return 0;
1415 1.5.4.2 briggs }
1416 1.5.4.2 briggs
1417 1.5.4.2 briggs /*
1418 1.5.4.2 briggs * Flush all the entries matching a context from the TLB.
1419 1.5.4.2 briggs */
1420 1.5.4.2 briggs static int
1421 1.5.4.2 briggs ctx_flush(int cnum)
1422 1.5.4.2 briggs {
1423 1.5.4.2 briggs int i;
1424 1.5.4.2 briggs
1425 1.5.4.2 briggs /* We gotta steal this context */
1426 1.5.4.2 briggs for (i = TLB_NRESERVED; i < NTLB; i++) {
1427 1.5.4.2 briggs if (tlb_info[i].ti_ctx == cnum) {
1428 1.5.4.2 briggs /* Can't steal ctx if it has a locked entry. */
1429 1.5.4.2 briggs if (TLB_LOCKED(i)) {
1430 1.5.4.2 briggs #ifdef DIAGNOSTIC
1431 1.5.4.2 briggs printf("ctx_flush: can't invalidate "
1432 1.5.4.2 briggs "locked mapping %d "
1433 1.5.4.2 briggs "for context %d\n", i, cnum);
1434 1.5.4.4 nathanw #ifdef DDB
1435 1.5.4.2 briggs Debugger();
1436 1.5.4.2 briggs #endif
1437 1.5.4.4 nathanw #endif
1438 1.5.4.2 briggs return (1);
1439 1.5.4.2 briggs }
1440 1.5.4.2 briggs #ifdef DIAGNOSTIC
1441 1.5.4.2 briggs if (i < TLB_NRESERVED)
1442 1.5.4.2 briggs panic("TLB entry %d not locked\n", i);
1443 1.5.4.2 briggs #endif
1444 1.5.4.2 briggs /* Invalidate particular TLB entry regardless of locked status */
1445 1.5.4.2 briggs asm volatile("tlbwe %0,%1,0" : :"r"(0),"r"(i));
1446 1.5.4.2 briggs tlb_info[i].ti_flags = 0;
1447 1.5.4.2 briggs }
1448 1.5.4.2 briggs }
1449 1.5.4.2 briggs return (0);
1450 1.5.4.2 briggs }
1451 1.5.4.2 briggs
1452 1.5.4.2 briggs /*
1453 1.5.4.2 briggs * Allocate a context. If necessary, steal one from someone else.
1454 1.5.4.2 briggs *
1455 1.5.4.2 briggs * The new context is flushed from the TLB before returning.
1456 1.5.4.2 briggs */
1457 1.5.4.2 briggs int
1458 1.5.4.2 briggs ctx_alloc(struct pmap *pm)
1459 1.5.4.2 briggs {
1460 1.5.4.2 briggs int s, cnum;
1461 1.5.4.2 briggs static int next = MINCTX;
1462 1.5.4.2 briggs
1463 1.5.4.2 briggs if (pm == pmap_kernel()) {
1464 1.5.4.2 briggs #ifdef DIAGNOSTIC
1465 1.5.4.2 briggs printf("ctx_alloc: kernel pmap!\n");
1466 1.5.4.2 briggs #endif
1467 1.5.4.2 briggs return (0);
1468 1.5.4.2 briggs }
1469 1.5.4.2 briggs s = splvm();
1470 1.5.4.2 briggs
1471 1.5.4.2 briggs /* Find a likely context. */
1472 1.5.4.2 briggs cnum = next;
1473 1.5.4.2 briggs do {
1474 1.5.4.2 briggs if ((++cnum) > NUMCTX)
1475 1.5.4.2 briggs cnum = MINCTX;
1476 1.5.4.2 briggs } while (ctxbusy[cnum] != NULL && cnum != next);
1477 1.5.4.2 briggs
1478 1.5.4.2 briggs /* Now clean it out */
1479 1.5.4.2 briggs oops:
1480 1.5.4.2 briggs if (cnum < MINCTX)
1481 1.5.4.2 briggs cnum = MINCTX; /* Never steal ctx 0 or 1 */
1482 1.5.4.2 briggs if (ctx_flush(cnum)) {
1483 1.5.4.2 briggs /* oops -- something's wired. */
1484 1.5.4.2 briggs if ((++cnum) > NUMCTX)
1485 1.5.4.2 briggs cnum = MINCTX;
1486 1.5.4.2 briggs goto oops;
1487 1.5.4.2 briggs }
1488 1.5.4.2 briggs
1489 1.5.4.2 briggs if (ctxbusy[cnum]) {
1490 1.5.4.2 briggs #ifdef DEBUG
1491 1.5.4.2 briggs /* We should identify this pmap and clear it */
1492 1.5.4.2 briggs printf("Warning: stealing context %d\n", cnum);
1493 1.5.4.2 briggs #endif
1494 1.5.4.2 briggs ctxbusy[cnum]->pm_ctx = 0;
1495 1.5.4.2 briggs }
1496 1.5.4.2 briggs ctxbusy[cnum] = pm;
1497 1.5.4.2 briggs next = cnum;
1498 1.5.4.2 briggs splx(s);
1499 1.5.4.2 briggs pm->pm_ctx = cnum;
1500 1.5.4.2 briggs
1501 1.5.4.2 briggs return cnum;
1502 1.5.4.2 briggs }
1503 1.5.4.2 briggs
1504 1.5.4.2 briggs /*
1505 1.5.4.2 briggs * Give away a context.
1506 1.5.4.2 briggs */
1507 1.5.4.2 briggs void
1508 1.5.4.2 briggs ctx_free(struct pmap *pm)
1509 1.5.4.2 briggs {
1510 1.5.4.2 briggs int oldctx;
1511 1.5.4.2 briggs
1512 1.5.4.2 briggs oldctx = pm->pm_ctx;
1513 1.5.4.2 briggs
1514 1.5.4.2 briggs if (oldctx == 0)
1515 1.5.4.2 briggs panic("ctx_free: freeing kernel context");
1516 1.5.4.2 briggs #ifdef DIAGNOSTIC
1517 1.5.4.2 briggs if (ctxbusy[oldctx] == 0)
1518 1.5.4.2 briggs printf("ctx_free: freeing free context %d\n", oldctx);
1519 1.5.4.2 briggs if (ctxbusy[oldctx] != pm) {
1520 1.5.4.2 briggs printf("ctx_free: freeing someone esle's context\n "
1521 1.5.4.2 briggs "ctxbusy[%d] = %p, pm->pm_ctx = %p\n",
1522 1.5.4.2 briggs oldctx, (void *)(u_long)ctxbusy[oldctx], pm);
1523 1.5.4.4 nathanw #ifdef DDB
1524 1.5.4.2 briggs Debugger();
1525 1.5.4.4 nathanw #endif
1526 1.5.4.2 briggs }
1527 1.5.4.2 briggs #endif
1528 1.5.4.2 briggs /* We should verify it has not been stolen and reallocated... */
1529 1.5.4.2 briggs ctxbusy[oldctx] = NULL;
1530 1.5.4.2 briggs ctx_flush(oldctx);
1531 1.5.4.2 briggs }
1532 1.5.4.2 briggs
1533 1.5.4.2 briggs
1534 1.5.4.2 briggs #ifdef DEBUG
1535 1.5.4.2 briggs /*
1536 1.5.4.2 briggs * Test ref/modify handling.
1537 1.5.4.2 briggs */
1538 1.5.4.2 briggs void pmap_testout __P((void));
1539 1.5.4.2 briggs void
1540 1.5.4.2 briggs pmap_testout()
1541 1.5.4.2 briggs {
1542 1.5.4.2 briggs vaddr_t va;
1543 1.5.4.2 briggs volatile int *loc;
1544 1.5.4.2 briggs int val = 0;
1545 1.5.4.2 briggs paddr_t pa;
1546 1.5.4.2 briggs struct vm_page *pg;
1547 1.5.4.2 briggs int ref, mod;
1548 1.5.4.2 briggs
1549 1.5.4.2 briggs /* Allocate a page */
1550 1.5.4.2 briggs va = (vaddr_t)uvm_km_alloc1(kernel_map, NBPG, 1);
1551 1.5.4.2 briggs loc = (int*)va;
1552 1.5.4.2 briggs
1553 1.5.4.2 briggs pmap_extract(pmap_kernel(), va, &pa);
1554 1.5.4.2 briggs pg = PHYS_TO_VM_PAGE(pa);
1555 1.5.4.2 briggs pmap_unwire(pmap_kernel(), va);
1556 1.5.4.2 briggs
1557 1.5.4.2 briggs pmap_remove(pmap_kernel(), va, va+1);
1558 1.5.4.2 briggs pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1559 1.5.4.2 briggs pmap_update(pmap_kernel());
1560 1.5.4.2 briggs
1561 1.5.4.2 briggs /* Now clear reference and modify */
1562 1.5.4.2 briggs ref = pmap_clear_reference(pg);
1563 1.5.4.2 briggs mod = pmap_clear_modify(pg);
1564 1.5.4.2 briggs printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1565 1.5.4.2 briggs (void *)(u_long)va, (long)pa,
1566 1.5.4.2 briggs ref, mod);
1567 1.5.4.2 briggs
1568 1.5.4.2 briggs /* Check it's properly cleared */
1569 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1570 1.5.4.2 briggs mod = pmap_is_modified(pg);
1571 1.5.4.2 briggs printf("Checking cleared page: ref %d, mod %d\n",
1572 1.5.4.2 briggs ref, mod);
1573 1.5.4.2 briggs
1574 1.5.4.2 briggs /* Reference page */
1575 1.5.4.2 briggs val = *loc;
1576 1.5.4.2 briggs
1577 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1578 1.5.4.2 briggs mod = pmap_is_modified(pg);
1579 1.5.4.2 briggs printf("Referenced page: ref %d, mod %d val %x\n",
1580 1.5.4.2 briggs ref, mod, val);
1581 1.5.4.2 briggs
1582 1.5.4.2 briggs /* Now clear reference and modify */
1583 1.5.4.2 briggs ref = pmap_clear_reference(pg);
1584 1.5.4.2 briggs mod = pmap_clear_modify(pg);
1585 1.5.4.2 briggs printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1586 1.5.4.2 briggs (void *)(u_long)va, (long)pa,
1587 1.5.4.2 briggs ref, mod);
1588 1.5.4.2 briggs
1589 1.5.4.2 briggs /* Modify page */
1590 1.5.4.2 briggs *loc = 1;
1591 1.5.4.2 briggs
1592 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1593 1.5.4.2 briggs mod = pmap_is_modified(pg);
1594 1.5.4.2 briggs printf("Modified page: ref %d, mod %d\n",
1595 1.5.4.2 briggs ref, mod);
1596 1.5.4.2 briggs
1597 1.5.4.2 briggs /* Now clear reference and modify */
1598 1.5.4.2 briggs ref = pmap_clear_reference(pg);
1599 1.5.4.2 briggs mod = pmap_clear_modify(pg);
1600 1.5.4.2 briggs printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1601 1.5.4.2 briggs (void *)(u_long)va, (long)pa,
1602 1.5.4.2 briggs ref, mod);
1603 1.5.4.2 briggs
1604 1.5.4.2 briggs /* Check it's properly cleared */
1605 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1606 1.5.4.2 briggs mod = pmap_is_modified(pg);
1607 1.5.4.2 briggs printf("Checking cleared page: ref %d, mod %d\n",
1608 1.5.4.2 briggs ref, mod);
1609 1.5.4.2 briggs
1610 1.5.4.2 briggs /* Modify page */
1611 1.5.4.2 briggs *loc = 1;
1612 1.5.4.2 briggs
1613 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1614 1.5.4.2 briggs mod = pmap_is_modified(pg);
1615 1.5.4.2 briggs printf("Modified page: ref %d, mod %d\n",
1616 1.5.4.2 briggs ref, mod);
1617 1.5.4.2 briggs
1618 1.5.4.2 briggs /* Check pmap_protect() */
1619 1.5.4.2 briggs pmap_protect(pmap_kernel(), va, va+1, VM_PROT_READ);
1620 1.5.4.2 briggs pmap_update(pmap_kernel());
1621 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1622 1.5.4.2 briggs mod = pmap_is_modified(pg);
1623 1.5.4.2 briggs printf("pmap_protect(VM_PROT_READ): ref %d, mod %d\n",
1624 1.5.4.2 briggs ref, mod);
1625 1.5.4.2 briggs
1626 1.5.4.2 briggs /* Now clear reference and modify */
1627 1.5.4.2 briggs ref = pmap_clear_reference(pg);
1628 1.5.4.2 briggs mod = pmap_clear_modify(pg);
1629 1.5.4.2 briggs printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1630 1.5.4.2 briggs (void *)(u_long)va, (long)pa,
1631 1.5.4.2 briggs ref, mod);
1632 1.5.4.2 briggs
1633 1.5.4.2 briggs /* Reference page */
1634 1.5.4.2 briggs val = *loc;
1635 1.5.4.2 briggs
1636 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1637 1.5.4.2 briggs mod = pmap_is_modified(pg);
1638 1.5.4.2 briggs printf("Referenced page: ref %d, mod %d val %x\n",
1639 1.5.4.2 briggs ref, mod, val);
1640 1.5.4.2 briggs
1641 1.5.4.2 briggs /* Now clear reference and modify */
1642 1.5.4.2 briggs ref = pmap_clear_reference(pg);
1643 1.5.4.2 briggs mod = pmap_clear_modify(pg);
1644 1.5.4.2 briggs printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1645 1.5.4.2 briggs (void *)(u_long)va, (long)pa,
1646 1.5.4.2 briggs ref, mod);
1647 1.5.4.2 briggs
1648 1.5.4.2 briggs /* Modify page */
1649 1.5.4.2 briggs #if 0
1650 1.5.4.2 briggs pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1651 1.5.4.2 briggs pmap_update(pmap_kernel());
1652 1.5.4.2 briggs #endif
1653 1.5.4.2 briggs *loc = 1;
1654 1.5.4.2 briggs
1655 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1656 1.5.4.2 briggs mod = pmap_is_modified(pg);
1657 1.5.4.2 briggs printf("Modified page: ref %d, mod %d\n",
1658 1.5.4.2 briggs ref, mod);
1659 1.5.4.2 briggs
1660 1.5.4.2 briggs /* Check pmap_protect() */
1661 1.5.4.2 briggs pmap_protect(pmap_kernel(), va, va+1, VM_PROT_NONE);
1662 1.5.4.2 briggs pmap_update(pmap_kernel());
1663 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1664 1.5.4.2 briggs mod = pmap_is_modified(pg);
1665 1.5.4.2 briggs printf("pmap_protect(): ref %d, mod %d\n",
1666 1.5.4.2 briggs ref, mod);
1667 1.5.4.2 briggs
1668 1.5.4.2 briggs /* Now clear reference and modify */
1669 1.5.4.2 briggs ref = pmap_clear_reference(pg);
1670 1.5.4.2 briggs mod = pmap_clear_modify(pg);
1671 1.5.4.2 briggs printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1672 1.5.4.2 briggs (void *)(u_long)va, (long)pa,
1673 1.5.4.2 briggs ref, mod);
1674 1.5.4.2 briggs
1675 1.5.4.2 briggs /* Reference page */
1676 1.5.4.2 briggs val = *loc;
1677 1.5.4.2 briggs
1678 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1679 1.5.4.2 briggs mod = pmap_is_modified(pg);
1680 1.5.4.2 briggs printf("Referenced page: ref %d, mod %d val %x\n",
1681 1.5.4.2 briggs ref, mod, val);
1682 1.5.4.2 briggs
1683 1.5.4.2 briggs /* Now clear reference and modify */
1684 1.5.4.2 briggs ref = pmap_clear_reference(pg);
1685 1.5.4.2 briggs mod = pmap_clear_modify(pg);
1686 1.5.4.2 briggs printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1687 1.5.4.2 briggs (void *)(u_long)va, (long)pa,
1688 1.5.4.2 briggs ref, mod);
1689 1.5.4.2 briggs
1690 1.5.4.2 briggs /* Modify page */
1691 1.5.4.2 briggs #if 0
1692 1.5.4.2 briggs pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1693 1.5.4.2 briggs pmap_update(pmap_kernel());
1694 1.5.4.2 briggs #endif
1695 1.5.4.2 briggs *loc = 1;
1696 1.5.4.2 briggs
1697 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1698 1.5.4.2 briggs mod = pmap_is_modified(pg);
1699 1.5.4.2 briggs printf("Modified page: ref %d, mod %d\n",
1700 1.5.4.2 briggs ref, mod);
1701 1.5.4.2 briggs
1702 1.5.4.2 briggs /* Check pmap_pag_protect() */
1703 1.5.4.2 briggs pmap_page_protect(pg, VM_PROT_READ);
1704 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1705 1.5.4.2 briggs mod = pmap_is_modified(pg);
1706 1.5.4.2 briggs printf("pmap_page_protect(VM_PROT_READ): ref %d, mod %d\n",
1707 1.5.4.2 briggs ref, mod);
1708 1.5.4.2 briggs
1709 1.5.4.2 briggs /* Now clear reference and modify */
1710 1.5.4.2 briggs ref = pmap_clear_reference(pg);
1711 1.5.4.2 briggs mod = pmap_clear_modify(pg);
1712 1.5.4.2 briggs printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1713 1.5.4.2 briggs (void *)(u_long)va, (long)pa,
1714 1.5.4.2 briggs ref, mod);
1715 1.5.4.2 briggs
1716 1.5.4.2 briggs /* Reference page */
1717 1.5.4.2 briggs val = *loc;
1718 1.5.4.2 briggs
1719 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1720 1.5.4.2 briggs mod = pmap_is_modified(pg);
1721 1.5.4.2 briggs printf("Referenced page: ref %d, mod %d val %x\n",
1722 1.5.4.2 briggs ref, mod, val);
1723 1.5.4.2 briggs
1724 1.5.4.2 briggs /* Now clear reference and modify */
1725 1.5.4.2 briggs ref = pmap_clear_reference(pg);
1726 1.5.4.2 briggs mod = pmap_clear_modify(pg);
1727 1.5.4.2 briggs printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1728 1.5.4.2 briggs (void *)(u_long)va, (long)pa,
1729 1.5.4.2 briggs ref, mod);
1730 1.5.4.2 briggs
1731 1.5.4.2 briggs /* Modify page */
1732 1.5.4.2 briggs #if 0
1733 1.5.4.2 briggs pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1734 1.5.4.2 briggs pmap_update(pmap_kernel());
1735 1.5.4.2 briggs #endif
1736 1.5.4.2 briggs *loc = 1;
1737 1.5.4.2 briggs
1738 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1739 1.5.4.2 briggs mod = pmap_is_modified(pg);
1740 1.5.4.2 briggs printf("Modified page: ref %d, mod %d\n",
1741 1.5.4.2 briggs ref, mod);
1742 1.5.4.2 briggs
1743 1.5.4.2 briggs /* Check pmap_pag_protect() */
1744 1.5.4.2 briggs pmap_page_protect(pg, VM_PROT_NONE);
1745 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1746 1.5.4.2 briggs mod = pmap_is_modified(pg);
1747 1.5.4.2 briggs printf("pmap_page_protect(): ref %d, mod %d\n",
1748 1.5.4.2 briggs ref, mod);
1749 1.5.4.2 briggs
1750 1.5.4.2 briggs /* Now clear reference and modify */
1751 1.5.4.2 briggs ref = pmap_clear_reference(pg);
1752 1.5.4.2 briggs mod = pmap_clear_modify(pg);
1753 1.5.4.2 briggs printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1754 1.5.4.2 briggs (void *)(u_long)va, (long)pa,
1755 1.5.4.2 briggs ref, mod);
1756 1.5.4.2 briggs
1757 1.5.4.2 briggs
1758 1.5.4.2 briggs /* Reference page */
1759 1.5.4.2 briggs val = *loc;
1760 1.5.4.2 briggs
1761 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1762 1.5.4.2 briggs mod = pmap_is_modified(pg);
1763 1.5.4.2 briggs printf("Referenced page: ref %d, mod %d val %x\n",
1764 1.5.4.2 briggs ref, mod, val);
1765 1.5.4.2 briggs
1766 1.5.4.2 briggs /* Now clear reference and modify */
1767 1.5.4.2 briggs ref = pmap_clear_reference(pg);
1768 1.5.4.2 briggs mod = pmap_clear_modify(pg);
1769 1.5.4.2 briggs printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1770 1.5.4.2 briggs (void *)(u_long)va, (long)pa,
1771 1.5.4.2 briggs ref, mod);
1772 1.5.4.2 briggs
1773 1.5.4.2 briggs /* Modify page */
1774 1.5.4.2 briggs #if 0
1775 1.5.4.2 briggs pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1776 1.5.4.2 briggs pmap_update(pmap_kernel());
1777 1.5.4.2 briggs #endif
1778 1.5.4.2 briggs *loc = 1;
1779 1.5.4.2 briggs
1780 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1781 1.5.4.2 briggs mod = pmap_is_modified(pg);
1782 1.5.4.2 briggs printf("Modified page: ref %d, mod %d\n",
1783 1.5.4.2 briggs ref, mod);
1784 1.5.4.2 briggs
1785 1.5.4.2 briggs /* Unmap page */
1786 1.5.4.2 briggs pmap_remove(pmap_kernel(), va, va+1);
1787 1.5.4.2 briggs pmap_update(pmap_kernel());
1788 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1789 1.5.4.2 briggs mod = pmap_is_modified(pg);
1790 1.5.4.2 briggs printf("Unmapped page: ref %d, mod %d\n", ref, mod);
1791 1.5.4.2 briggs
1792 1.5.4.2 briggs /* Now clear reference and modify */
1793 1.5.4.2 briggs ref = pmap_clear_reference(pg);
1794 1.5.4.2 briggs mod = pmap_clear_modify(pg);
1795 1.5.4.2 briggs printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1796 1.5.4.2 briggs (void *)(u_long)va, (long)pa, ref, mod);
1797 1.5.4.2 briggs
1798 1.5.4.2 briggs /* Check it's properly cleared */
1799 1.5.4.2 briggs ref = pmap_is_referenced(pg);
1800 1.5.4.2 briggs mod = pmap_is_modified(pg);
1801 1.5.4.2 briggs printf("Checking cleared page: ref %d, mod %d\n",
1802 1.5.4.2 briggs ref, mod);
1803 1.5.4.2 briggs
1804 1.5.4.2 briggs pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL,
1805 1.5.4.2 briggs VM_PROT_ALL|PMAP_WIRED);
1806 1.5.4.2 briggs uvm_km_free(kernel_map, (vaddr_t)va, NBPG);
1807 1.5.4.2 briggs }
1808 1.5.4.2 briggs #endif
1809