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pmap.c revision 1.25
      1 /*	$NetBSD: pmap.c,v 1.25 2003/08/12 05:06:58 matt Exp $	*/
      2 
      3 /*
      4  * Copyright 2001 Wasabi Systems, Inc.
      5  * All rights reserved.
      6  *
      7  * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *      This product includes software developed for the NetBSD Project by
     20  *      Wasabi Systems, Inc.
     21  * 4. The name of Wasabi Systems, Inc. may not be used to endorse
     22  *    or promote products derived from this software without specific prior
     23  *    written permission.
     24  *
     25  * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
     26  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     27  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     28  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL WASABI SYSTEMS, INC
     29  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     30  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     31  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     32  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     33  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     34  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     35  * POSSIBILITY OF SUCH DAMAGE.
     36  */
     37 
     38 /*
     39  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
     40  * Copyright (C) 1995, 1996 TooLs GmbH.
     41  * All rights reserved.
     42  *
     43  * Redistribution and use in source and binary forms, with or without
     44  * modification, are permitted provided that the following conditions
     45  * are met:
     46  * 1. Redistributions of source code must retain the above copyright
     47  *    notice, this list of conditions and the following disclaimer.
     48  * 2. Redistributions in binary form must reproduce the above copyright
     49  *    notice, this list of conditions and the following disclaimer in the
     50  *    documentation and/or other materials provided with the distribution.
     51  * 3. All advertising materials mentioning features or use of this software
     52  *    must display the following acknowledgement:
     53  *	This product includes software developed by TooLs GmbH.
     54  * 4. The name of TooLs GmbH may not be used to endorse or promote products
     55  *    derived from this software without specific prior written permission.
     56  *
     57  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
     58  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     59  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     60  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     61  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     62  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     63  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     64  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     65  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     66  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     67  */
     68 
     69 #include <sys/cdefs.h>
     70 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.25 2003/08/12 05:06:58 matt Exp $");
     71 
     72 #include <sys/param.h>
     73 #include <sys/malloc.h>
     74 #include <sys/proc.h>
     75 #include <sys/user.h>
     76 #include <sys/queue.h>
     77 #include <sys/systm.h>
     78 #include <sys/pool.h>
     79 #include <sys/device.h>
     80 
     81 #include <uvm/uvm.h>
     82 
     83 #include <machine/cpu.h>
     84 #include <machine/pcb.h>
     85 #include <machine/powerpc.h>
     86 
     87 #include <powerpc/spr.h>
     88 #include <machine/tlb.h>
     89 
     90 /*
     91  * kernmap is an array of PTEs large enough to map in
     92  * 4GB.  At 16KB/page it is 256K entries or 2MB.
     93  */
     94 #define KERNMAP_SIZE	((0xffffffffU/PAGE_SIZE)+1)
     95 caddr_t kernmap;
     96 
     97 #define MINCTX		2
     98 #define NUMCTX		256
     99 volatile struct pmap *ctxbusy[NUMCTX];
    100 
    101 #define TLBF_USED	0x1
    102 #define	TLBF_REF	0x2
    103 #define	TLBF_LOCKED	0x4
    104 #define	TLB_LOCKED(i)	(tlb_info[(i)].ti_flags & TLBF_LOCKED)
    105 typedef struct tlb_info_s {
    106 	char	ti_flags;
    107 	char	ti_ctx;		/* TLB_PID assiciated with the entry */
    108 	u_int	ti_va;
    109 } tlb_info_t;
    110 
    111 volatile tlb_info_t tlb_info[NTLB];
    112 /* We'll use a modified FIFO replacement policy cause it's cheap */
    113 volatile int tlbnext = TLB_NRESERVED;
    114 
    115 u_long dtlb_miss_count = 0;
    116 u_long itlb_miss_count = 0;
    117 u_long ktlb_miss_count = 0;
    118 u_long utlb_miss_count = 0;
    119 
    120 /* Event counters */
    121 struct evcnt tlbmiss_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
    122 	NULL, "cpu", "tlbmiss");
    123 struct evcnt tlbhit_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
    124 	NULL, "cpu", "tlbhit");
    125 struct evcnt tlbflush_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
    126 	NULL, "cpu", "tlbflush");
    127 struct evcnt tlbenter_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
    128 	NULL, "cpu", "tlbenter");
    129 
    130 struct pmap kernel_pmap_;
    131 
    132 int physmem;
    133 static int npgs;
    134 static u_int nextavail;
    135 #ifndef MSGBUFADDR
    136 extern paddr_t msgbuf_paddr;
    137 #endif
    138 
    139 static struct mem_region *mem, *avail;
    140 
    141 /*
    142  * This is a cache of referenced/modified bits.
    143  * Bits herein are shifted by ATTRSHFT.
    144  */
    145 static char *pmap_attrib;
    146 
    147 #define PV_WIRED	0x1
    148 #define PV_WIRE(pv)	((pv)->pv_va |= PV_WIRED)
    149 #define	PV_CMPVA(va,pv)	(!(((pv)->pv_va^(va))&(~PV_WIRED)))
    150 
    151 struct pv_entry {
    152 	struct pv_entry *pv_next;	/* Linked list of mappings */
    153 	vaddr_t pv_va;			/* virtual address of mapping */
    154 	struct pmap *pv_pm;
    155 };
    156 
    157 struct pv_entry *pv_table;
    158 static struct pool pv_pool;
    159 
    160 static int pmap_initialized;
    161 
    162 static int ctx_flush(int);
    163 
    164 inline struct pv_entry *pa_to_pv(paddr_t);
    165 static inline char *pa_to_attr(paddr_t);
    166 
    167 static inline volatile u_int *pte_find(struct pmap *, vaddr_t);
    168 static inline int pte_enter(struct pmap *, vaddr_t, u_int);
    169 
    170 static void pmap_pinit(pmap_t);
    171 static void pmap_release(pmap_t);
    172 static inline int pmap_enter_pv(struct pmap *, vaddr_t, paddr_t);
    173 static void pmap_remove_pv(struct pmap *, vaddr_t, paddr_t);
    174 
    175 
    176 inline struct pv_entry *
    177 pa_to_pv(paddr_t pa)
    178 {
    179 	int bank, pg;
    180 
    181 	bank = vm_physseg_find(atop(pa), &pg);
    182 	if (bank == -1)
    183 		return NULL;
    184 	return &vm_physmem[bank].pmseg.pvent[pg];
    185 }
    186 
    187 static inline char *
    188 pa_to_attr(paddr_t pa)
    189 {
    190 	int bank, pg;
    191 
    192 	bank = vm_physseg_find(atop(pa), &pg);
    193 	if (bank == -1)
    194 		return NULL;
    195 	return &vm_physmem[bank].pmseg.attrs[pg];
    196 }
    197 
    198 /*
    199  * Insert PTE into page table.
    200  */
    201 int
    202 pte_enter(struct pmap *pm, vaddr_t va, u_int pte)
    203 {
    204 	int seg = STIDX(va);
    205 	int ptn = PTIDX(va);
    206 	u_int oldpte;
    207 
    208 	if (!pm->pm_ptbl[seg]) {
    209 		/* Don't allocate a page to clear a non-existent mapping. */
    210 		if (!pte) return (0);
    211 		/* Allocate a page XXXX this will sleep! */
    212 		pm->pm_ptbl[seg] =
    213 		    (uint *)uvm_km_alloc1(kernel_map, PAGE_SIZE, 1);
    214 	}
    215 	oldpte = pm->pm_ptbl[seg][ptn];
    216 	pm->pm_ptbl[seg][ptn] = pte;
    217 
    218 	/* Flush entry. */
    219 	ppc4xx_tlb_flush(va, pm->pm_ctx);
    220 	if (oldpte != pte) {
    221 		if (pte == 0)
    222 			pm->pm_stats.resident_count--;
    223 		else
    224 			pm->pm_stats.resident_count++;
    225 	}
    226 	return (1);
    227 }
    228 
    229 /*
    230  * Get a pointer to a PTE in a page table.
    231  */
    232 volatile u_int *
    233 pte_find(struct pmap *pm, vaddr_t va)
    234 {
    235 	int seg = STIDX(va);
    236 	int ptn = PTIDX(va);
    237 
    238 	if (pm->pm_ptbl[seg])
    239 		return (&pm->pm_ptbl[seg][ptn]);
    240 
    241 	return (NULL);
    242 }
    243 
    244 /*
    245  * This is called during initppc, before the system is really initialized.
    246  */
    247 void
    248 pmap_bootstrap(u_int kernelstart, u_int kernelend)
    249 {
    250 	struct mem_region *mp, *mp1;
    251 	int cnt, i;
    252 	u_int s, e, sz;
    253 
    254 	/*
    255 	 * Allocate the kernel page table at the end of
    256 	 * kernel space so it's in the locked TTE.
    257 	 */
    258 	kernmap = (caddr_t)kernelend;
    259 
    260 	/*
    261 	 * Initialize kernel page table.
    262 	 */
    263 	for (i = 0; i < STSZ; i++) {
    264 		pmap_kernel()->pm_ptbl[i] = 0;
    265 	}
    266 	ctxbusy[0] = ctxbusy[1] = pmap_kernel();
    267 
    268 	/*
    269 	 * Announce page-size to the VM-system
    270 	 */
    271 	uvmexp.pagesize = NBPG;
    272 	uvm_setpagesize();
    273 
    274 	/*
    275 	 * Get memory.
    276 	 */
    277 	mem_regions(&mem, &avail);
    278 	for (mp = mem; mp->size; mp++) {
    279 		physmem += btoc(mp->size);
    280 		printf("+%lx,",mp->size);
    281 	}
    282 	printf("\n");
    283 	ppc4xx_tlb_init();
    284 	/*
    285 	 * Count the number of available entries.
    286 	 */
    287 	for (cnt = 0, mp = avail; mp->size; mp++)
    288 		cnt++;
    289 
    290 	/*
    291 	 * Page align all regions.
    292 	 * Non-page aligned memory isn't very interesting to us.
    293 	 * Also, sort the entries for ascending addresses.
    294 	 */
    295 	kernelstart &= ~PGOFSET;
    296 	kernelend = (kernelend + PGOFSET) & ~PGOFSET;
    297 	for (mp = avail; mp->size; mp++) {
    298 		s = mp->start;
    299 		e = mp->start + mp->size;
    300 		printf("%08x-%08x -> ",s,e);
    301 		/*
    302 		 * Check whether this region holds all of the kernel.
    303 		 */
    304 		if (s < kernelstart && e > kernelend) {
    305 			avail[cnt].start = kernelend;
    306 			avail[cnt++].size = e - kernelend;
    307 			e = kernelstart;
    308 		}
    309 		/*
    310 		 * Look whether this regions starts within the kernel.
    311 		 */
    312 		if (s >= kernelstart && s < kernelend) {
    313 			if (e <= kernelend)
    314 				goto empty;
    315 			s = kernelend;
    316 		}
    317 		/*
    318 		 * Now look whether this region ends within the kernel.
    319 		 */
    320 		if (e > kernelstart && e <= kernelend) {
    321 			if (s >= kernelstart)
    322 				goto empty;
    323 			e = kernelstart;
    324 		}
    325 		/*
    326 		 * Now page align the start and size of the region.
    327 		 */
    328 		s = round_page(s);
    329 		e = trunc_page(e);
    330 		if (e < s)
    331 			e = s;
    332 		sz = e - s;
    333 		printf("%08x-%08x = %x\n",s,e,sz);
    334 		/*
    335 		 * Check whether some memory is left here.
    336 		 */
    337 		if (sz == 0) {
    338 		empty:
    339 			memmove(mp, mp + 1,
    340 				(cnt - (mp - avail)) * sizeof *mp);
    341 			cnt--;
    342 			mp--;
    343 			continue;
    344 		}
    345 		/*
    346 		 * Do an insertion sort.
    347 		 */
    348 		npgs += btoc(sz);
    349 		for (mp1 = avail; mp1 < mp; mp1++)
    350 			if (s < mp1->start)
    351 				break;
    352 		if (mp1 < mp) {
    353 			memmove(mp1 + 1, mp1, (char *)mp - (char *)mp1);
    354 			mp1->start = s;
    355 			mp1->size = sz;
    356 		} else {
    357 			mp->start = s;
    358 			mp->size = sz;
    359 		}
    360 	}
    361 
    362 	/*
    363 	 * We cannot do pmap_steal_memory here,
    364 	 * since we don't run with translation enabled yet.
    365 	 */
    366 #ifndef MSGBUFADDR
    367 	/*
    368 	 * allow for msgbuf
    369 	 */
    370 	sz = round_page(MSGBUFSIZE);
    371 	mp = NULL;
    372 	for (mp1 = avail; mp1->size; mp1++)
    373 		if (mp1->size >= sz)
    374 			mp = mp1;
    375 	if (mp == NULL)
    376 		panic("not enough memory?");
    377 
    378 	npgs -= btoc(sz);
    379 	msgbuf_paddr = mp->start + mp->size - sz;
    380 	mp->size -= sz;
    381 	if (mp->size <= 0)
    382 		memmove(mp, mp + 1, (cnt - (mp - avail)) * sizeof *mp);
    383 #endif
    384 
    385 	printf("Loading pages\n");
    386 	for (mp = avail; mp->size; mp++)
    387 		uvm_page_physload(atop(mp->start), atop(mp->start + mp->size),
    388 			atop(mp->start), atop(mp->start + mp->size),
    389 			VM_FREELIST_DEFAULT);
    390 
    391 	/*
    392 	 * Initialize kernel pmap and hardware.
    393 	 */
    394 	/* Setup TLB pid allocator so it knows we alreadu using PID 1 */
    395 	pmap_kernel()->pm_ctx = KERNEL_PID;
    396 	nextavail = avail->start;
    397 
    398 
    399 	evcnt_attach_static(&tlbhit_ev);
    400 	evcnt_attach_static(&tlbmiss_ev);
    401 	evcnt_attach_static(&tlbflush_ev);
    402 	evcnt_attach_static(&tlbenter_ev);
    403 	printf("Done\n");
    404 }
    405 
    406 /*
    407  * Restrict given range to physical memory
    408  *
    409  * (Used by /dev/mem)
    410  */
    411 void
    412 pmap_real_memory(paddr_t *start, psize_t *size)
    413 {
    414 	struct mem_region *mp;
    415 
    416 	for (mp = mem; mp->size; mp++) {
    417 		if (*start + *size > mp->start &&
    418 		    *start < mp->start + mp->size) {
    419 			if (*start < mp->start) {
    420 				*size -= mp->start - *start;
    421 				*start = mp->start;
    422 			}
    423 			if (*start + *size > mp->start + mp->size)
    424 				*size = mp->start + mp->size - *start;
    425 			return;
    426 		}
    427 	}
    428 	*size = 0;
    429 }
    430 
    431 /*
    432  * Initialize anything else for pmap handling.
    433  * Called during vm_init().
    434  */
    435 void
    436 pmap_init(void)
    437 {
    438 	struct pv_entry *pv;
    439 	vsize_t sz;
    440 	vaddr_t addr;
    441 	int i, s;
    442 	int bank;
    443 	char *attr;
    444 
    445 	sz = (vsize_t)((sizeof(struct pv_entry) + 1) * npgs);
    446 	sz = round_page(sz);
    447 	addr = uvm_km_zalloc(kernel_map, sz);
    448 	s = splvm();
    449 	pv = pv_table = (struct pv_entry *)addr;
    450 	for (i = npgs; --i >= 0;)
    451 		pv++->pv_pm = NULL;
    452 	pmap_attrib = (char *)pv;
    453 	memset(pv, 0, npgs);
    454 
    455 	pv = pv_table;
    456 	attr = pmap_attrib;
    457 	for (bank = 0; bank < vm_nphysseg; bank++) {
    458 		sz = vm_physmem[bank].end - vm_physmem[bank].start;
    459 		vm_physmem[bank].pmseg.pvent = pv;
    460 		vm_physmem[bank].pmseg.attrs = attr;
    461 		pv += sz;
    462 		attr += sz;
    463 	}
    464 
    465 	pmap_initialized = 1;
    466 	splx(s);
    467 
    468 	/* Setup a pool for additional pvlist structures */
    469 	pool_init(&pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pv_entry", NULL);
    470 }
    471 
    472 /*
    473  * How much virtual space is available to the kernel?
    474  */
    475 void
    476 pmap_virtual_space(vaddr_t *start, vaddr_t *end)
    477 {
    478 
    479 #if 0
    480 	/*
    481 	 * Reserve one segment for kernel virtual memory
    482 	 */
    483 	*start = (vaddr_t)(KERNEL_SR << ADDR_SR_SHFT);
    484 	*end = *start + SEGMENT_LENGTH;
    485 #else
    486 	*start = (vaddr_t) VM_MIN_KERNEL_ADDRESS;
    487 	*end = (vaddr_t) VM_MAX_KERNEL_ADDRESS;
    488 #endif
    489 }
    490 
    491 #ifdef PMAP_GROWKERNEL
    492 /*
    493  * Preallocate kernel page tables to a specified VA.
    494  * This simply loops through the first TTE for each
    495  * page table from the beginning of the kernel pmap,
    496  * reads the entry, and if the result is
    497  * zero (either invalid entry or no page table) it stores
    498  * a zero there, populating page tables in the process.
    499  * This is not the most efficient technique but i don't
    500  * expect it to be called that often.
    501  */
    502 extern struct vm_page *vm_page_alloc1 __P((void));
    503 extern void vm_page_free1 __P((struct vm_page *));
    504 
    505 vaddr_t kbreak = VM_MIN_KERNEL_ADDRESS;
    506 
    507 vaddr_t
    508 pmap_growkernel(maxkvaddr)
    509 	vaddr_t maxkvaddr;
    510 {
    511 	int s;
    512 	int seg;
    513 	paddr_t pg;
    514 	struct pmap *pm = pmap_kernel();
    515 
    516 	s = splvm();
    517 
    518 	/* Align with the start of a page table */
    519 	for (kbreak &= ~(PTMAP-1); kbreak < maxkvaddr;
    520 	     kbreak += PTMAP) {
    521 		seg = STIDX(kbreak);
    522 
    523 		if (pte_find(pm, kbreak)) continue;
    524 
    525 		if (uvm.page_init_done) {
    526 			pg = (paddr_t)VM_PAGE_TO_PHYS(vm_page_alloc1());
    527 		} else {
    528 			if (!uvm_page_physget(&pg))
    529 				panic("pmap_growkernel: no memory");
    530 		}
    531 		if (!pg) panic("pmap_growkernel: no pages");
    532 		pmap_zero_page((paddr_t)pg);
    533 
    534 		/* XXX This is based on all phymem being addressable */
    535 		pm->pm_ptbl[seg] = (u_int *)pg;
    536 	}
    537 	splx(s);
    538 	return (kbreak);
    539 }
    540 
    541 /*
    542  *	vm_page_alloc1:
    543  *
    544  *	Allocate and return a memory cell with no associated object.
    545  */
    546 struct vm_page *
    547 vm_page_alloc1()
    548 {
    549 	struct vm_page *pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_USERESERVE);
    550 	if (pg) {
    551 		pg->wire_count = 1;	/* no mappings yet */
    552 		pg->flags &= ~PG_BUSY;	/* never busy */
    553 	}
    554 	return pg;
    555 }
    556 
    557 /*
    558  *	vm_page_free1:
    559  *
    560  *	Returns the given page to the free list,
    561  *	disassociating it with any VM object.
    562  *
    563  *	Object and page must be locked prior to entry.
    564  */
    565 void
    566 vm_page_free1(mem)
    567 	struct vm_page *mem;
    568 {
    569 #ifdef DIAGNOSTIC
    570 	if (mem->flags != (PG_CLEAN|PG_FAKE)) {
    571 		printf("Freeing invalid page %p\n", mem);
    572 		printf("pa = %llx\n", (unsigned long long)VM_PAGE_TO_PHYS(mem));
    573 #ifdef DDB
    574 		Debugger();
    575 #endif
    576 		return;
    577 	}
    578 #endif
    579 	mem->flags |= PG_BUSY;
    580 	mem->wire_count = 0;
    581 	uvm_pagefree(mem);
    582 }
    583 #endif
    584 
    585 /*
    586  * Create and return a physical map.
    587  */
    588 struct pmap *
    589 pmap_create(void)
    590 {
    591 	struct pmap *pm;
    592 
    593 	pm = (struct pmap *)malloc(sizeof *pm, M_VMPMAP, M_WAITOK);
    594 	memset((caddr_t)pm, 0, sizeof *pm);
    595 	pmap_pinit(pm);
    596 	return pm;
    597 }
    598 
    599 /*
    600  * Initialize a preallocated and zeroed pmap structure.
    601  */
    602 void
    603 pmap_pinit(struct pmap *pm)
    604 {
    605 	int i;
    606 
    607 	/*
    608 	 * Allocate some segment registers for this pmap.
    609 	 */
    610 	pm->pm_refs = 1;
    611 	for (i = 0; i < STSZ; i++)
    612 		pm->pm_ptbl[i] = NULL;
    613 }
    614 
    615 /*
    616  * Add a reference to the given pmap.
    617  */
    618 void
    619 pmap_reference(struct pmap *pm)
    620 {
    621 
    622 	pm->pm_refs++;
    623 }
    624 
    625 /*
    626  * Retire the given pmap from service.
    627  * Should only be called if the map contains no valid mappings.
    628  */
    629 void
    630 pmap_destroy(struct pmap *pm)
    631 {
    632 
    633 	if (--pm->pm_refs == 0) {
    634 		pmap_release(pm);
    635 		free((caddr_t)pm, M_VMPMAP);
    636 	}
    637 }
    638 
    639 /*
    640  * Release any resources held by the given physical map.
    641  * Called when a pmap initialized by pmap_pinit is being released.
    642  */
    643 static void
    644 pmap_release(struct pmap *pm)
    645 {
    646 	int i;
    647 
    648 	for (i = 0; i < STSZ; i++)
    649 		if (pm->pm_ptbl[i]) {
    650 			uvm_km_free(kernel_map, (vaddr_t)pm->pm_ptbl[i],
    651 			    PAGE_SIZE);
    652 			pm->pm_ptbl[i] = NULL;
    653 		}
    654 	if (pm->pm_ctx) ctx_free(pm);
    655 }
    656 
    657 /*
    658  * Copy the range specified by src_addr/len
    659  * from the source map to the range dst_addr/len
    660  * in the destination map.
    661  *
    662  * This routine is only advisory and need not do anything.
    663  */
    664 void
    665 pmap_copy(struct pmap *dst_pmap, struct pmap *src_pmap, vaddr_t dst_addr,
    666 	  vsize_t len, vaddr_t src_addr)
    667 {
    668 }
    669 
    670 /*
    671  * Require that all active physical maps contain no
    672  * incorrect entries NOW.
    673  */
    674 void
    675 pmap_update(struct pmap *pmap)
    676 {
    677 }
    678 
    679 /*
    680  * Garbage collects the physical map system for
    681  * pages which are no longer used.
    682  * Success need not be guaranteed -- that is, there
    683  * may well be pages which are not referenced, but
    684  * others may be collected.
    685  * Called by the pageout daemon when pages are scarce.
    686  */
    687 void
    688 pmap_collect(struct pmap *pm)
    689 {
    690 }
    691 
    692 /*
    693  * Fill the given physical page with zeroes.
    694  */
    695 void
    696 pmap_zero_page(paddr_t pa)
    697 {
    698 
    699 #ifdef PPC_4XX_NOCACHE
    700 	memset((caddr_t)pa, 0, PAGE_SIZE);
    701 #else
    702 	int i;
    703 
    704 	for (i = PAGE_SIZE/CACHELINESIZE; i > 0; i--) {
    705 		__asm __volatile ("dcbz 0,%0" :: "r"(pa));
    706 		pa += CACHELINESIZE;
    707 	}
    708 #endif
    709 }
    710 
    711 /*
    712  * Copy the given physical source page to its destination.
    713  */
    714 void
    715 pmap_copy_page(paddr_t src, paddr_t dst)
    716 {
    717 
    718 	memcpy((caddr_t)dst, (caddr_t)src, PAGE_SIZE);
    719 	dcache_flush_page(dst);
    720 }
    721 
    722 /*
    723  * This returns whether this is the first mapping of a page.
    724  */
    725 static inline int
    726 pmap_enter_pv(struct pmap *pm, vaddr_t va, paddr_t pa)
    727 {
    728 	struct pv_entry *pv, *npv = NULL;
    729 	int s;
    730 
    731 	if (!pmap_initialized)
    732 		return 0;
    733 
    734 	s = splvm();
    735 
    736 	pv = pa_to_pv(pa);
    737 for (npv = pv; npv; npv = npv->pv_next)
    738 if (npv->pv_va == va && npv->pv_pm == pm) {
    739 printf("Duplicate pv: va %lx pm %p\n", va, pm);
    740 #ifdef DDB
    741 Debugger();
    742 #endif
    743 return (1);
    744 }
    745 
    746 	if (!pv->pv_pm) {
    747 		/*
    748 		 * No entries yet, use header as the first entry.
    749 		 */
    750 		pv->pv_va = va;
    751 		pv->pv_pm = pm;
    752 		pv->pv_next = NULL;
    753 	} else {
    754 		/*
    755 		 * There is at least one other VA mapping this page.
    756 		 * Place this entry after the header.
    757 		 */
    758 		npv = pool_get(&pv_pool, PR_WAITOK);
    759 		if (!npv) return (0);
    760 		npv->pv_va = va;
    761 		npv->pv_pm = pm;
    762 		npv->pv_next = pv->pv_next;
    763 		pv->pv_next = npv;
    764 	}
    765 	splx(s);
    766 	return (1);
    767 }
    768 
    769 static void
    770 pmap_remove_pv(struct pmap *pm, vaddr_t va, paddr_t pa)
    771 {
    772 	struct pv_entry *pv, *npv;
    773 
    774 	/*
    775 	 * Remove from the PV table.
    776 	 */
    777 	pv = pa_to_pv(pa);
    778 	if (!pv) return;
    779 
    780 	/*
    781 	 * If it is the first entry on the list, it is actually
    782 	 * in the header and we must copy the following entry up
    783 	 * to the header.  Otherwise we must search the list for
    784 	 * the entry.  In either case we free the now unused entry.
    785 	 */
    786 	if (pm == pv->pv_pm && PV_CMPVA(va, pv)) {
    787 		if ((npv = pv->pv_next)) {
    788 			*pv = *npv;
    789 			pool_put(&pv_pool, npv);
    790 		} else
    791 			pv->pv_pm = NULL;
    792 	} else {
    793 		for (; (npv = pv->pv_next) != NULL; pv = npv)
    794 			if (pm == npv->pv_pm && PV_CMPVA(va, npv))
    795 				break;
    796 		if (npv) {
    797 			pv->pv_next = npv->pv_next;
    798 			pool_put(&pv_pool, npv);
    799 		}
    800 	}
    801 }
    802 
    803 /*
    804  * Insert physical page at pa into the given pmap at virtual address va.
    805  */
    806 int
    807 pmap_enter(struct pmap *pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags)
    808 {
    809 	int s;
    810 	u_int tte;
    811 	int managed;
    812 
    813 	/*
    814 	 * Have to remove any existing mapping first.
    815 	 */
    816 	pmap_remove(pm, va, va + PAGE_SIZE);
    817 
    818 	if (flags & PMAP_WIRED) flags |= prot;
    819 
    820 	/* If it has no protections don't bother w/the rest */
    821 	if (!(flags & VM_PROT_ALL))
    822 		return (0);
    823 
    824 	managed = 0;
    825 	if (vm_physseg_find(atop(pa), NULL) != -1)
    826 		managed = 1;
    827 
    828 	/*
    829 	 * Generate TTE.
    830 	 *
    831 	 * XXXX
    832 	 *
    833 	 * Since the kernel does not handle execution privileges properly,
    834 	 * we will handle read and execute permissions together.
    835 	 */
    836 	tte = TTE_PA(pa) | TTE_EX;
    837 	/* XXXX -- need to support multiple page sizes. */
    838 	tte |= TTE_SZ_16K;
    839 #ifdef	DIAGNOSTIC
    840 	if ((flags & (PME_NOCACHE | PME_WRITETHROUG)) ==
    841 		(PME_NOCACHE | PME_WRITETHROUG))
    842 		panic("pmap_enter: uncached & writethrough");
    843 #endif
    844 	if (flags & PME_NOCACHE)
    845 		/* Must be I/O mapping */
    846 		tte |= TTE_I | TTE_G;
    847 #ifdef PPC_4XX_NOCACHE
    848 	tte |= TTE_I;
    849 #else
    850 	else if (flags & PME_WRITETHROUG)
    851 		/* Uncached and writethrough are not compatible */
    852 		tte |= TTE_W;
    853 #endif
    854 	if (pm == pmap_kernel())
    855 		tte |= TTE_ZONE(ZONE_PRIV);
    856 	else
    857 		tte |= TTE_ZONE(ZONE_USER);
    858 
    859 	if (flags & VM_PROT_WRITE)
    860 		tte |= TTE_WR;
    861 
    862 	/*
    863 	 * Now record mapping for later back-translation.
    864 	 */
    865 	if (pmap_initialized && managed) {
    866 		char *attr;
    867 
    868 		if (!pmap_enter_pv(pm, va, pa)) {
    869 			/* Could not enter pv on a managed page */
    870 			return 1;
    871 		}
    872 
    873 		/* Now set attributes. */
    874 		attr = pa_to_attr(pa);
    875 #ifdef DIAGNOSTIC
    876 		if (!attr)
    877 			panic("managed but no attr");
    878 #endif
    879 		if (flags & VM_PROT_ALL)
    880 			*attr |= PTE_HI_REF;
    881 		if (flags & VM_PROT_WRITE)
    882 			*attr |= PTE_HI_CHG;
    883 	}
    884 
    885 	s = splvm();
    886 
    887 	/* Insert page into page table. */
    888 	pte_enter(pm, va, tte);
    889 
    890 	/* If this is a real fault, enter it in the tlb */
    891 	if (tte && ((flags & PMAP_WIRED) == 0)) {
    892 		ppc4xx_tlb_enter(pm->pm_ctx, va, tte);
    893 	}
    894 	splx(s);
    895 
    896 	/* Flush the real memory from the instruction cache. */
    897 	if ((prot & VM_PROT_EXECUTE) && (tte & TTE_I) == 0)
    898 		__syncicache((void *)pa, PAGE_SIZE);
    899 
    900 	return 0;
    901 }
    902 
    903 void
    904 pmap_unwire(struct pmap *pm, vaddr_t va)
    905 {
    906 	struct pv_entry *pv, *npv;
    907 	paddr_t pa;
    908 	int s = splvm();
    909 
    910 	if (pm == NULL) {
    911 		return;
    912 	}
    913 
    914 	if (!pmap_extract(pm, va, &pa)) {
    915 		return;
    916 	}
    917 
    918 	va |= PV_WIRED;
    919 
    920 	pv = pa_to_pv(pa);
    921 	if (!pv) return;
    922 
    923 	/*
    924 	 * If it is the first entry on the list, it is actually
    925 	 * in the header and we must copy the following entry up
    926 	 * to the header.  Otherwise we must search the list for
    927 	 * the entry.  In either case we free the now unused entry.
    928 	 */
    929 	for (npv = pv; (npv = pv->pv_next) != NULL; pv = npv) {
    930 		if (pm == npv->pv_pm && PV_CMPVA(va, npv)) {
    931 			npv->pv_va &= ~PV_WIRED;
    932 			break;
    933 		}
    934 	}
    935 	splx(s);
    936 }
    937 
    938 void
    939 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot)
    940 {
    941 	int s;
    942 	u_int tte;
    943 	struct pmap *pm = pmap_kernel();
    944 
    945 	/*
    946 	 * Have to remove any existing mapping first.
    947 	 */
    948 
    949 	/*
    950 	 * Generate TTE.
    951 	 *
    952 	 * XXXX
    953 	 *
    954 	 * Since the kernel does not handle execution privileges properly,
    955 	 * we will handle read and execute permissions together.
    956 	 */
    957 	tte = 0;
    958 	if (prot & VM_PROT_ALL) {
    959 
    960 		tte = TTE_PA(pa) | TTE_EX | TTE_ZONE(ZONE_PRIV);
    961 		/* XXXX -- need to support multiple page sizes. */
    962 		tte |= TTE_SZ_16K;
    963 #ifdef DIAGNOSTIC
    964 		if ((prot & (PME_NOCACHE | PME_WRITETHROUG)) ==
    965 			(PME_NOCACHE | PME_WRITETHROUG))
    966 			panic("pmap_kenter_pa: uncached & writethrough");
    967 #endif
    968 		if (prot & PME_NOCACHE)
    969 			/* Must be I/O mapping */
    970 			tte |= TTE_I | TTE_G;
    971 #ifdef PPC_4XX_NOCACHE
    972 		tte |= TTE_I;
    973 #else
    974 		else if (prot & PME_WRITETHROUG)
    975 			/* Uncached and writethrough are not compatible */
    976 			tte |= TTE_W;
    977 #endif
    978 		if (prot & VM_PROT_WRITE)
    979 			tte |= TTE_WR;
    980 	}
    981 
    982 	s = splvm();
    983 
    984 	/* Insert page into page table. */
    985 	pte_enter(pm, va, tte);
    986 	splx(s);
    987 }
    988 
    989 void
    990 pmap_kremove(vaddr_t va, vsize_t len)
    991 {
    992 
    993 	while (len > 0) {
    994 		pte_enter(pmap_kernel(), va, 0);
    995 		va += PAGE_SIZE;
    996 		len -= PAGE_SIZE;
    997 	}
    998 }
    999 
   1000 /*
   1001  * Remove the given range of mapping entries.
   1002  */
   1003 void
   1004 pmap_remove(struct pmap *pm, vaddr_t va, vaddr_t endva)
   1005 {
   1006 	int s;
   1007 	paddr_t pa;
   1008 	volatile u_int *ptp;
   1009 
   1010 	s = splvm();
   1011 	while (va < endva) {
   1012 
   1013 		if ((ptp = pte_find(pm, va)) && (pa = *ptp)) {
   1014 			pa = TTE_PA(pa);
   1015 			pmap_remove_pv(pm, va, pa);
   1016 			*ptp = 0;
   1017 			ppc4xx_tlb_flush(va, pm->pm_ctx);
   1018 			pm->pm_stats.resident_count--;
   1019 		}
   1020 		va += PAGE_SIZE;
   1021 	}
   1022 
   1023 	splx(s);
   1024 }
   1025 
   1026 /*
   1027  * Get the physical page address for the given pmap/virtual address.
   1028  */
   1029 boolean_t
   1030 pmap_extract(struct pmap *pm, vaddr_t va, paddr_t *pap)
   1031 {
   1032 	int seg = STIDX(va);
   1033 	int ptn = PTIDX(va);
   1034 	u_int pa = 0;
   1035 	int s = splvm();
   1036 
   1037 	if (pm->pm_ptbl[seg] && (pa = pm->pm_ptbl[seg][ptn])) {
   1038 		*pap = TTE_PA(pa) | (va & PGOFSET);
   1039 	}
   1040 	splx(s);
   1041 	return (pa != 0);
   1042 }
   1043 
   1044 /*
   1045  * Lower the protection on the specified range of this pmap.
   1046  *
   1047  * There are only two cases: either the protection is going to 0,
   1048  * or it is going to read-only.
   1049  */
   1050 void
   1051 pmap_protect(struct pmap *pm, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
   1052 {
   1053 	volatile u_int *ptp;
   1054 	int s;
   1055 
   1056 	if (prot & VM_PROT_READ) {
   1057 		s = splvm();
   1058 		while (sva < eva) {
   1059 			if ((ptp = pte_find(pm, sva)) != NULL) {
   1060 				*ptp &= ~TTE_WR;
   1061 				ppc4xx_tlb_flush(sva, pm->pm_ctx);
   1062 			}
   1063 			sva += PAGE_SIZE;
   1064 		}
   1065 		splx(s);
   1066 		return;
   1067 	}
   1068 	pmap_remove(pm, sva, eva);
   1069 }
   1070 
   1071 boolean_t
   1072 check_attr(struct vm_page *pg, u_int mask, int clear)
   1073 {
   1074 	paddr_t pa = VM_PAGE_TO_PHYS(pg);
   1075 	int s;
   1076 	char *attr;
   1077 	int rv;
   1078 
   1079 	/*
   1080 	 * First modify bits in cache.
   1081 	 */
   1082 	s = splvm();
   1083 	attr = pa_to_attr(pa);
   1084 	if (attr == NULL)
   1085 		return FALSE;
   1086 
   1087 	rv = ((*attr & mask) != 0);
   1088 	if (clear) {
   1089 		*attr &= ~mask;
   1090 		pmap_page_protect(pg, (mask == PTE_HI_CHG) ? VM_PROT_READ : 0);
   1091 	}
   1092 	splx(s);
   1093 	return rv;
   1094 }
   1095 
   1096 
   1097 /*
   1098  * Lower the protection on the specified physical page.
   1099  *
   1100  * There are only two cases: either the protection is going to 0,
   1101  * or it is going to read-only.
   1102  */
   1103 void
   1104 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
   1105 {
   1106 	paddr_t pa = VM_PAGE_TO_PHYS(pg);
   1107 	vaddr_t va;
   1108 	struct pv_entry *pvh, *pv, *npv;
   1109 	struct pmap *pm;
   1110 
   1111 	pvh = pa_to_pv(pa);
   1112 	if (pvh == NULL)
   1113 		return;
   1114 
   1115 	/* Handle extra pvs which may be deleted in the operation */
   1116 	for (pv = pvh->pv_next; pv; pv = npv) {
   1117 		npv = pv->pv_next;
   1118 
   1119 		pm = pv->pv_pm;
   1120 		va = pv->pv_va;
   1121 		pmap_protect(pm, va, va+PAGE_SIZE, prot);
   1122 	}
   1123 	/* Now check the head pv */
   1124 	if (pvh->pv_pm) {
   1125 		pv = pvh;
   1126 		pm = pv->pv_pm;
   1127 		va = pv->pv_va;
   1128 		pmap_protect(pm, va, va+PAGE_SIZE, prot);
   1129 	}
   1130 }
   1131 
   1132 /*
   1133  * Activate the address space for the specified process.  If the process
   1134  * is the current process, load the new MMU context.
   1135  */
   1136 void
   1137 pmap_activate(struct lwp *l)
   1138 {
   1139 #if 0
   1140 	struct pcb *pcb = &l->l_proc->p_addr->u_pcb;
   1141 	pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap;
   1142 
   1143 	/*
   1144 	 * XXX Normally performed in cpu_fork().
   1145 	 */
   1146 	printf("pmap_activate(%p), pmap=%p\n",l,pmap);
   1147 	pcb->pcb_pm = pmap;
   1148 #endif
   1149 }
   1150 
   1151 /*
   1152  * Deactivate the specified process's address space.
   1153  */
   1154 void
   1155 pmap_deactivate(struct lwp *l)
   1156 {
   1157 }
   1158 
   1159 /*
   1160  * Synchronize caches corresponding to [addr, addr+len) in p.
   1161  */
   1162 void
   1163 pmap_procwr(struct proc *p, vaddr_t va, size_t len)
   1164 {
   1165 	struct pmap *pm = p->p_vmspace->vm_map.pmap;
   1166 	int msr, ctx, opid, step;
   1167 
   1168 
   1169 	step = CACHELINESIZE;
   1170 
   1171 	/*
   1172 	 * Need to turn off IMMU and switch to user context.
   1173 	 * (icbi uses DMMU).
   1174 	 */
   1175 	if (!(ctx = pm->pm_ctx)) {
   1176 		/* No context -- assign it one */
   1177 		ctx_alloc(pm);
   1178 		ctx = pm->pm_ctx;
   1179 	}
   1180 	__asm __volatile("mfmsr %0;"
   1181 		"li %1, 0x20;"
   1182 		"andc %1,%0,%1;"
   1183 		"mtmsr %1;"
   1184 		"sync;isync;"
   1185 		"mfpid %1;"
   1186 		"mtpid %2;"
   1187 		"sync; isync;"
   1188 		"1:"
   1189 		"dcbf 0,%3;"
   1190 		"icbi 0,%3;"
   1191 		"add %3,%3,%5;"
   1192 		"addc. %4,%4,%6;"
   1193 		"bge 1b;"
   1194 		"mtpid %1;"
   1195 		"mtmsr %0;"
   1196 		"sync; isync"
   1197 		: "=&r" (msr), "=&r" (opid)
   1198 		: "r" (ctx), "r" (va), "r" (len), "r" (step), "r" (-step));
   1199 }
   1200 
   1201 
   1202 /* This has to be done in real mode !!! */
   1203 void
   1204 ppc4xx_tlb_flush(vaddr_t va, int pid)
   1205 {
   1206 	u_long i, found;
   1207 	u_long msr;
   1208 
   1209 	/* If there's no context then it can't be mapped. */
   1210 	if (!pid) return;
   1211 
   1212 	asm("mfpid %1;"			/* Save PID */
   1213 		"mfmsr %2;"		/* Save MSR */
   1214 		"li %0,0;"		/* Now clear MSR */
   1215 		"mtmsr %0;"
   1216 		"mtpid %4;"		/* Set PID */
   1217 		"sync;"
   1218 		"tlbsx. %0,0,%3;"	/* Search TLB */
   1219 		"sync;"
   1220 		"mtpid %1;"		/* Restore PID */
   1221 		"mtmsr %2;"		/* Restore MSR */
   1222 		"sync;isync;"
   1223 		"li %1,1;"
   1224 		"beq 1f;"
   1225 		"li %1,0;"
   1226 		"1:"
   1227 		: "=&r" (i), "=&r" (found), "=&r" (msr)
   1228 		: "r" (va), "r" (pid));
   1229 	if (found && !TLB_LOCKED(i)) {
   1230 
   1231 		/* Now flush translation */
   1232 		asm volatile(
   1233 			"tlbwe %0,%1,0;"
   1234 			"sync;isync;"
   1235 			: : "r" (0), "r" (i));
   1236 
   1237 		tlb_info[i].ti_ctx = 0;
   1238 		tlb_info[i].ti_flags = 0;
   1239 		tlbnext = i;
   1240 		/* Successful flushes */
   1241 		tlbflush_ev.ev_count++;
   1242 	}
   1243 }
   1244 
   1245 void
   1246 ppc4xx_tlb_flush_all(void)
   1247 {
   1248 	u_long i;
   1249 
   1250 	for (i = 0; i < NTLB; i++)
   1251 		if (!TLB_LOCKED(i)) {
   1252 			asm volatile(
   1253 				"tlbwe %0,%1,0;"
   1254 				"sync;isync;"
   1255 				: : "r" (0), "r" (i));
   1256 			tlb_info[i].ti_ctx = 0;
   1257 			tlb_info[i].ti_flags = 0;
   1258 		}
   1259 
   1260 	asm volatile("sync;isync");
   1261 }
   1262 
   1263 /* Find a TLB entry to evict. */
   1264 static int
   1265 ppc4xx_tlb_find_victim(void)
   1266 {
   1267 	int flags;
   1268 
   1269 	for (;;) {
   1270 		if (++tlbnext >= NTLB)
   1271 			tlbnext = TLB_NRESERVED;
   1272 		flags = tlb_info[tlbnext].ti_flags;
   1273 		if (!(flags & TLBF_USED) ||
   1274 			(flags & (TLBF_LOCKED | TLBF_REF)) == 0) {
   1275 			u_long va, stack = (u_long)&va;
   1276 
   1277 			if (!((tlb_info[tlbnext].ti_va ^ stack) & (~PGOFSET)) &&
   1278 			    (tlb_info[tlbnext].ti_ctx == KERNEL_PID) &&
   1279 			     (flags & TLBF_USED)) {
   1280 				/* Kernel stack page */
   1281 				flags |= TLBF_USED;
   1282 				tlb_info[tlbnext].ti_flags = flags;
   1283 			} else {
   1284 				/* Found it! */
   1285 				return (tlbnext);
   1286 			}
   1287 		} else {
   1288 			tlb_info[tlbnext].ti_flags = (flags & ~TLBF_REF);
   1289 		}
   1290 	}
   1291 }
   1292 
   1293 void
   1294 ppc4xx_tlb_enter(int ctx, vaddr_t va, u_int pte)
   1295 {
   1296 	u_long th, tl, idx;
   1297 	tlbpid_t pid;
   1298 	u_short msr;
   1299 	paddr_t pa;
   1300 	int s, sz;
   1301 
   1302 	tlbenter_ev.ev_count++;
   1303 
   1304 	sz = (pte & TTE_SZ_MASK) >> TTE_SZ_SHIFT;
   1305 	pa = (pte & TTE_RPN_MASK(sz));
   1306 	th = (va & TLB_EPN_MASK) | (sz << TLB_SIZE_SHFT) | TLB_VALID;
   1307 	tl = (pte & ~TLB_RPN_MASK) | pa;
   1308 	tl |= ppc4xx_tlbflags(va, pa);
   1309 
   1310 	s = splhigh();
   1311 	idx = ppc4xx_tlb_find_victim();
   1312 
   1313 #ifdef DIAGNOSTIC
   1314 	if ((idx < TLB_NRESERVED) || (idx >= NTLB)) {
   1315 		panic("ppc4xx_tlb_enter: repacing entry %ld", idx);
   1316 	}
   1317 #endif
   1318 
   1319 	tlb_info[idx].ti_va = (va & TLB_EPN_MASK);
   1320 	tlb_info[idx].ti_ctx = ctx;
   1321 	tlb_info[idx].ti_flags = TLBF_USED | TLBF_REF;
   1322 
   1323 	asm volatile(
   1324 		"mfmsr %0;"			/* Save MSR */
   1325 		"li %1,0;"
   1326 		"tlbwe %1,%3,0;"		/* Invalidate old entry. */
   1327 		"mtmsr %1;"			/* Clear MSR */
   1328 		"mfpid %1;"			/* Save old PID */
   1329 		"mtpid %2;"			/* Load translation ctx */
   1330 		"sync; isync;"
   1331 #ifdef DEBUG
   1332 		"andi. %3,%3,63;"
   1333 		"tweqi %3,0;" 			/* XXXXX DEBUG trap on index 0 */
   1334 #endif
   1335 		"tlbwe %4,%3,1; tlbwe %5,%3,0;"	/* Set TLB */
   1336 		"sync; isync;"
   1337 		"mtpid %1; mtmsr %0;"		/* Restore PID and MSR */
   1338 		"sync; isync;"
   1339 	: "=&r" (msr), "=&r" (pid)
   1340 	: "r" (ctx), "r" (idx), "r" (tl), "r" (th));
   1341 	splx(s);
   1342 }
   1343 
   1344 void
   1345 ppc4xx_tlb_unpin(int i)
   1346 {
   1347 
   1348 	if (i == -1)
   1349 		for (i = 0; i < TLB_NRESERVED; i++)
   1350 			tlb_info[i].ti_flags &= ~TLBF_LOCKED;
   1351 	else
   1352 		tlb_info[i].ti_flags &= ~TLBF_LOCKED;
   1353 }
   1354 
   1355 void
   1356 ppc4xx_tlb_init(void)
   1357 {
   1358 	int i;
   1359 
   1360 	/* Mark reserved TLB entries */
   1361 	for (i = 0; i < TLB_NRESERVED; i++) {
   1362 		tlb_info[i].ti_flags = TLBF_LOCKED | TLBF_USED;
   1363 		tlb_info[i].ti_ctx = KERNEL_PID;
   1364 	}
   1365 
   1366 	/* Setup security zones */
   1367 	/* Z0 - accessible by kernel only if TLB entry permissions allow
   1368 	 * Z1,Z2 - access is controlled by TLB entry permissions
   1369 	 * Z3 - full access regardless of TLB entry permissions
   1370 	 */
   1371 
   1372 	asm volatile(
   1373 		"mtspr %0,%1;"
   1374 		"sync;"
   1375 		::  "K"(SPR_ZPR), "r" (0x1b000000));
   1376 }
   1377 
   1378 
   1379 /*
   1380  * We should pass the ctx in from trap code.
   1381  */
   1382 int
   1383 pmap_tlbmiss(vaddr_t va, int ctx)
   1384 {
   1385 	volatile u_int *pte;
   1386 	u_long tte;
   1387 
   1388 	tlbmiss_ev.ev_count++;
   1389 
   1390 	/*
   1391 	 * XXXX We will reserve 0-0x80000000 for va==pa mappings.
   1392 	 */
   1393 	if (ctx != KERNEL_PID || (va & 0x80000000)) {
   1394 		pte = pte_find((struct pmap *)ctxbusy[ctx], va);
   1395 		if (pte == NULL) {
   1396 			/* Map unmanaged addresses directly for kernel access */
   1397 			return 1;
   1398 		}
   1399 		tte = *pte;
   1400 		if (tte == 0) {
   1401 			return 1;
   1402 		}
   1403 	} else {
   1404 		/* Create a 16MB writable mapping. */
   1405 #ifdef PPC_4XX_NOCACHE
   1406 		tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_I | TTE_WR;
   1407 #else
   1408 		tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_WR;
   1409 #endif
   1410 	}
   1411 	tlbhit_ev.ev_count++;
   1412 	ppc4xx_tlb_enter(ctx, va, tte);
   1413 
   1414 	return 0;
   1415 }
   1416 
   1417 /*
   1418  * Flush all the entries matching a context from the TLB.
   1419  */
   1420 static int
   1421 ctx_flush(int cnum)
   1422 {
   1423 	int i;
   1424 
   1425 	/* We gotta steal this context */
   1426 	for (i = TLB_NRESERVED; i < NTLB; i++) {
   1427 		if (tlb_info[i].ti_ctx == cnum) {
   1428 			/* Can't steal ctx if it has a locked entry. */
   1429 			if (TLB_LOCKED(i)) {
   1430 #ifdef DIAGNOSTIC
   1431 				printf("ctx_flush: can't invalidate "
   1432 					"locked mapping %d "
   1433 					"for context %d\n", i, cnum);
   1434 #ifdef DDB
   1435 				Debugger();
   1436 #endif
   1437 #endif
   1438 				return (1);
   1439 			}
   1440 #ifdef DIAGNOSTIC
   1441 			if (i < TLB_NRESERVED)
   1442 				panic("TLB entry %d not locked", i);
   1443 #endif
   1444 			/* Invalidate particular TLB entry regardless of locked status */
   1445 			asm volatile("tlbwe %0,%1,0" : :"r"(0),"r"(i));
   1446 			tlb_info[i].ti_flags = 0;
   1447 		}
   1448 	}
   1449 	return (0);
   1450 }
   1451 
   1452 /*
   1453  * Allocate a context.  If necessary, steal one from someone else.
   1454  *
   1455  * The new context is flushed from the TLB before returning.
   1456  */
   1457 int
   1458 ctx_alloc(struct pmap *pm)
   1459 {
   1460 	int s, cnum;
   1461 	static int next = MINCTX;
   1462 
   1463 	if (pm == pmap_kernel()) {
   1464 #ifdef DIAGNOSTIC
   1465 		printf("ctx_alloc: kernel pmap!\n");
   1466 #endif
   1467 		return (0);
   1468 	}
   1469 	s = splvm();
   1470 
   1471 	/* Find a likely context. */
   1472 	cnum = next;
   1473 	do {
   1474 		if ((++cnum) > NUMCTX)
   1475 			cnum = MINCTX;
   1476 	} while (ctxbusy[cnum] != NULL && cnum != next);
   1477 
   1478 	/* Now clean it out */
   1479 oops:
   1480 	if (cnum < MINCTX)
   1481 		cnum = MINCTX; /* Never steal ctx 0 or 1 */
   1482 	if (ctx_flush(cnum)) {
   1483 		/* oops -- something's wired. */
   1484 		if ((++cnum) > NUMCTX)
   1485 			cnum = MINCTX;
   1486 		goto oops;
   1487 	}
   1488 
   1489 	if (ctxbusy[cnum]) {
   1490 #ifdef DEBUG
   1491 		/* We should identify this pmap and clear it */
   1492 		printf("Warning: stealing context %d\n", cnum);
   1493 #endif
   1494 		ctxbusy[cnum]->pm_ctx = 0;
   1495 	}
   1496 	ctxbusy[cnum] = pm;
   1497 	next = cnum;
   1498 	splx(s);
   1499 	pm->pm_ctx = cnum;
   1500 
   1501 	return cnum;
   1502 }
   1503 
   1504 /*
   1505  * Give away a context.
   1506  */
   1507 void
   1508 ctx_free(struct pmap *pm)
   1509 {
   1510 	int oldctx;
   1511 
   1512 	oldctx = pm->pm_ctx;
   1513 
   1514 	if (oldctx == 0)
   1515 		panic("ctx_free: freeing kernel context");
   1516 #ifdef DIAGNOSTIC
   1517 	if (ctxbusy[oldctx] == 0)
   1518 		printf("ctx_free: freeing free context %d\n", oldctx);
   1519 	if (ctxbusy[oldctx] != pm) {
   1520 		printf("ctx_free: freeing someone esle's context\n "
   1521 		       "ctxbusy[%d] = %p, pm->pm_ctx = %p\n",
   1522 		       oldctx, (void *)(u_long)ctxbusy[oldctx], pm);
   1523 #ifdef DDB
   1524 		Debugger();
   1525 #endif
   1526 	}
   1527 #endif
   1528 	/* We should verify it has not been stolen and reallocated... */
   1529 	ctxbusy[oldctx] = NULL;
   1530 	ctx_flush(oldctx);
   1531 }
   1532 
   1533 
   1534 #ifdef DEBUG
   1535 /*
   1536  * Test ref/modify handling.
   1537  */
   1538 void pmap_testout __P((void));
   1539 void
   1540 pmap_testout()
   1541 {
   1542 	vaddr_t va;
   1543 	volatile int *loc;
   1544 	int val = 0;
   1545 	paddr_t pa;
   1546 	struct vm_page *pg;
   1547 	int ref, mod;
   1548 
   1549 	/* Allocate a page */
   1550 	va = (vaddr_t)uvm_km_alloc1(kernel_map, PAGE_SIZE, 1);
   1551 	loc = (int*)va;
   1552 
   1553 	pmap_extract(pmap_kernel(), va, &pa);
   1554 	pg = PHYS_TO_VM_PAGE(pa);
   1555 	pmap_unwire(pmap_kernel(), va);
   1556 
   1557 	pmap_remove(pmap_kernel(), va, va+1);
   1558 	pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
   1559 	pmap_update(pmap_kernel());
   1560 
   1561 	/* Now clear reference and modify */
   1562 	ref = pmap_clear_reference(pg);
   1563 	mod = pmap_clear_modify(pg);
   1564 	printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
   1565 	       (void *)(u_long)va, (long)pa,
   1566 	       ref, mod);
   1567 
   1568 	/* Check it's properly cleared */
   1569 	ref = pmap_is_referenced(pg);
   1570 	mod = pmap_is_modified(pg);
   1571 	printf("Checking cleared page: ref %d, mod %d\n",
   1572 	       ref, mod);
   1573 
   1574 	/* Reference page */
   1575 	val = *loc;
   1576 
   1577 	ref = pmap_is_referenced(pg);
   1578 	mod = pmap_is_modified(pg);
   1579 	printf("Referenced page: ref %d, mod %d val %x\n",
   1580 	       ref, mod, val);
   1581 
   1582 	/* Now clear reference and modify */
   1583 	ref = pmap_clear_reference(pg);
   1584 	mod = pmap_clear_modify(pg);
   1585 	printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
   1586 	       (void *)(u_long)va, (long)pa,
   1587 	       ref, mod);
   1588 
   1589 	/* Modify page */
   1590 	*loc = 1;
   1591 
   1592 	ref = pmap_is_referenced(pg);
   1593 	mod = pmap_is_modified(pg);
   1594 	printf("Modified page: ref %d, mod %d\n",
   1595 	       ref, mod);
   1596 
   1597 	/* Now clear reference and modify */
   1598 	ref = pmap_clear_reference(pg);
   1599 	mod = pmap_clear_modify(pg);
   1600 	printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
   1601 	       (void *)(u_long)va, (long)pa,
   1602 	       ref, mod);
   1603 
   1604 	/* Check it's properly cleared */
   1605 	ref = pmap_is_referenced(pg);
   1606 	mod = pmap_is_modified(pg);
   1607 	printf("Checking cleared page: ref %d, mod %d\n",
   1608 	       ref, mod);
   1609 
   1610 	/* Modify page */
   1611 	*loc = 1;
   1612 
   1613 	ref = pmap_is_referenced(pg);
   1614 	mod = pmap_is_modified(pg);
   1615 	printf("Modified page: ref %d, mod %d\n",
   1616 	       ref, mod);
   1617 
   1618 	/* Check pmap_protect() */
   1619 	pmap_protect(pmap_kernel(), va, va+1, VM_PROT_READ);
   1620 	pmap_update(pmap_kernel());
   1621 	ref = pmap_is_referenced(pg);
   1622 	mod = pmap_is_modified(pg);
   1623 	printf("pmap_protect(VM_PROT_READ): ref %d, mod %d\n",
   1624 	       ref, mod);
   1625 
   1626 	/* Now clear reference and modify */
   1627 	ref = pmap_clear_reference(pg);
   1628 	mod = pmap_clear_modify(pg);
   1629 	printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
   1630 	       (void *)(u_long)va, (long)pa,
   1631 	       ref, mod);
   1632 
   1633 	/* Reference page */
   1634 	val = *loc;
   1635 
   1636 	ref = pmap_is_referenced(pg);
   1637 	mod = pmap_is_modified(pg);
   1638 	printf("Referenced page: ref %d, mod %d val %x\n",
   1639 	       ref, mod, val);
   1640 
   1641 	/* Now clear reference and modify */
   1642 	ref = pmap_clear_reference(pg);
   1643 	mod = pmap_clear_modify(pg);
   1644 	printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
   1645 	       (void *)(u_long)va, (long)pa,
   1646 	       ref, mod);
   1647 
   1648 	/* Modify page */
   1649 #if 0
   1650 	pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
   1651 	pmap_update(pmap_kernel());
   1652 #endif
   1653 	*loc = 1;
   1654 
   1655 	ref = pmap_is_referenced(pg);
   1656 	mod = pmap_is_modified(pg);
   1657 	printf("Modified page: ref %d, mod %d\n",
   1658 	       ref, mod);
   1659 
   1660 	/* Check pmap_protect() */
   1661 	pmap_protect(pmap_kernel(), va, va+1, VM_PROT_NONE);
   1662 	pmap_update(pmap_kernel());
   1663 	ref = pmap_is_referenced(pg);
   1664 	mod = pmap_is_modified(pg);
   1665 	printf("pmap_protect(): ref %d, mod %d\n",
   1666 	       ref, mod);
   1667 
   1668 	/* Now clear reference and modify */
   1669 	ref = pmap_clear_reference(pg);
   1670 	mod = pmap_clear_modify(pg);
   1671 	printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
   1672 	       (void *)(u_long)va, (long)pa,
   1673 	       ref, mod);
   1674 
   1675 	/* Reference page */
   1676 	val = *loc;
   1677 
   1678 	ref = pmap_is_referenced(pg);
   1679 	mod = pmap_is_modified(pg);
   1680 	printf("Referenced page: ref %d, mod %d val %x\n",
   1681 	       ref, mod, val);
   1682 
   1683 	/* Now clear reference and modify */
   1684 	ref = pmap_clear_reference(pg);
   1685 	mod = pmap_clear_modify(pg);
   1686 	printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
   1687 	       (void *)(u_long)va, (long)pa,
   1688 	       ref, mod);
   1689 
   1690 	/* Modify page */
   1691 #if 0
   1692 	pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
   1693 	pmap_update(pmap_kernel());
   1694 #endif
   1695 	*loc = 1;
   1696 
   1697 	ref = pmap_is_referenced(pg);
   1698 	mod = pmap_is_modified(pg);
   1699 	printf("Modified page: ref %d, mod %d\n",
   1700 	       ref, mod);
   1701 
   1702 	/* Check pmap_pag_protect() */
   1703 	pmap_page_protect(pg, VM_PROT_READ);
   1704 	ref = pmap_is_referenced(pg);
   1705 	mod = pmap_is_modified(pg);
   1706 	printf("pmap_page_protect(VM_PROT_READ): ref %d, mod %d\n",
   1707 	       ref, mod);
   1708 
   1709 	/* Now clear reference and modify */
   1710 	ref = pmap_clear_reference(pg);
   1711 	mod = pmap_clear_modify(pg);
   1712 	printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
   1713 	       (void *)(u_long)va, (long)pa,
   1714 	       ref, mod);
   1715 
   1716 	/* Reference page */
   1717 	val = *loc;
   1718 
   1719 	ref = pmap_is_referenced(pg);
   1720 	mod = pmap_is_modified(pg);
   1721 	printf("Referenced page: ref %d, mod %d val %x\n",
   1722 	       ref, mod, val);
   1723 
   1724 	/* Now clear reference and modify */
   1725 	ref = pmap_clear_reference(pg);
   1726 	mod = pmap_clear_modify(pg);
   1727 	printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
   1728 	       (void *)(u_long)va, (long)pa,
   1729 	       ref, mod);
   1730 
   1731 	/* Modify page */
   1732 #if 0
   1733 	pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
   1734 	pmap_update(pmap_kernel());
   1735 #endif
   1736 	*loc = 1;
   1737 
   1738 	ref = pmap_is_referenced(pg);
   1739 	mod = pmap_is_modified(pg);
   1740 	printf("Modified page: ref %d, mod %d\n",
   1741 	       ref, mod);
   1742 
   1743 	/* Check pmap_pag_protect() */
   1744 	pmap_page_protect(pg, VM_PROT_NONE);
   1745 	ref = pmap_is_referenced(pg);
   1746 	mod = pmap_is_modified(pg);
   1747 	printf("pmap_page_protect(): ref %d, mod %d\n",
   1748 	       ref, mod);
   1749 
   1750 	/* Now clear reference and modify */
   1751 	ref = pmap_clear_reference(pg);
   1752 	mod = pmap_clear_modify(pg);
   1753 	printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
   1754 	       (void *)(u_long)va, (long)pa,
   1755 	       ref, mod);
   1756 
   1757 
   1758 	/* Reference page */
   1759 	val = *loc;
   1760 
   1761 	ref = pmap_is_referenced(pg);
   1762 	mod = pmap_is_modified(pg);
   1763 	printf("Referenced page: ref %d, mod %d val %x\n",
   1764 	       ref, mod, val);
   1765 
   1766 	/* Now clear reference and modify */
   1767 	ref = pmap_clear_reference(pg);
   1768 	mod = pmap_clear_modify(pg);
   1769 	printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
   1770 	       (void *)(u_long)va, (long)pa,
   1771 	       ref, mod);
   1772 
   1773 	/* Modify page */
   1774 #if 0
   1775 	pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
   1776 	pmap_update(pmap_kernel());
   1777 #endif
   1778 	*loc = 1;
   1779 
   1780 	ref = pmap_is_referenced(pg);
   1781 	mod = pmap_is_modified(pg);
   1782 	printf("Modified page: ref %d, mod %d\n",
   1783 	       ref, mod);
   1784 
   1785 	/* Unmap page */
   1786 	pmap_remove(pmap_kernel(), va, va+1);
   1787 	pmap_update(pmap_kernel());
   1788 	ref = pmap_is_referenced(pg);
   1789 	mod = pmap_is_modified(pg);
   1790 	printf("Unmapped page: ref %d, mod %d\n", ref, mod);
   1791 
   1792 	/* Now clear reference and modify */
   1793 	ref = pmap_clear_reference(pg);
   1794 	mod = pmap_clear_modify(pg);
   1795 	printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
   1796 	       (void *)(u_long)va, (long)pa, ref, mod);
   1797 
   1798 	/* Check it's properly cleared */
   1799 	ref = pmap_is_referenced(pg);
   1800 	mod = pmap_is_modified(pg);
   1801 	printf("Checking cleared page: ref %d, mod %d\n",
   1802 	       ref, mod);
   1803 
   1804 	pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL,
   1805 		VM_PROT_ALL|PMAP_WIRED);
   1806 	uvm_km_free(kernel_map, (vaddr_t)va, PAGE_SIZE);
   1807 }
   1808 #endif
   1809