pmap.c revision 1.30.2.1 1 /* $NetBSD: pmap.c,v 1.30.2.1 2005/01/28 13:52:18 yamt Exp $ */
2
3 /*
4 * Copyright 2001 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
40 * Copyright (C) 1995, 1996 TooLs GmbH.
41 * All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by TooLs GmbH.
54 * 4. The name of TooLs GmbH may not be used to endorse or promote products
55 * derived from this software without specific prior written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
62 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
64 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
65 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 */
68
69 #include <sys/cdefs.h>
70 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.30.2.1 2005/01/28 13:52:18 yamt Exp $");
71
72 #include <sys/param.h>
73 #include <sys/malloc.h>
74 #include <sys/proc.h>
75 #include <sys/user.h>
76 #include <sys/queue.h>
77 #include <sys/systm.h>
78 #include <sys/pool.h>
79 #include <sys/device.h>
80
81 #include <uvm/uvm.h>
82
83 #include <machine/cpu.h>
84 #include <machine/pcb.h>
85 #include <machine/powerpc.h>
86
87 #include <powerpc/spr.h>
88 #include <machine/tlb.h>
89
90 /*
91 * kernmap is an array of PTEs large enough to map in
92 * 4GB. At 16KB/page it is 256K entries or 2MB.
93 */
94 #define KERNMAP_SIZE ((0xffffffffU/PAGE_SIZE)+1)
95 caddr_t kernmap;
96
97 #define MINCTX 2
98 #define NUMCTX 256
99 volatile struct pmap *ctxbusy[NUMCTX];
100
101 #define TLBF_USED 0x1
102 #define TLBF_REF 0x2
103 #define TLBF_LOCKED 0x4
104 #define TLB_LOCKED(i) (tlb_info[(i)].ti_flags & TLBF_LOCKED)
105 typedef struct tlb_info_s {
106 char ti_flags;
107 char ti_ctx; /* TLB_PID assiciated with the entry */
108 u_int ti_va;
109 } tlb_info_t;
110
111 volatile tlb_info_t tlb_info[NTLB];
112 /* We'll use a modified FIFO replacement policy cause it's cheap */
113 volatile int tlbnext = TLB_NRESERVED;
114
115 u_long dtlb_miss_count = 0;
116 u_long itlb_miss_count = 0;
117 u_long ktlb_miss_count = 0;
118 u_long utlb_miss_count = 0;
119
120 /* Event counters */
121 struct evcnt tlbmiss_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
122 NULL, "cpu", "tlbmiss");
123 struct evcnt tlbhit_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
124 NULL, "cpu", "tlbhit");
125 struct evcnt tlbflush_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
126 NULL, "cpu", "tlbflush");
127 struct evcnt tlbenter_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
128 NULL, "cpu", "tlbenter");
129
130 struct pmap kernel_pmap_;
131
132 int physmem;
133 static int npgs;
134 static u_int nextavail;
135 #ifndef MSGBUFADDR
136 extern paddr_t msgbuf_paddr;
137 #endif
138
139 static struct mem_region *mem, *avail;
140
141 /*
142 * This is a cache of referenced/modified bits.
143 * Bits herein are shifted by ATTRSHFT.
144 */
145 static char *pmap_attrib;
146
147 #define PV_WIRED 0x1
148 #define PV_WIRE(pv) ((pv)->pv_va |= PV_WIRED)
149 #define PV_UNWIRE(pv) ((pv)->pv_va &= ~PV_WIRED)
150 #define PV_ISWIRED(pv) ((pv)->pv_va & PV_WIRED)
151 #define PV_CMPVA(va,pv) (!(((pv)->pv_va ^ (va)) & (~PV_WIRED)))
152
153 struct pv_entry {
154 struct pv_entry *pv_next; /* Linked list of mappings */
155 vaddr_t pv_va; /* virtual address of mapping */
156 struct pmap *pv_pm;
157 };
158
159 struct pv_entry *pv_table;
160 static struct pool pv_pool;
161
162 static int pmap_initialized;
163
164 static int ctx_flush(int);
165
166 inline struct pv_entry *pa_to_pv(paddr_t);
167 static inline char *pa_to_attr(paddr_t);
168
169 static inline volatile u_int *pte_find(struct pmap *, vaddr_t);
170 static inline int pte_enter(struct pmap *, vaddr_t, u_int);
171
172 static inline int pmap_enter_pv(struct pmap *, vaddr_t, paddr_t, boolean_t);
173 static void pmap_remove_pv(struct pmap *, vaddr_t, paddr_t);
174
175
176 inline struct pv_entry *
177 pa_to_pv(paddr_t pa)
178 {
179 int bank, pg;
180
181 bank = vm_physseg_find(atop(pa), &pg);
182 if (bank == -1)
183 return NULL;
184 return &vm_physmem[bank].pmseg.pvent[pg];
185 }
186
187 static inline char *
188 pa_to_attr(paddr_t pa)
189 {
190 int bank, pg;
191
192 bank = vm_physseg_find(atop(pa), &pg);
193 if (bank == -1)
194 return NULL;
195 return &vm_physmem[bank].pmseg.attrs[pg];
196 }
197
198 /*
199 * Insert PTE into page table.
200 */
201 int
202 pte_enter(struct pmap *pm, vaddr_t va, u_int pte)
203 {
204 int seg = STIDX(va);
205 int ptn = PTIDX(va);
206 u_int oldpte;
207
208 if (!pm->pm_ptbl[seg]) {
209 /* Don't allocate a page to clear a non-existent mapping. */
210 if (!pte)
211 return (0);
212 /* Allocate a page XXXX this will sleep! */
213 pm->pm_ptbl[seg] =
214 (uint *)uvm_km_alloc(kernel_map, PAGE_SIZE, 0,
215 UVM_KMF_WIRED | UVM_KMF_ZERO);
216 }
217 oldpte = pm->pm_ptbl[seg][ptn];
218 pm->pm_ptbl[seg][ptn] = pte;
219
220 /* Flush entry. */
221 ppc4xx_tlb_flush(va, pm->pm_ctx);
222 if (oldpte != pte) {
223 if (pte == 0)
224 pm->pm_stats.resident_count--;
225 else
226 pm->pm_stats.resident_count++;
227 }
228 return (1);
229 }
230
231 /*
232 * Get a pointer to a PTE in a page table.
233 */
234 volatile u_int *
235 pte_find(struct pmap *pm, vaddr_t va)
236 {
237 int seg = STIDX(va);
238 int ptn = PTIDX(va);
239
240 if (pm->pm_ptbl[seg])
241 return (&pm->pm_ptbl[seg][ptn]);
242
243 return (NULL);
244 }
245
246 /*
247 * This is called during initppc, before the system is really initialized.
248 */
249 void
250 pmap_bootstrap(u_int kernelstart, u_int kernelend)
251 {
252 struct mem_region *mp, *mp1;
253 int cnt, i;
254 u_int s, e, sz;
255
256 /*
257 * Allocate the kernel page table at the end of
258 * kernel space so it's in the locked TTE.
259 */
260 kernmap = (caddr_t)kernelend;
261
262 /*
263 * Initialize kernel page table.
264 */
265 for (i = 0; i < STSZ; i++) {
266 pmap_kernel()->pm_ptbl[i] = 0;
267 }
268 ctxbusy[0] = ctxbusy[1] = pmap_kernel();
269
270 /*
271 * Announce page-size to the VM-system
272 */
273 uvmexp.pagesize = NBPG;
274 uvm_setpagesize();
275
276 /*
277 * Get memory.
278 */
279 mem_regions(&mem, &avail);
280 for (mp = mem; mp->size; mp++) {
281 physmem += btoc(mp->size);
282 printf("+%lx,",mp->size);
283 }
284 printf("\n");
285 ppc4xx_tlb_init();
286 /*
287 * Count the number of available entries.
288 */
289 for (cnt = 0, mp = avail; mp->size; mp++)
290 cnt++;
291
292 /*
293 * Page align all regions.
294 * Non-page aligned memory isn't very interesting to us.
295 * Also, sort the entries for ascending addresses.
296 */
297 kernelstart &= ~PGOFSET;
298 kernelend = (kernelend + PGOFSET) & ~PGOFSET;
299 for (mp = avail; mp->size; mp++) {
300 s = mp->start;
301 e = mp->start + mp->size;
302 printf("%08x-%08x -> ",s,e);
303 /*
304 * Check whether this region holds all of the kernel.
305 */
306 if (s < kernelstart && e > kernelend) {
307 avail[cnt].start = kernelend;
308 avail[cnt++].size = e - kernelend;
309 e = kernelstart;
310 }
311 /*
312 * Look whether this regions starts within the kernel.
313 */
314 if (s >= kernelstart && s < kernelend) {
315 if (e <= kernelend)
316 goto empty;
317 s = kernelend;
318 }
319 /*
320 * Now look whether this region ends within the kernel.
321 */
322 if (e > kernelstart && e <= kernelend) {
323 if (s >= kernelstart)
324 goto empty;
325 e = kernelstart;
326 }
327 /*
328 * Now page align the start and size of the region.
329 */
330 s = round_page(s);
331 e = trunc_page(e);
332 if (e < s)
333 e = s;
334 sz = e - s;
335 printf("%08x-%08x = %x\n",s,e,sz);
336 /*
337 * Check whether some memory is left here.
338 */
339 if (sz == 0) {
340 empty:
341 memmove(mp, mp + 1,
342 (cnt - (mp - avail)) * sizeof *mp);
343 cnt--;
344 mp--;
345 continue;
346 }
347 /*
348 * Do an insertion sort.
349 */
350 npgs += btoc(sz);
351 for (mp1 = avail; mp1 < mp; mp1++)
352 if (s < mp1->start)
353 break;
354 if (mp1 < mp) {
355 memmove(mp1 + 1, mp1, (char *)mp - (char *)mp1);
356 mp1->start = s;
357 mp1->size = sz;
358 } else {
359 mp->start = s;
360 mp->size = sz;
361 }
362 }
363
364 /*
365 * We cannot do pmap_steal_memory here,
366 * since we don't run with translation enabled yet.
367 */
368 #ifndef MSGBUFADDR
369 /*
370 * allow for msgbuf
371 */
372 sz = round_page(MSGBUFSIZE);
373 mp = NULL;
374 for (mp1 = avail; mp1->size; mp1++)
375 if (mp1->size >= sz)
376 mp = mp1;
377 if (mp == NULL)
378 panic("not enough memory?");
379
380 npgs -= btoc(sz);
381 msgbuf_paddr = mp->start + mp->size - sz;
382 mp->size -= sz;
383 if (mp->size <= 0)
384 memmove(mp, mp + 1, (cnt - (mp - avail)) * sizeof *mp);
385 #endif
386
387 for (mp = avail; mp->size; mp++)
388 uvm_page_physload(atop(mp->start), atop(mp->start + mp->size),
389 atop(mp->start), atop(mp->start + mp->size),
390 VM_FREELIST_DEFAULT);
391
392 /*
393 * Initialize kernel pmap and hardware.
394 */
395 /* Setup TLB pid allocator so it knows we alreadu using PID 1 */
396 pmap_kernel()->pm_ctx = KERNEL_PID;
397 nextavail = avail->start;
398
399
400 evcnt_attach_static(&tlbmiss_ev);
401 evcnt_attach_static(&tlbhit_ev);
402 evcnt_attach_static(&tlbflush_ev);
403 evcnt_attach_static(&tlbenter_ev);
404 }
405
406 /*
407 * Restrict given range to physical memory
408 *
409 * (Used by /dev/mem)
410 */
411 void
412 pmap_real_memory(paddr_t *start, psize_t *size)
413 {
414 struct mem_region *mp;
415
416 for (mp = mem; mp->size; mp++) {
417 if (*start + *size > mp->start &&
418 *start < mp->start + mp->size) {
419 if (*start < mp->start) {
420 *size -= mp->start - *start;
421 *start = mp->start;
422 }
423 if (*start + *size > mp->start + mp->size)
424 *size = mp->start + mp->size - *start;
425 return;
426 }
427 }
428 *size = 0;
429 }
430
431 /*
432 * Initialize anything else for pmap handling.
433 * Called during vm_init().
434 */
435 void
436 pmap_init(void)
437 {
438 struct pv_entry *pv;
439 vsize_t sz;
440 vaddr_t addr;
441 int i, s;
442 int bank;
443 char *attr;
444
445 sz = (vsize_t)((sizeof(struct pv_entry) + 1) * npgs);
446 sz = round_page(sz);
447 addr = uvm_km_alloc(kernel_map, sz, 0, UVM_KMF_WIRED | UVM_KMF_ZERO);
448 s = splvm();
449 pv = pv_table = (struct pv_entry *)addr;
450 for (i = npgs; --i >= 0;)
451 pv++->pv_pm = NULL;
452 pmap_attrib = (char *)pv;
453 memset(pv, 0, npgs);
454
455 pv = pv_table;
456 attr = pmap_attrib;
457 for (bank = 0; bank < vm_nphysseg; bank++) {
458 sz = vm_physmem[bank].end - vm_physmem[bank].start;
459 vm_physmem[bank].pmseg.pvent = pv;
460 vm_physmem[bank].pmseg.attrs = attr;
461 pv += sz;
462 attr += sz;
463 }
464
465 pmap_initialized = 1;
466 splx(s);
467
468 /* Setup a pool for additional pvlist structures */
469 pool_init(&pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pv_entry", NULL);
470 }
471
472 /*
473 * How much virtual space is available to the kernel?
474 */
475 void
476 pmap_virtual_space(vaddr_t *start, vaddr_t *end)
477 {
478
479 #if 0
480 /*
481 * Reserve one segment for kernel virtual memory
482 */
483 *start = (vaddr_t)(KERNEL_SR << ADDR_SR_SHFT);
484 *end = *start + SEGMENT_LENGTH;
485 #else
486 *start = (vaddr_t) VM_MIN_KERNEL_ADDRESS;
487 *end = (vaddr_t) VM_MAX_KERNEL_ADDRESS;
488 #endif
489 }
490
491 #ifdef PMAP_GROWKERNEL
492 /*
493 * Preallocate kernel page tables to a specified VA.
494 * This simply loops through the first TTE for each
495 * page table from the beginning of the kernel pmap,
496 * reads the entry, and if the result is
497 * zero (either invalid entry or no page table) it stores
498 * a zero there, populating page tables in the process.
499 * This is not the most efficient technique but i don't
500 * expect it to be called that often.
501 */
502 extern struct vm_page *vm_page_alloc1 __P((void));
503 extern void vm_page_free1 __P((struct vm_page *));
504
505 vaddr_t kbreak = VM_MIN_KERNEL_ADDRESS;
506
507 vaddr_t
508 pmap_growkernel(vaddr_t maxkvaddr)
509 {
510 int s;
511 int seg;
512 paddr_t pg;
513 struct pmap *pm = pmap_kernel();
514
515 s = splvm();
516
517 /* Align with the start of a page table */
518 for (kbreak &= ~(PTMAP-1); kbreak < maxkvaddr;
519 kbreak += PTMAP) {
520 seg = STIDX(kbreak);
521
522 if (pte_find(pm, kbreak))
523 continue;
524
525 if (uvm.page_init_done) {
526 pg = (paddr_t)VM_PAGE_TO_PHYS(vm_page_alloc1());
527 } else {
528 if (!uvm_page_physget(&pg))
529 panic("pmap_growkernel: no memory");
530 }
531 if (!pg) panic("pmap_growkernel: no pages");
532 pmap_zero_page((paddr_t)pg);
533
534 /* XXX This is based on all phymem being addressable */
535 pm->pm_ptbl[seg] = (u_int *)pg;
536 }
537 splx(s);
538 return (kbreak);
539 }
540
541 /*
542 * vm_page_alloc1:
543 *
544 * Allocate and return a memory cell with no associated object.
545 */
546 struct vm_page *
547 vm_page_alloc1(void)
548 {
549 struct vm_page *pg;
550
551 pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_USERESERVE);
552 if (pg) {
553 pg->wire_count = 1; /* no mappings yet */
554 pg->flags &= ~PG_BUSY; /* never busy */
555 }
556 return pg;
557 }
558
559 /*
560 * vm_page_free1:
561 *
562 * Returns the given page to the free list,
563 * disassociating it with any VM object.
564 *
565 * Object and page must be locked prior to entry.
566 */
567 void
568 vm_page_free1(struct vm_page *mem)
569 {
570 #ifdef DIAGNOSTIC
571 if (mem->flags != (PG_CLEAN|PG_FAKE)) {
572 printf("Freeing invalid page %p\n", mem);
573 printf("pa = %llx\n", (unsigned long long)VM_PAGE_TO_PHYS(mem));
574 #ifdef DDB
575 Debugger();
576 #endif
577 return;
578 }
579 #endif
580 mem->flags |= PG_BUSY;
581 mem->wire_count = 0;
582 uvm_pagefree(mem);
583 }
584 #endif
585
586 /*
587 * Create and return a physical map.
588 */
589 struct pmap *
590 pmap_create(void)
591 {
592 struct pmap *pm;
593
594 pm = malloc(sizeof *pm, M_VMPMAP, M_WAITOK);
595 memset(pm, 0, sizeof *pm);
596 pm->pm_refs = 1;
597 return pm;
598 }
599
600 /*
601 * Add a reference to the given pmap.
602 */
603 void
604 pmap_reference(struct pmap *pm)
605 {
606
607 pm->pm_refs++;
608 }
609
610 /*
611 * Retire the given pmap from service.
612 * Should only be called if the map contains no valid mappings.
613 */
614 void
615 pmap_destroy(struct pmap *pm)
616 {
617 int i;
618
619 if (--pm->pm_refs > 0) {
620 return;
621 }
622 KASSERT(pm->pm_stats.resident_count == 0);
623 KASSERT(pm->pm_stats.wired_count == 0);
624 for (i = 0; i < STSZ; i++)
625 if (pm->pm_ptbl[i]) {
626 uvm_km_free(kernel_map, (vaddr_t)pm->pm_ptbl[i],
627 PAGE_SIZE, UVM_KMF_WIRED);
628 pm->pm_ptbl[i] = NULL;
629 }
630 if (pm->pm_ctx)
631 ctx_free(pm);
632 free(pm, M_VMPMAP);
633 }
634
635 /*
636 * Copy the range specified by src_addr/len
637 * from the source map to the range dst_addr/len
638 * in the destination map.
639 *
640 * This routine is only advisory and need not do anything.
641 */
642 void
643 pmap_copy(struct pmap *dst_pmap, struct pmap *src_pmap, vaddr_t dst_addr,
644 vsize_t len, vaddr_t src_addr)
645 {
646 }
647
648 /*
649 * Require that all active physical maps contain no
650 * incorrect entries NOW.
651 */
652 void
653 pmap_update(struct pmap *pmap)
654 {
655 }
656
657 /*
658 * Garbage collects the physical map system for
659 * pages which are no longer used.
660 * Success need not be guaranteed -- that is, there
661 * may well be pages which are not referenced, but
662 * others may be collected.
663 * Called by the pageout daemon when pages are scarce.
664 */
665 void
666 pmap_collect(struct pmap *pm)
667 {
668 }
669
670 /*
671 * Fill the given physical page with zeroes.
672 */
673 void
674 pmap_zero_page(paddr_t pa)
675 {
676
677 #ifdef PPC_4XX_NOCACHE
678 memset((caddr_t)pa, 0, PAGE_SIZE);
679 #else
680 int i;
681
682 for (i = PAGE_SIZE/CACHELINESIZE; i > 0; i--) {
683 __asm __volatile ("dcbz 0,%0" :: "r"(pa));
684 pa += CACHELINESIZE;
685 }
686 #endif
687 }
688
689 /*
690 * Copy the given physical source page to its destination.
691 */
692 void
693 pmap_copy_page(paddr_t src, paddr_t dst)
694 {
695
696 memcpy((caddr_t)dst, (caddr_t)src, PAGE_SIZE);
697 dcache_flush_page(dst);
698 }
699
700 /*
701 * This returns whether this is the first mapping of a page.
702 */
703 static inline int
704 pmap_enter_pv(struct pmap *pm, vaddr_t va, paddr_t pa, boolean_t wired)
705 {
706 struct pv_entry *pv, *npv = NULL;
707 int s;
708
709 if (!pmap_initialized)
710 return 0;
711
712 s = splvm();
713 pv = pa_to_pv(pa);
714 if (!pv->pv_pm) {
715 /*
716 * No entries yet, use header as the first entry.
717 */
718 pv->pv_va = va;
719 pv->pv_pm = pm;
720 pv->pv_next = NULL;
721 } else {
722 /*
723 * There is at least one other VA mapping this page.
724 * Place this entry after the header.
725 */
726 npv = pool_get(&pv_pool, PR_WAITOK);
727 npv->pv_va = va;
728 npv->pv_pm = pm;
729 npv->pv_next = pv->pv_next;
730 pv->pv_next = npv;
731 }
732 if (wired) {
733 PV_WIRE(pv);
734 }
735 splx(s);
736 return (1);
737 }
738
739 static void
740 pmap_remove_pv(struct pmap *pm, vaddr_t va, paddr_t pa)
741 {
742 struct pv_entry *pv, *npv;
743
744 /*
745 * Remove from the PV table.
746 */
747 pv = pa_to_pv(pa);
748 if (!pv)
749 return;
750
751 /*
752 * If it is the first entry on the list, it is actually
753 * in the header and we must copy the following entry up
754 * to the header. Otherwise we must search the list for
755 * the entry. In either case we free the now unused entry.
756 */
757 if (pm == pv->pv_pm && PV_CMPVA(va, pv)) {
758 if (PV_ISWIRED(pv)) {
759 pm->pm_stats.wired_count--;
760 }
761 if ((npv = pv->pv_next)) {
762 *pv = *npv;
763 pool_put(&pv_pool, npv);
764 } else
765 pv->pv_pm = NULL;
766 } else {
767 for (; (npv = pv->pv_next) != NULL; pv = npv)
768 if (pm == npv->pv_pm && PV_CMPVA(va, npv))
769 break;
770 if (npv) {
771 pv->pv_next = npv->pv_next;
772 if (PV_ISWIRED(npv)) {
773 pm->pm_stats.wired_count--;
774 }
775 pool_put(&pv_pool, npv);
776 }
777 }
778 }
779
780 /*
781 * Insert physical page at pa into the given pmap at virtual address va.
782 */
783 int
784 pmap_enter(struct pmap *pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags)
785 {
786 int s;
787 u_int tte;
788 int managed;
789
790 /*
791 * Have to remove any existing mapping first.
792 */
793 pmap_remove(pm, va, va + PAGE_SIZE);
794
795 if (flags & PMAP_WIRED)
796 flags |= prot;
797
798 managed = 0;
799 if (vm_physseg_find(atop(pa), NULL) != -1)
800 managed = 1;
801
802 /*
803 * Generate TTE.
804 */
805 tte = TTE_PA(pa);
806 /* XXXX -- need to support multiple page sizes. */
807 tte |= TTE_SZ_16K;
808 #ifdef DIAGNOSTIC
809 if ((flags & (PME_NOCACHE | PME_WRITETHROUG)) ==
810 (PME_NOCACHE | PME_WRITETHROUG))
811 panic("pmap_enter: uncached & writethrough");
812 #endif
813 if (flags & PME_NOCACHE)
814 /* Must be I/O mapping */
815 tte |= TTE_I | TTE_G;
816 #ifdef PPC_4XX_NOCACHE
817 tte |= TTE_I;
818 #else
819 else if (flags & PME_WRITETHROUG)
820 /* Uncached and writethrough are not compatible */
821 tte |= TTE_W;
822 #endif
823 if (pm == pmap_kernel())
824 tte |= TTE_ZONE(ZONE_PRIV);
825 else
826 tte |= TTE_ZONE(ZONE_USER);
827
828 if (flags & VM_PROT_WRITE)
829 tte |= TTE_WR;
830
831 if (flags & VM_PROT_EXECUTE)
832 tte |= TTE_EX;
833
834 /*
835 * Now record mapping for later back-translation.
836 */
837 if (pmap_initialized && managed) {
838 char *attr;
839
840 if (!pmap_enter_pv(pm, va, pa, flags & PMAP_WIRED)) {
841 /* Could not enter pv on a managed page */
842 return 1;
843 }
844
845 /* Now set attributes. */
846 attr = pa_to_attr(pa);
847 #ifdef DIAGNOSTIC
848 if (!attr)
849 panic("managed but no attr");
850 #endif
851 if (flags & VM_PROT_ALL)
852 *attr |= PMAP_ATTR_REF;
853 if (flags & VM_PROT_WRITE)
854 *attr |= PMAP_ATTR_CHG;
855 }
856
857 s = splvm();
858
859 /* Insert page into page table. */
860 pte_enter(pm, va, tte);
861
862 /* If this is a real fault, enter it in the tlb */
863 if (tte && ((flags & PMAP_WIRED) == 0)) {
864 ppc4xx_tlb_enter(pm->pm_ctx, va, tte);
865 }
866 splx(s);
867
868 /* Flush the real memory from the instruction cache. */
869 if ((prot & VM_PROT_EXECUTE) && (tte & TTE_I) == 0)
870 __syncicache((void *)pa, PAGE_SIZE);
871
872 if (flags & PMAP_WIRED)
873 pm->pm_stats.wired_count++;
874
875 return 0;
876 }
877
878 void
879 pmap_unwire(struct pmap *pm, vaddr_t va)
880 {
881 struct pv_entry *pv, *npv;
882 paddr_t pa;
883 int s;
884
885 if (!pmap_extract(pm, va, &pa)) {
886 return;
887 }
888
889 pv = pa_to_pv(pa);
890 if (!pv)
891 return;
892
893 /*
894 * If it is the first entry on the list, it is actually
895 * in the header and we must copy the following entry up
896 * to the header. Otherwise we must search the list for
897 * the entry. In either case we free the now unused entry.
898 */
899 s = splvm();
900 for (npv = pv; (npv = pv->pv_next) != NULL; pv = npv) {
901 if (pm == npv->pv_pm && PV_CMPVA(va, npv)) {
902 if (PV_ISWIRED(npv)) {
903 PV_UNWIRE(npv);
904 pm->pm_stats.wired_count--;
905 }
906 break;
907 }
908 }
909 splx(s);
910 }
911
912 void
913 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot)
914 {
915 int s;
916 u_int tte;
917 struct pmap *pm = pmap_kernel();
918
919 /*
920 * Have to remove any existing mapping first.
921 */
922
923 /*
924 * Generate TTE.
925 *
926 * XXXX
927 *
928 * Since the kernel does not handle execution privileges properly,
929 * we will handle read and execute permissions together.
930 */
931 tte = 0;
932 if (prot & VM_PROT_ALL) {
933
934 tte = TTE_PA(pa) | TTE_EX | TTE_ZONE(ZONE_PRIV);
935 /* XXXX -- need to support multiple page sizes. */
936 tte |= TTE_SZ_16K;
937 #ifdef DIAGNOSTIC
938 if ((prot & (PME_NOCACHE | PME_WRITETHROUG)) ==
939 (PME_NOCACHE | PME_WRITETHROUG))
940 panic("pmap_kenter_pa: uncached & writethrough");
941 #endif
942 if (prot & PME_NOCACHE)
943 /* Must be I/O mapping */
944 tte |= TTE_I | TTE_G;
945 #ifdef PPC_4XX_NOCACHE
946 tte |= TTE_I;
947 #else
948 else if (prot & PME_WRITETHROUG)
949 /* Uncached and writethrough are not compatible */
950 tte |= TTE_W;
951 #endif
952 if (prot & VM_PROT_WRITE)
953 tte |= TTE_WR;
954 }
955
956 s = splvm();
957
958 /* Insert page into page table. */
959 pte_enter(pm, va, tte);
960 splx(s);
961 }
962
963 void
964 pmap_kremove(vaddr_t va, vsize_t len)
965 {
966
967 while (len > 0) {
968 pte_enter(pmap_kernel(), va, 0);
969 va += PAGE_SIZE;
970 len -= PAGE_SIZE;
971 }
972 }
973
974 /*
975 * Remove the given range of mapping entries.
976 */
977 void
978 pmap_remove(struct pmap *pm, vaddr_t va, vaddr_t endva)
979 {
980 int s;
981 paddr_t pa;
982 volatile u_int *ptp;
983
984 s = splvm();
985 while (va < endva) {
986
987 if ((ptp = pte_find(pm, va)) && (pa = *ptp)) {
988 pa = TTE_PA(pa);
989 pmap_remove_pv(pm, va, pa);
990 *ptp = 0;
991 ppc4xx_tlb_flush(va, pm->pm_ctx);
992 pm->pm_stats.resident_count--;
993 }
994 va += PAGE_SIZE;
995 }
996
997 splx(s);
998 }
999
1000 /*
1001 * Get the physical page address for the given pmap/virtual address.
1002 */
1003 boolean_t
1004 pmap_extract(struct pmap *pm, vaddr_t va, paddr_t *pap)
1005 {
1006 int seg = STIDX(va);
1007 int ptn = PTIDX(va);
1008 u_int pa = 0;
1009 int s;
1010
1011 s = splvm();
1012 if (pm->pm_ptbl[seg] && (pa = pm->pm_ptbl[seg][ptn])) {
1013 *pap = TTE_PA(pa) | (va & PGOFSET);
1014 }
1015 splx(s);
1016 return (pa != 0);
1017 }
1018
1019 /*
1020 * Lower the protection on the specified range of this pmap.
1021 *
1022 * There are only two cases: either the protection is going to 0,
1023 * or it is going to read-only.
1024 */
1025 void
1026 pmap_protect(struct pmap *pm, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
1027 {
1028 volatile u_int *ptp;
1029 int s, bic;
1030
1031 if ((prot & VM_PROT_READ) == 0) {
1032 pmap_remove(pm, sva, eva);
1033 return;
1034 }
1035 bic = 0;
1036 if ((prot & VM_PROT_WRITE) == 0) {
1037 bic |= TTE_WR;
1038 }
1039 if ((prot & VM_PROT_EXECUTE) == 0) {
1040 bic |= TTE_EX;
1041 }
1042 if (bic == 0) {
1043 return;
1044 }
1045 s = splvm();
1046 while (sva < eva) {
1047 if ((ptp = pte_find(pm, sva)) != NULL) {
1048 *ptp &= ~bic;
1049 ppc4xx_tlb_flush(sva, pm->pm_ctx);
1050 }
1051 sva += PAGE_SIZE;
1052 }
1053 splx(s);
1054 }
1055
1056 boolean_t
1057 pmap_check_attr(struct vm_page *pg, u_int mask, int clear)
1058 {
1059 paddr_t pa;
1060 char *attr;
1061 int s, rv;
1062
1063 /*
1064 * First modify bits in cache.
1065 */
1066 pa = VM_PAGE_TO_PHYS(pg);
1067 attr = pa_to_attr(pa);
1068 if (attr == NULL)
1069 return FALSE;
1070
1071 s = splvm();
1072 rv = ((*attr & mask) != 0);
1073 if (clear) {
1074 *attr &= ~mask;
1075 pmap_page_protect(pg, mask == PMAP_ATTR_CHG ? VM_PROT_READ : 0);
1076 }
1077 splx(s);
1078 return rv;
1079 }
1080
1081
1082 /*
1083 * Lower the protection on the specified physical page.
1084 *
1085 * There are only two cases: either the protection is going to 0,
1086 * or it is going to read-only.
1087 */
1088 void
1089 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
1090 {
1091 paddr_t pa = VM_PAGE_TO_PHYS(pg);
1092 vaddr_t va;
1093 struct pv_entry *pvh, *pv, *npv;
1094 struct pmap *pm;
1095
1096 pvh = pa_to_pv(pa);
1097 if (pvh == NULL)
1098 return;
1099
1100 /* Handle extra pvs which may be deleted in the operation */
1101 for (pv = pvh->pv_next; pv; pv = npv) {
1102 npv = pv->pv_next;
1103
1104 pm = pv->pv_pm;
1105 va = pv->pv_va;
1106 pmap_protect(pm, va, va + PAGE_SIZE, prot);
1107 }
1108 /* Now check the head pv */
1109 if (pvh->pv_pm) {
1110 pv = pvh;
1111 pm = pv->pv_pm;
1112 va = pv->pv_va;
1113 pmap_protect(pm, va, va + PAGE_SIZE, prot);
1114 }
1115 }
1116
1117 /*
1118 * Activate the address space for the specified process. If the process
1119 * is the current process, load the new MMU context.
1120 */
1121 void
1122 pmap_activate(struct lwp *l)
1123 {
1124 #if 0
1125 struct pcb *pcb = &l->l_proc->p_addr->u_pcb;
1126 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap;
1127
1128 /*
1129 * XXX Normally performed in cpu_fork().
1130 */
1131 printf("pmap_activate(%p), pmap=%p\n",l,pmap);
1132 pcb->pcb_pm = pmap;
1133 #endif
1134 }
1135
1136 /*
1137 * Deactivate the specified process's address space.
1138 */
1139 void
1140 pmap_deactivate(struct lwp *l)
1141 {
1142 }
1143
1144 /*
1145 * Synchronize caches corresponding to [addr, addr+len) in p.
1146 */
1147 void
1148 pmap_procwr(struct proc *p, vaddr_t va, size_t len)
1149 {
1150 struct pmap *pm = p->p_vmspace->vm_map.pmap;
1151 int msr, ctx, opid, step;
1152
1153 step = CACHELINESIZE;
1154
1155 /*
1156 * Need to turn off IMMU and switch to user context.
1157 * (icbi uses DMMU).
1158 */
1159 if (!(ctx = pm->pm_ctx)) {
1160 /* No context -- assign it one */
1161 ctx_alloc(pm);
1162 ctx = pm->pm_ctx;
1163 }
1164 __asm __volatile("mfmsr %0;"
1165 "li %1, %7;"
1166 "andc %1,%0,%1;"
1167 "mtmsr %1;"
1168 "sync;isync;"
1169 "mfpid %1;"
1170 "mtpid %2;"
1171 "sync; isync;"
1172 "1:"
1173 "dcbf 0,%3;"
1174 "icbi 0,%3;"
1175 "add %3,%3,%5;"
1176 "addc. %4,%4,%6;"
1177 "bge 1b;"
1178 "mtpid %1;"
1179 "mtmsr %0;"
1180 "sync; isync"
1181 : "=&r" (msr), "=&r" (opid)
1182 : "r" (ctx), "r" (va), "r" (len), "r" (step), "r" (-step),
1183 "K" (PSL_IR | PSL_DR));
1184 }
1185
1186
1187 /* This has to be done in real mode !!! */
1188 void
1189 ppc4xx_tlb_flush(vaddr_t va, int pid)
1190 {
1191 u_long i, found;
1192 u_long msr;
1193
1194 /* If there's no context then it can't be mapped. */
1195 if (!pid)
1196 return;
1197
1198 asm("mfpid %1;" /* Save PID */
1199 "mfmsr %2;" /* Save MSR */
1200 "li %0,0;" /* Now clear MSR */
1201 "mtmsr %0;"
1202 "mtpid %4;" /* Set PID */
1203 "sync;"
1204 "tlbsx. %0,0,%3;" /* Search TLB */
1205 "sync;"
1206 "mtpid %1;" /* Restore PID */
1207 "mtmsr %2;" /* Restore MSR */
1208 "sync;isync;"
1209 "li %1,1;"
1210 "beq 1f;"
1211 "li %1,0;"
1212 "1:"
1213 : "=&r" (i), "=&r" (found), "=&r" (msr)
1214 : "r" (va), "r" (pid));
1215 if (found && !TLB_LOCKED(i)) {
1216
1217 /* Now flush translation */
1218 asm volatile(
1219 "tlbwe %0,%1,0;"
1220 "sync;isync;"
1221 : : "r" (0), "r" (i));
1222
1223 tlb_info[i].ti_ctx = 0;
1224 tlb_info[i].ti_flags = 0;
1225 tlbnext = i;
1226 /* Successful flushes */
1227 tlbflush_ev.ev_count++;
1228 }
1229 }
1230
1231 void
1232 ppc4xx_tlb_flush_all(void)
1233 {
1234 u_long i;
1235
1236 for (i = 0; i < NTLB; i++)
1237 if (!TLB_LOCKED(i)) {
1238 asm volatile(
1239 "tlbwe %0,%1,0;"
1240 "sync;isync;"
1241 : : "r" (0), "r" (i));
1242 tlb_info[i].ti_ctx = 0;
1243 tlb_info[i].ti_flags = 0;
1244 }
1245
1246 asm volatile("sync;isync");
1247 }
1248
1249 /* Find a TLB entry to evict. */
1250 static int
1251 ppc4xx_tlb_find_victim(void)
1252 {
1253 int flags;
1254
1255 for (;;) {
1256 if (++tlbnext >= NTLB)
1257 tlbnext = TLB_NRESERVED;
1258 flags = tlb_info[tlbnext].ti_flags;
1259 if (!(flags & TLBF_USED) ||
1260 (flags & (TLBF_LOCKED | TLBF_REF)) == 0) {
1261 u_long va, stack = (u_long)&va;
1262
1263 if (!((tlb_info[tlbnext].ti_va ^ stack) & (~PGOFSET)) &&
1264 (tlb_info[tlbnext].ti_ctx == KERNEL_PID) &&
1265 (flags & TLBF_USED)) {
1266 /* Kernel stack page */
1267 flags |= TLBF_USED;
1268 tlb_info[tlbnext].ti_flags = flags;
1269 } else {
1270 /* Found it! */
1271 return (tlbnext);
1272 }
1273 } else {
1274 tlb_info[tlbnext].ti_flags = (flags & ~TLBF_REF);
1275 }
1276 }
1277 }
1278
1279 void
1280 ppc4xx_tlb_enter(int ctx, vaddr_t va, u_int pte)
1281 {
1282 u_long th, tl, idx;
1283 tlbpid_t pid;
1284 u_short msr;
1285 paddr_t pa;
1286 int s, sz;
1287
1288 tlbenter_ev.ev_count++;
1289
1290 sz = (pte & TTE_SZ_MASK) >> TTE_SZ_SHIFT;
1291 pa = (pte & TTE_RPN_MASK(sz));
1292 th = (va & TLB_EPN_MASK) | (sz << TLB_SIZE_SHFT) | TLB_VALID;
1293 tl = (pte & ~TLB_RPN_MASK) | pa;
1294 tl |= ppc4xx_tlbflags(va, pa);
1295
1296 s = splhigh();
1297 idx = ppc4xx_tlb_find_victim();
1298
1299 #ifdef DIAGNOSTIC
1300 if ((idx < TLB_NRESERVED) || (idx >= NTLB)) {
1301 panic("ppc4xx_tlb_enter: repacing entry %ld", idx);
1302 }
1303 #endif
1304
1305 tlb_info[idx].ti_va = (va & TLB_EPN_MASK);
1306 tlb_info[idx].ti_ctx = ctx;
1307 tlb_info[idx].ti_flags = TLBF_USED | TLBF_REF;
1308
1309 asm volatile(
1310 "mfmsr %0;" /* Save MSR */
1311 "li %1,0;"
1312 "tlbwe %1,%3,0;" /* Invalidate old entry. */
1313 "mtmsr %1;" /* Clear MSR */
1314 "mfpid %1;" /* Save old PID */
1315 "mtpid %2;" /* Load translation ctx */
1316 "sync; isync;"
1317 #ifdef DEBUG
1318 "andi. %3,%3,63;"
1319 "tweqi %3,0;" /* XXXXX DEBUG trap on index 0 */
1320 #endif
1321 "tlbwe %4,%3,1; tlbwe %5,%3,0;" /* Set TLB */
1322 "sync; isync;"
1323 "mtpid %1; mtmsr %0;" /* Restore PID and MSR */
1324 "sync; isync;"
1325 : "=&r" (msr), "=&r" (pid)
1326 : "r" (ctx), "r" (idx), "r" (tl), "r" (th));
1327 splx(s);
1328 }
1329
1330 void
1331 ppc4xx_tlb_unpin(int i)
1332 {
1333
1334 if (i == -1)
1335 for (i = 0; i < TLB_NRESERVED; i++)
1336 tlb_info[i].ti_flags &= ~TLBF_LOCKED;
1337 else
1338 tlb_info[i].ti_flags &= ~TLBF_LOCKED;
1339 }
1340
1341 void
1342 ppc4xx_tlb_init(void)
1343 {
1344 int i;
1345
1346 /* Mark reserved TLB entries */
1347 for (i = 0; i < TLB_NRESERVED; i++) {
1348 tlb_info[i].ti_flags = TLBF_LOCKED | TLBF_USED;
1349 tlb_info[i].ti_ctx = KERNEL_PID;
1350 }
1351
1352 /* Setup security zones */
1353 /* Z0 - accessible by kernel only if TLB entry permissions allow
1354 * Z1,Z2 - access is controlled by TLB entry permissions
1355 * Z3 - full access regardless of TLB entry permissions
1356 */
1357
1358 asm volatile(
1359 "mtspr %0,%1;"
1360 "sync;"
1361 :: "K"(SPR_ZPR), "r" (0x1b000000));
1362 }
1363
1364
1365 /*
1366 * We should pass the ctx in from trap code.
1367 */
1368 int
1369 pmap_tlbmiss(vaddr_t va, int ctx)
1370 {
1371 volatile u_int *pte;
1372 u_long tte;
1373
1374 tlbmiss_ev.ev_count++;
1375
1376 /*
1377 * XXXX We will reserve 0-0x80000000 for va==pa mappings.
1378 */
1379 if (ctx != KERNEL_PID || (va & 0x80000000)) {
1380 pte = pte_find((struct pmap *)ctxbusy[ctx], va);
1381 if (pte == NULL) {
1382 /* Map unmanaged addresses directly for kernel access */
1383 return 1;
1384 }
1385 tte = *pte;
1386 if (tte == 0) {
1387 return 1;
1388 }
1389 } else {
1390 /* Create a 16MB writable mapping. */
1391 #ifdef PPC_4XX_NOCACHE
1392 tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_I | TTE_WR;
1393 #else
1394 tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_WR;
1395 #endif
1396 }
1397 tlbhit_ev.ev_count++;
1398 ppc4xx_tlb_enter(ctx, va, tte);
1399
1400 return 0;
1401 }
1402
1403 /*
1404 * Flush all the entries matching a context from the TLB.
1405 */
1406 static int
1407 ctx_flush(int cnum)
1408 {
1409 int i;
1410
1411 /* We gotta steal this context */
1412 for (i = TLB_NRESERVED; i < NTLB; i++) {
1413 if (tlb_info[i].ti_ctx == cnum) {
1414 /* Can't steal ctx if it has a locked entry. */
1415 if (TLB_LOCKED(i)) {
1416 #ifdef DIAGNOSTIC
1417 printf("ctx_flush: can't invalidate "
1418 "locked mapping %d "
1419 "for context %d\n", i, cnum);
1420 #ifdef DDB
1421 Debugger();
1422 #endif
1423 #endif
1424 return (1);
1425 }
1426 #ifdef DIAGNOSTIC
1427 if (i < TLB_NRESERVED)
1428 panic("TLB entry %d not locked", i);
1429 #endif
1430 /* Invalidate particular TLB entry regardless of locked status */
1431 asm volatile("tlbwe %0,%1,0" : :"r"(0),"r"(i));
1432 tlb_info[i].ti_flags = 0;
1433 }
1434 }
1435 return (0);
1436 }
1437
1438 /*
1439 * Allocate a context. If necessary, steal one from someone else.
1440 *
1441 * The new context is flushed from the TLB before returning.
1442 */
1443 int
1444 ctx_alloc(struct pmap *pm)
1445 {
1446 int s, cnum;
1447 static int next = MINCTX;
1448
1449 if (pm == pmap_kernel()) {
1450 #ifdef DIAGNOSTIC
1451 printf("ctx_alloc: kernel pmap!\n");
1452 #endif
1453 return (0);
1454 }
1455 s = splvm();
1456
1457 /* Find a likely context. */
1458 cnum = next;
1459 do {
1460 if ((++cnum) > NUMCTX)
1461 cnum = MINCTX;
1462 } while (ctxbusy[cnum] != NULL && cnum != next);
1463
1464 /* Now clean it out */
1465 oops:
1466 if (cnum < MINCTX)
1467 cnum = MINCTX; /* Never steal ctx 0 or 1 */
1468 if (ctx_flush(cnum)) {
1469 /* oops -- something's wired. */
1470 if ((++cnum) > NUMCTX)
1471 cnum = MINCTX;
1472 goto oops;
1473 }
1474
1475 if (ctxbusy[cnum]) {
1476 #ifdef DEBUG
1477 /* We should identify this pmap and clear it */
1478 printf("Warning: stealing context %d\n", cnum);
1479 #endif
1480 ctxbusy[cnum]->pm_ctx = 0;
1481 }
1482 ctxbusy[cnum] = pm;
1483 next = cnum;
1484 splx(s);
1485 pm->pm_ctx = cnum;
1486
1487 return cnum;
1488 }
1489
1490 /*
1491 * Give away a context.
1492 */
1493 void
1494 ctx_free(struct pmap *pm)
1495 {
1496 int oldctx;
1497
1498 oldctx = pm->pm_ctx;
1499
1500 if (oldctx == 0)
1501 panic("ctx_free: freeing kernel context");
1502 #ifdef DIAGNOSTIC
1503 if (ctxbusy[oldctx] == 0)
1504 printf("ctx_free: freeing free context %d\n", oldctx);
1505 if (ctxbusy[oldctx] != pm) {
1506 printf("ctx_free: freeing someone esle's context\n "
1507 "ctxbusy[%d] = %p, pm->pm_ctx = %p\n",
1508 oldctx, (void *)(u_long)ctxbusy[oldctx], pm);
1509 #ifdef DDB
1510 Debugger();
1511 #endif
1512 }
1513 #endif
1514 /* We should verify it has not been stolen and reallocated... */
1515 ctxbusy[oldctx] = NULL;
1516 ctx_flush(oldctx);
1517 }
1518
1519
1520 #ifdef DEBUG
1521 /*
1522 * Test ref/modify handling.
1523 */
1524 void pmap_testout __P((void));
1525 void
1526 pmap_testout()
1527 {
1528 vaddr_t va;
1529 volatile int *loc;
1530 int val = 0;
1531 paddr_t pa;
1532 struct vm_page *pg;
1533 int ref, mod;
1534
1535 /* Allocate a page */
1536 va = (vaddr_t)uvm_km_alloc(kernel_map, PAGE_SIZE, 0,
1537 UVM_KMF_WIRED | UVM_KMF_ZERO);
1538 loc = (int*)va;
1539
1540 pmap_extract(pmap_kernel(), va, &pa);
1541 pg = PHYS_TO_VM_PAGE(pa);
1542 pmap_unwire(pmap_kernel(), va);
1543
1544 pmap_kremove(va, PAGE_SIZE);
1545 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1546 pmap_update(pmap_kernel());
1547
1548 /* Now clear reference and modify */
1549 ref = pmap_clear_reference(pg);
1550 mod = pmap_clear_modify(pg);
1551 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1552 (void *)(u_long)va, (long)pa,
1553 ref, mod);
1554
1555 /* Check it's properly cleared */
1556 ref = pmap_is_referenced(pg);
1557 mod = pmap_is_modified(pg);
1558 printf("Checking cleared page: ref %d, mod %d\n",
1559 ref, mod);
1560
1561 /* Reference page */
1562 val = *loc;
1563
1564 ref = pmap_is_referenced(pg);
1565 mod = pmap_is_modified(pg);
1566 printf("Referenced page: ref %d, mod %d val %x\n",
1567 ref, mod, val);
1568
1569 /* Now clear reference and modify */
1570 ref = pmap_clear_reference(pg);
1571 mod = pmap_clear_modify(pg);
1572 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1573 (void *)(u_long)va, (long)pa,
1574 ref, mod);
1575
1576 /* Modify page */
1577 *loc = 1;
1578
1579 ref = pmap_is_referenced(pg);
1580 mod = pmap_is_modified(pg);
1581 printf("Modified page: ref %d, mod %d\n",
1582 ref, mod);
1583
1584 /* Now clear reference and modify */
1585 ref = pmap_clear_reference(pg);
1586 mod = pmap_clear_modify(pg);
1587 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1588 (void *)(u_long)va, (long)pa,
1589 ref, mod);
1590
1591 /* Check it's properly cleared */
1592 ref = pmap_is_referenced(pg);
1593 mod = pmap_is_modified(pg);
1594 printf("Checking cleared page: ref %d, mod %d\n",
1595 ref, mod);
1596
1597 /* Modify page */
1598 *loc = 1;
1599
1600 ref = pmap_is_referenced(pg);
1601 mod = pmap_is_modified(pg);
1602 printf("Modified page: ref %d, mod %d\n",
1603 ref, mod);
1604
1605 /* Check pmap_protect() */
1606 pmap_protect(pmap_kernel(), va, va+1, VM_PROT_READ);
1607 pmap_update(pmap_kernel());
1608 ref = pmap_is_referenced(pg);
1609 mod = pmap_is_modified(pg);
1610 printf("pmap_protect(VM_PROT_READ): ref %d, mod %d\n",
1611 ref, mod);
1612
1613 /* Now clear reference and modify */
1614 ref = pmap_clear_reference(pg);
1615 mod = pmap_clear_modify(pg);
1616 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1617 (void *)(u_long)va, (long)pa,
1618 ref, mod);
1619
1620 /* Reference page */
1621 val = *loc;
1622
1623 ref = pmap_is_referenced(pg);
1624 mod = pmap_is_modified(pg);
1625 printf("Referenced page: ref %d, mod %d val %x\n",
1626 ref, mod, val);
1627
1628 /* Now clear reference and modify */
1629 ref = pmap_clear_reference(pg);
1630 mod = pmap_clear_modify(pg);
1631 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1632 (void *)(u_long)va, (long)pa,
1633 ref, mod);
1634
1635 /* Modify page */
1636 #if 0
1637 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1638 pmap_update(pmap_kernel());
1639 #endif
1640 *loc = 1;
1641
1642 ref = pmap_is_referenced(pg);
1643 mod = pmap_is_modified(pg);
1644 printf("Modified page: ref %d, mod %d\n",
1645 ref, mod);
1646
1647 /* Check pmap_protect() */
1648 pmap_protect(pmap_kernel(), va, va+1, VM_PROT_NONE);
1649 pmap_update(pmap_kernel());
1650 ref = pmap_is_referenced(pg);
1651 mod = pmap_is_modified(pg);
1652 printf("pmap_protect(): ref %d, mod %d\n",
1653 ref, mod);
1654
1655 /* Now clear reference and modify */
1656 ref = pmap_clear_reference(pg);
1657 mod = pmap_clear_modify(pg);
1658 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1659 (void *)(u_long)va, (long)pa,
1660 ref, mod);
1661
1662 /* Reference page */
1663 val = *loc;
1664
1665 ref = pmap_is_referenced(pg);
1666 mod = pmap_is_modified(pg);
1667 printf("Referenced page: ref %d, mod %d val %x\n",
1668 ref, mod, val);
1669
1670 /* Now clear reference and modify */
1671 ref = pmap_clear_reference(pg);
1672 mod = pmap_clear_modify(pg);
1673 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1674 (void *)(u_long)va, (long)pa,
1675 ref, mod);
1676
1677 /* Modify page */
1678 #if 0
1679 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1680 pmap_update(pmap_kernel());
1681 #endif
1682 *loc = 1;
1683
1684 ref = pmap_is_referenced(pg);
1685 mod = pmap_is_modified(pg);
1686 printf("Modified page: ref %d, mod %d\n",
1687 ref, mod);
1688
1689 /* Check pmap_pag_protect() */
1690 pmap_page_protect(pg, VM_PROT_READ);
1691 ref = pmap_is_referenced(pg);
1692 mod = pmap_is_modified(pg);
1693 printf("pmap_page_protect(VM_PROT_READ): ref %d, mod %d\n",
1694 ref, mod);
1695
1696 /* Now clear reference and modify */
1697 ref = pmap_clear_reference(pg);
1698 mod = pmap_clear_modify(pg);
1699 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1700 (void *)(u_long)va, (long)pa,
1701 ref, mod);
1702
1703 /* Reference page */
1704 val = *loc;
1705
1706 ref = pmap_is_referenced(pg);
1707 mod = pmap_is_modified(pg);
1708 printf("Referenced page: ref %d, mod %d val %x\n",
1709 ref, mod, val);
1710
1711 /* Now clear reference and modify */
1712 ref = pmap_clear_reference(pg);
1713 mod = pmap_clear_modify(pg);
1714 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1715 (void *)(u_long)va, (long)pa,
1716 ref, mod);
1717
1718 /* Modify page */
1719 #if 0
1720 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1721 pmap_update(pmap_kernel());
1722 #endif
1723 *loc = 1;
1724
1725 ref = pmap_is_referenced(pg);
1726 mod = pmap_is_modified(pg);
1727 printf("Modified page: ref %d, mod %d\n",
1728 ref, mod);
1729
1730 /* Check pmap_pag_protect() */
1731 pmap_page_protect(pg, VM_PROT_NONE);
1732 ref = pmap_is_referenced(pg);
1733 mod = pmap_is_modified(pg);
1734 printf("pmap_page_protect(): ref %d, mod %d\n",
1735 ref, mod);
1736
1737 /* Now clear reference and modify */
1738 ref = pmap_clear_reference(pg);
1739 mod = pmap_clear_modify(pg);
1740 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1741 (void *)(u_long)va, (long)pa,
1742 ref, mod);
1743
1744
1745 /* Reference page */
1746 val = *loc;
1747
1748 ref = pmap_is_referenced(pg);
1749 mod = pmap_is_modified(pg);
1750 printf("Referenced page: ref %d, mod %d val %x\n",
1751 ref, mod, val);
1752
1753 /* Now clear reference and modify */
1754 ref = pmap_clear_reference(pg);
1755 mod = pmap_clear_modify(pg);
1756 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1757 (void *)(u_long)va, (long)pa,
1758 ref, mod);
1759
1760 /* Modify page */
1761 #if 0
1762 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1763 pmap_update(pmap_kernel());
1764 #endif
1765 *loc = 1;
1766
1767 ref = pmap_is_referenced(pg);
1768 mod = pmap_is_modified(pg);
1769 printf("Modified page: ref %d, mod %d\n",
1770 ref, mod);
1771
1772 /* Unmap page */
1773 pmap_remove(pmap_kernel(), va, va+1);
1774 pmap_update(pmap_kernel());
1775 ref = pmap_is_referenced(pg);
1776 mod = pmap_is_modified(pg);
1777 printf("Unmapped page: ref %d, mod %d\n", ref, mod);
1778
1779 /* Now clear reference and modify */
1780 ref = pmap_clear_reference(pg);
1781 mod = pmap_clear_modify(pg);
1782 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1783 (void *)(u_long)va, (long)pa, ref, mod);
1784
1785 /* Check it's properly cleared */
1786 ref = pmap_is_referenced(pg);
1787 mod = pmap_is_modified(pg);
1788 printf("Checking cleared page: ref %d, mod %d\n",
1789 ref, mod);
1790
1791 pmap_remove(pmap_kernel(), va, va + PAGE_SIZE);
1792 pmap_kenter_pa(va, pa, VM_PROT_ALL, VM_PROT_ALL);
1793 uvm_km_free(kernel_map, (vaddr_t)va, PAGE_SIZE, UVM_KMF_WIRED);
1794 }
1795 #endif
1796