pmap.c revision 1.33 1 /* $NetBSD: pmap.c,v 1.33 2005/03/02 09:02:42 chs Exp $ */
2
3 /*
4 * Copyright 2001 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
40 * Copyright (C) 1995, 1996 TooLs GmbH.
41 * All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by TooLs GmbH.
54 * 4. The name of TooLs GmbH may not be used to endorse or promote products
55 * derived from this software without specific prior written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
62 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
64 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
65 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 */
68
69 #include <sys/cdefs.h>
70 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.33 2005/03/02 09:02:42 chs Exp $");
71
72 #include <sys/param.h>
73 #include <sys/malloc.h>
74 #include <sys/proc.h>
75 #include <sys/user.h>
76 #include <sys/queue.h>
77 #include <sys/systm.h>
78 #include <sys/pool.h>
79 #include <sys/device.h>
80
81 #include <uvm/uvm.h>
82
83 #include <machine/cpu.h>
84 #include <machine/pcb.h>
85 #include <machine/powerpc.h>
86
87 #include <powerpc/spr.h>
88 #include <machine/tlb.h>
89
90 /*
91 * kernmap is an array of PTEs large enough to map in
92 * 4GB. At 16KB/page it is 256K entries or 2MB.
93 */
94 #define KERNMAP_SIZE ((0xffffffffU/PAGE_SIZE)+1)
95 caddr_t kernmap;
96
97 #define MINCTX 2
98 #define NUMCTX 256
99 volatile struct pmap *ctxbusy[NUMCTX];
100
101 #define TLBF_USED 0x1
102 #define TLBF_REF 0x2
103 #define TLBF_LOCKED 0x4
104 #define TLB_LOCKED(i) (tlb_info[(i)].ti_flags & TLBF_LOCKED)
105 typedef struct tlb_info_s {
106 char ti_flags;
107 char ti_ctx; /* TLB_PID assiciated with the entry */
108 u_int ti_va;
109 } tlb_info_t;
110
111 volatile tlb_info_t tlb_info[NTLB];
112 /* We'll use a modified FIFO replacement policy cause it's cheap */
113 volatile int tlbnext = TLB_NRESERVED;
114
115 u_long dtlb_miss_count = 0;
116 u_long itlb_miss_count = 0;
117 u_long ktlb_miss_count = 0;
118 u_long utlb_miss_count = 0;
119
120 /* Event counters */
121 struct evcnt tlbmiss_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
122 NULL, "cpu", "tlbmiss");
123 struct evcnt tlbhit_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
124 NULL, "cpu", "tlbhit");
125 struct evcnt tlbflush_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
126 NULL, "cpu", "tlbflush");
127 struct evcnt tlbenter_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
128 NULL, "cpu", "tlbenter");
129
130 struct pmap kernel_pmap_;
131
132 int physmem;
133 static int npgs;
134 static u_int nextavail;
135 #ifndef MSGBUFADDR
136 extern paddr_t msgbuf_paddr;
137 #endif
138
139 static struct mem_region *mem, *avail;
140
141 /*
142 * This is a cache of referenced/modified bits.
143 * Bits herein are shifted by ATTRSHFT.
144 */
145 static char *pmap_attrib;
146
147 #define PV_WIRED 0x1
148 #define PV_WIRE(pv) ((pv)->pv_va |= PV_WIRED)
149 #define PV_UNWIRE(pv) ((pv)->pv_va &= ~PV_WIRED)
150 #define PV_ISWIRED(pv) ((pv)->pv_va & PV_WIRED)
151 #define PV_CMPVA(va,pv) (!(((pv)->pv_va ^ (va)) & (~PV_WIRED)))
152
153 struct pv_entry {
154 struct pv_entry *pv_next; /* Linked list of mappings */
155 vaddr_t pv_va; /* virtual address of mapping */
156 struct pmap *pv_pm;
157 };
158
159 struct pv_entry *pv_table;
160 static struct pool pv_pool;
161
162 static int pmap_initialized;
163
164 static int ctx_flush(int);
165
166 inline struct pv_entry *pa_to_pv(paddr_t);
167 static inline char *pa_to_attr(paddr_t);
168
169 static inline volatile u_int *pte_find(struct pmap *, vaddr_t);
170 static inline int pte_enter(struct pmap *, vaddr_t, u_int);
171
172 static inline int pmap_enter_pv(struct pmap *, vaddr_t, paddr_t, boolean_t);
173 static void pmap_remove_pv(struct pmap *, vaddr_t, paddr_t);
174
175
176 inline struct pv_entry *
177 pa_to_pv(paddr_t pa)
178 {
179 int bank, pg;
180
181 bank = vm_physseg_find(atop(pa), &pg);
182 if (bank == -1)
183 return NULL;
184 return &vm_physmem[bank].pmseg.pvent[pg];
185 }
186
187 static inline char *
188 pa_to_attr(paddr_t pa)
189 {
190 int bank, pg;
191
192 bank = vm_physseg_find(atop(pa), &pg);
193 if (bank == -1)
194 return NULL;
195 return &vm_physmem[bank].pmseg.attrs[pg];
196 }
197
198 /*
199 * Insert PTE into page table.
200 */
201 int
202 pte_enter(struct pmap *pm, vaddr_t va, u_int pte)
203 {
204 int seg = STIDX(va);
205 int ptn = PTIDX(va);
206 u_int oldpte;
207
208 if (!pm->pm_ptbl[seg]) {
209 /* Don't allocate a page to clear a non-existent mapping. */
210 if (!pte)
211 return (0);
212 /* Allocate a page XXXX this will sleep! */
213 pm->pm_ptbl[seg] =
214 (uint *)uvm_km_zalloc(kernel_map, PAGE_SIZE);
215 }
216 oldpte = pm->pm_ptbl[seg][ptn];
217 pm->pm_ptbl[seg][ptn] = pte;
218
219 /* Flush entry. */
220 ppc4xx_tlb_flush(va, pm->pm_ctx);
221 if (oldpte != pte) {
222 if (pte == 0)
223 pm->pm_stats.resident_count--;
224 else
225 pm->pm_stats.resident_count++;
226 }
227 return (1);
228 }
229
230 /*
231 * Get a pointer to a PTE in a page table.
232 */
233 volatile u_int *
234 pte_find(struct pmap *pm, vaddr_t va)
235 {
236 int seg = STIDX(va);
237 int ptn = PTIDX(va);
238
239 if (pm->pm_ptbl[seg])
240 return (&pm->pm_ptbl[seg][ptn]);
241
242 return (NULL);
243 }
244
245 /*
246 * This is called during initppc, before the system is really initialized.
247 */
248 void
249 pmap_bootstrap(u_int kernelstart, u_int kernelend)
250 {
251 struct mem_region *mp, *mp1;
252 int cnt, i;
253 u_int s, e, sz;
254
255 /*
256 * Allocate the kernel page table at the end of
257 * kernel space so it's in the locked TTE.
258 */
259 kernmap = (caddr_t)kernelend;
260
261 /*
262 * Initialize kernel page table.
263 */
264 for (i = 0; i < STSZ; i++) {
265 pmap_kernel()->pm_ptbl[i] = 0;
266 }
267 ctxbusy[0] = ctxbusy[1] = pmap_kernel();
268
269 /*
270 * Announce page-size to the VM-system
271 */
272 uvmexp.pagesize = NBPG;
273 uvm_setpagesize();
274
275 /*
276 * Get memory.
277 */
278 mem_regions(&mem, &avail);
279 for (mp = mem; mp->size; mp++) {
280 physmem += btoc(mp->size);
281 printf("+%lx,",mp->size);
282 }
283 printf("\n");
284 ppc4xx_tlb_init();
285 /*
286 * Count the number of available entries.
287 */
288 for (cnt = 0, mp = avail; mp->size; mp++)
289 cnt++;
290
291 /*
292 * Page align all regions.
293 * Non-page aligned memory isn't very interesting to us.
294 * Also, sort the entries for ascending addresses.
295 */
296 kernelstart &= ~PGOFSET;
297 kernelend = (kernelend + PGOFSET) & ~PGOFSET;
298 for (mp = avail; mp->size; mp++) {
299 s = mp->start;
300 e = mp->start + mp->size;
301 printf("%08x-%08x -> ",s,e);
302 /*
303 * Check whether this region holds all of the kernel.
304 */
305 if (s < kernelstart && e > kernelend) {
306 avail[cnt].start = kernelend;
307 avail[cnt++].size = e - kernelend;
308 e = kernelstart;
309 }
310 /*
311 * Look whether this regions starts within the kernel.
312 */
313 if (s >= kernelstart && s < kernelend) {
314 if (e <= kernelend)
315 goto empty;
316 s = kernelend;
317 }
318 /*
319 * Now look whether this region ends within the kernel.
320 */
321 if (e > kernelstart && e <= kernelend) {
322 if (s >= kernelstart)
323 goto empty;
324 e = kernelstart;
325 }
326 /*
327 * Now page align the start and size of the region.
328 */
329 s = round_page(s);
330 e = trunc_page(e);
331 if (e < s)
332 e = s;
333 sz = e - s;
334 printf("%08x-%08x = %x\n",s,e,sz);
335 /*
336 * Check whether some memory is left here.
337 */
338 if (sz == 0) {
339 empty:
340 memmove(mp, mp + 1,
341 (cnt - (mp - avail)) * sizeof *mp);
342 cnt--;
343 mp--;
344 continue;
345 }
346 /*
347 * Do an insertion sort.
348 */
349 npgs += btoc(sz);
350 for (mp1 = avail; mp1 < mp; mp1++)
351 if (s < mp1->start)
352 break;
353 if (mp1 < mp) {
354 memmove(mp1 + 1, mp1, (char *)mp - (char *)mp1);
355 mp1->start = s;
356 mp1->size = sz;
357 } else {
358 mp->start = s;
359 mp->size = sz;
360 }
361 }
362
363 /*
364 * We cannot do pmap_steal_memory here,
365 * since we don't run with translation enabled yet.
366 */
367 #ifndef MSGBUFADDR
368 /*
369 * allow for msgbuf
370 */
371 sz = round_page(MSGBUFSIZE);
372 mp = NULL;
373 for (mp1 = avail; mp1->size; mp1++)
374 if (mp1->size >= sz)
375 mp = mp1;
376 if (mp == NULL)
377 panic("not enough memory?");
378
379 npgs -= btoc(sz);
380 msgbuf_paddr = mp->start + mp->size - sz;
381 mp->size -= sz;
382 if (mp->size <= 0)
383 memmove(mp, mp + 1, (cnt - (mp - avail)) * sizeof *mp);
384 #endif
385
386 for (mp = avail; mp->size; mp++)
387 uvm_page_physload(atop(mp->start), atop(mp->start + mp->size),
388 atop(mp->start), atop(mp->start + mp->size),
389 VM_FREELIST_DEFAULT);
390
391 /*
392 * Initialize kernel pmap and hardware.
393 */
394 /* Setup TLB pid allocator so it knows we alreadu using PID 1 */
395 pmap_kernel()->pm_ctx = KERNEL_PID;
396 nextavail = avail->start;
397
398
399 evcnt_attach_static(&tlbmiss_ev);
400 evcnt_attach_static(&tlbhit_ev);
401 evcnt_attach_static(&tlbflush_ev);
402 evcnt_attach_static(&tlbenter_ev);
403 }
404
405 /*
406 * Restrict given range to physical memory
407 *
408 * (Used by /dev/mem)
409 */
410 void
411 pmap_real_memory(paddr_t *start, psize_t *size)
412 {
413 struct mem_region *mp;
414
415 for (mp = mem; mp->size; mp++) {
416 if (*start + *size > mp->start &&
417 *start < mp->start + mp->size) {
418 if (*start < mp->start) {
419 *size -= mp->start - *start;
420 *start = mp->start;
421 }
422 if (*start + *size > mp->start + mp->size)
423 *size = mp->start + mp->size - *start;
424 return;
425 }
426 }
427 *size = 0;
428 }
429
430 /*
431 * Initialize anything else for pmap handling.
432 * Called during vm_init().
433 */
434 void
435 pmap_init(void)
436 {
437 struct pv_entry *pv;
438 vsize_t sz;
439 vaddr_t addr;
440 int i, s;
441 int bank;
442 char *attr;
443
444 sz = (vsize_t)((sizeof(struct pv_entry) + 1) * npgs);
445 sz = round_page(sz);
446 addr = uvm_km_zalloc(kernel_map, sz);
447 s = splvm();
448 pv = pv_table = (struct pv_entry *)addr;
449 for (i = npgs; --i >= 0;)
450 pv++->pv_pm = NULL;
451 pmap_attrib = (char *)pv;
452 memset(pv, 0, npgs);
453
454 pv = pv_table;
455 attr = pmap_attrib;
456 for (bank = 0; bank < vm_nphysseg; bank++) {
457 sz = vm_physmem[bank].end - vm_physmem[bank].start;
458 vm_physmem[bank].pmseg.pvent = pv;
459 vm_physmem[bank].pmseg.attrs = attr;
460 pv += sz;
461 attr += sz;
462 }
463
464 pmap_initialized = 1;
465 splx(s);
466
467 /* Setup a pool for additional pvlist structures */
468 pool_init(&pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pv_entry", NULL);
469 }
470
471 /*
472 * How much virtual space is available to the kernel?
473 */
474 void
475 pmap_virtual_space(vaddr_t *start, vaddr_t *end)
476 {
477
478 #if 0
479 /*
480 * Reserve one segment for kernel virtual memory
481 */
482 *start = (vaddr_t)(KERNEL_SR << ADDR_SR_SHFT);
483 *end = *start + SEGMENT_LENGTH;
484 #else
485 *start = (vaddr_t) VM_MIN_KERNEL_ADDRESS;
486 *end = (vaddr_t) VM_MAX_KERNEL_ADDRESS;
487 #endif
488 }
489
490 #ifdef PMAP_GROWKERNEL
491 /*
492 * Preallocate kernel page tables to a specified VA.
493 * This simply loops through the first TTE for each
494 * page table from the beginning of the kernel pmap,
495 * reads the entry, and if the result is
496 * zero (either invalid entry or no page table) it stores
497 * a zero there, populating page tables in the process.
498 * This is not the most efficient technique but i don't
499 * expect it to be called that often.
500 */
501 extern struct vm_page *vm_page_alloc1 __P((void));
502 extern void vm_page_free1 __P((struct vm_page *));
503
504 vaddr_t kbreak = VM_MIN_KERNEL_ADDRESS;
505
506 vaddr_t
507 pmap_growkernel(vaddr_t maxkvaddr)
508 {
509 int s;
510 int seg;
511 paddr_t pg;
512 struct pmap *pm = pmap_kernel();
513
514 s = splvm();
515
516 /* Align with the start of a page table */
517 for (kbreak &= ~(PTMAP-1); kbreak < maxkvaddr;
518 kbreak += PTMAP) {
519 seg = STIDX(kbreak);
520
521 if (pte_find(pm, kbreak))
522 continue;
523
524 if (uvm.page_init_done) {
525 pg = (paddr_t)VM_PAGE_TO_PHYS(vm_page_alloc1());
526 } else {
527 if (!uvm_page_physget(&pg))
528 panic("pmap_growkernel: no memory");
529 }
530 if (!pg)
531 panic("pmap_growkernel: no pages");
532 pmap_zero_page((paddr_t)pg);
533
534 /* XXX This is based on all phymem being addressable */
535 pm->pm_ptbl[seg] = (u_int *)pg;
536 }
537 splx(s);
538 return (kbreak);
539 }
540
541 /*
542 * vm_page_alloc1:
543 *
544 * Allocate and return a memory cell with no associated object.
545 */
546 struct vm_page *
547 vm_page_alloc1(void)
548 {
549 struct vm_page *pg;
550
551 pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_USERESERVE);
552 if (pg) {
553 pg->wire_count = 1; /* no mappings yet */
554 pg->flags &= ~PG_BUSY; /* never busy */
555 }
556 return pg;
557 }
558
559 /*
560 * vm_page_free1:
561 *
562 * Returns the given page to the free list,
563 * disassociating it with any VM object.
564 *
565 * Object and page must be locked prior to entry.
566 */
567 void
568 vm_page_free1(struct vm_page *mem)
569 {
570 #ifdef DIAGNOSTIC
571 if (mem->flags != (PG_CLEAN|PG_FAKE)) {
572 printf("Freeing invalid page %p\n", mem);
573 printf("pa = %llx\n", (unsigned long long)VM_PAGE_TO_PHYS(mem));
574 #ifdef DDB
575 Debugger();
576 #endif
577 return;
578 }
579 #endif
580 mem->flags |= PG_BUSY;
581 mem->wire_count = 0;
582 uvm_pagefree(mem);
583 }
584 #endif
585
586 /*
587 * Create and return a physical map.
588 */
589 struct pmap *
590 pmap_create(void)
591 {
592 struct pmap *pm;
593
594 pm = malloc(sizeof *pm, M_VMPMAP, M_WAITOK);
595 memset(pm, 0, sizeof *pm);
596 pm->pm_refs = 1;
597 return pm;
598 }
599
600 /*
601 * Add a reference to the given pmap.
602 */
603 void
604 pmap_reference(struct pmap *pm)
605 {
606
607 pm->pm_refs++;
608 }
609
610 /*
611 * Retire the given pmap from service.
612 * Should only be called if the map contains no valid mappings.
613 */
614 void
615 pmap_destroy(struct pmap *pm)
616 {
617 int i;
618
619 if (--pm->pm_refs > 0) {
620 return;
621 }
622 KASSERT(pm->pm_stats.resident_count == 0);
623 KASSERT(pm->pm_stats.wired_count == 0);
624 for (i = 0; i < STSZ; i++)
625 if (pm->pm_ptbl[i]) {
626 uvm_km_free(kernel_map, (vaddr_t)pm->pm_ptbl[i],
627 PAGE_SIZE);
628 pm->pm_ptbl[i] = NULL;
629 }
630 if (pm->pm_ctx)
631 ctx_free(pm);
632 free(pm, M_VMPMAP);
633 }
634
635 /*
636 * Copy the range specified by src_addr/len
637 * from the source map to the range dst_addr/len
638 * in the destination map.
639 *
640 * This routine is only advisory and need not do anything.
641 */
642 void
643 pmap_copy(struct pmap *dst_pmap, struct pmap *src_pmap, vaddr_t dst_addr,
644 vsize_t len, vaddr_t src_addr)
645 {
646 }
647
648 /*
649 * Require that all active physical maps contain no
650 * incorrect entries NOW.
651 */
652 void
653 pmap_update(struct pmap *pmap)
654 {
655 }
656
657 /*
658 * Garbage collects the physical map system for
659 * pages which are no longer used.
660 * Success need not be guaranteed -- that is, there
661 * may well be pages which are not referenced, but
662 * others may be collected.
663 * Called by the pageout daemon when pages are scarce.
664 */
665 void
666 pmap_collect(struct pmap *pm)
667 {
668 }
669
670 /*
671 * Fill the given physical page with zeroes.
672 */
673 void
674 pmap_zero_page(paddr_t pa)
675 {
676
677 #ifdef PPC_4XX_NOCACHE
678 memset((caddr_t)pa, 0, PAGE_SIZE);
679 #else
680 int i;
681
682 for (i = PAGE_SIZE/CACHELINESIZE; i > 0; i--) {
683 __asm __volatile ("dcbz 0,%0" :: "r"(pa));
684 pa += CACHELINESIZE;
685 }
686 #endif
687 }
688
689 /*
690 * Copy the given physical source page to its destination.
691 */
692 void
693 pmap_copy_page(paddr_t src, paddr_t dst)
694 {
695
696 memcpy((caddr_t)dst, (caddr_t)src, PAGE_SIZE);
697 dcache_flush_page(dst);
698 }
699
700 /*
701 * This returns whether this is the first mapping of a page.
702 */
703 static inline int
704 pmap_enter_pv(struct pmap *pm, vaddr_t va, paddr_t pa, boolean_t wired)
705 {
706 struct pv_entry *pv, *npv = NULL;
707 int s;
708
709 if (!pmap_initialized)
710 return 0;
711
712 s = splvm();
713 pv = pa_to_pv(pa);
714 if (!pv->pv_pm) {
715 /*
716 * No entries yet, use header as the first entry.
717 */
718 pv->pv_va = va;
719 pv->pv_pm = pm;
720 pv->pv_next = NULL;
721 } else {
722 /*
723 * There is at least one other VA mapping this page.
724 * Place this entry after the header.
725 */
726 npv = pool_get(&pv_pool, PR_WAITOK);
727 npv->pv_va = va;
728 npv->pv_pm = pm;
729 npv->pv_next = pv->pv_next;
730 pv->pv_next = npv;
731 pv = npv;
732 }
733 if (wired) {
734 PV_WIRE(pv);
735 pm->pm_stats.wired_count++;
736 }
737 splx(s);
738 return (1);
739 }
740
741 static void
742 pmap_remove_pv(struct pmap *pm, vaddr_t va, paddr_t pa)
743 {
744 struct pv_entry *pv, *npv;
745
746 /*
747 * Remove from the PV table.
748 */
749 pv = pa_to_pv(pa);
750 if (!pv)
751 return;
752
753 /*
754 * If it is the first entry on the list, it is actually
755 * in the header and we must copy the following entry up
756 * to the header. Otherwise we must search the list for
757 * the entry. In either case we free the now unused entry.
758 */
759 if (pm == pv->pv_pm && PV_CMPVA(va, pv)) {
760 if (PV_ISWIRED(pv)) {
761 pm->pm_stats.wired_count--;
762 }
763 if ((npv = pv->pv_next)) {
764 *pv = *npv;
765 pool_put(&pv_pool, npv);
766 } else
767 pv->pv_pm = NULL;
768 } else {
769 for (; (npv = pv->pv_next) != NULL; pv = npv)
770 if (pm == npv->pv_pm && PV_CMPVA(va, npv))
771 break;
772 if (npv) {
773 pv->pv_next = npv->pv_next;
774 if (PV_ISWIRED(npv)) {
775 pm->pm_stats.wired_count--;
776 }
777 pool_put(&pv_pool, npv);
778 }
779 }
780 }
781
782 /*
783 * Insert physical page at pa into the given pmap at virtual address va.
784 */
785 int
786 pmap_enter(struct pmap *pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags)
787 {
788 int s;
789 u_int tte;
790 int managed;
791
792 /*
793 * Have to remove any existing mapping first.
794 */
795 pmap_remove(pm, va, va + PAGE_SIZE);
796
797 if (flags & PMAP_WIRED)
798 flags |= prot;
799
800 managed = 0;
801 if (vm_physseg_find(atop(pa), NULL) != -1)
802 managed = 1;
803
804 /*
805 * Generate TTE.
806 */
807 tte = TTE_PA(pa);
808 /* XXXX -- need to support multiple page sizes. */
809 tte |= TTE_SZ_16K;
810 #ifdef DIAGNOSTIC
811 if ((flags & (PME_NOCACHE | PME_WRITETHROUG)) ==
812 (PME_NOCACHE | PME_WRITETHROUG))
813 panic("pmap_enter: uncached & writethrough");
814 #endif
815 if (flags & PME_NOCACHE)
816 /* Must be I/O mapping */
817 tte |= TTE_I | TTE_G;
818 #ifdef PPC_4XX_NOCACHE
819 tte |= TTE_I;
820 #else
821 else if (flags & PME_WRITETHROUG)
822 /* Uncached and writethrough are not compatible */
823 tte |= TTE_W;
824 #endif
825 if (pm == pmap_kernel())
826 tte |= TTE_ZONE(ZONE_PRIV);
827 else
828 tte |= TTE_ZONE(ZONE_USER);
829
830 if (flags & VM_PROT_WRITE)
831 tte |= TTE_WR;
832
833 if (flags & VM_PROT_EXECUTE)
834 tte |= TTE_EX;
835
836 /*
837 * Now record mapping for later back-translation.
838 */
839 if (pmap_initialized && managed) {
840 char *attr;
841
842 if (!pmap_enter_pv(pm, va, pa, flags & PMAP_WIRED)) {
843 /* Could not enter pv on a managed page */
844 return 1;
845 }
846
847 /* Now set attributes. */
848 attr = pa_to_attr(pa);
849 #ifdef DIAGNOSTIC
850 if (!attr)
851 panic("managed but no attr");
852 #endif
853 if (flags & VM_PROT_ALL)
854 *attr |= PMAP_ATTR_REF;
855 if (flags & VM_PROT_WRITE)
856 *attr |= PMAP_ATTR_CHG;
857 }
858
859 s = splvm();
860
861 /* Insert page into page table. */
862 pte_enter(pm, va, tte);
863
864 /* If this is a real fault, enter it in the tlb */
865 if (tte && ((flags & PMAP_WIRED) == 0)) {
866 ppc4xx_tlb_enter(pm->pm_ctx, va, tte);
867 }
868 splx(s);
869
870 /* Flush the real memory from the instruction cache. */
871 if ((prot & VM_PROT_EXECUTE) && (tte & TTE_I) == 0)
872 __syncicache((void *)pa, PAGE_SIZE);
873
874 return 0;
875 }
876
877 void
878 pmap_unwire(struct pmap *pm, vaddr_t va)
879 {
880 struct pv_entry *pv;
881 paddr_t pa;
882 int s;
883
884 if (!pmap_extract(pm, va, &pa)) {
885 return;
886 }
887
888 pv = pa_to_pv(pa);
889 if (!pv)
890 return;
891
892 s = splvm();
893 while (pv != NULL) {
894 if (pm == pv->pv_pm && PV_CMPVA(va, pv)) {
895 if (PV_ISWIRED(pv)) {
896 PV_UNWIRE(pv);
897 pm->pm_stats.wired_count--;
898 }
899 break;
900 }
901 pv = pv->pv_next;
902 }
903 splx(s);
904 }
905
906 void
907 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot)
908 {
909 int s;
910 u_int tte;
911 struct pmap *pm = pmap_kernel();
912
913 /*
914 * Have to remove any existing mapping first.
915 */
916
917 /*
918 * Generate TTE.
919 *
920 * XXXX
921 *
922 * Since the kernel does not handle execution privileges properly,
923 * we will handle read and execute permissions together.
924 */
925 tte = 0;
926 if (prot & VM_PROT_ALL) {
927
928 tte = TTE_PA(pa) | TTE_EX | TTE_ZONE(ZONE_PRIV);
929 /* XXXX -- need to support multiple page sizes. */
930 tte |= TTE_SZ_16K;
931 #ifdef DIAGNOSTIC
932 if ((prot & (PME_NOCACHE | PME_WRITETHROUG)) ==
933 (PME_NOCACHE | PME_WRITETHROUG))
934 panic("pmap_kenter_pa: uncached & writethrough");
935 #endif
936 if (prot & PME_NOCACHE)
937 /* Must be I/O mapping */
938 tte |= TTE_I | TTE_G;
939 #ifdef PPC_4XX_NOCACHE
940 tte |= TTE_I;
941 #else
942 else if (prot & PME_WRITETHROUG)
943 /* Uncached and writethrough are not compatible */
944 tte |= TTE_W;
945 #endif
946 if (prot & VM_PROT_WRITE)
947 tte |= TTE_WR;
948 }
949
950 s = splvm();
951
952 /* Insert page into page table. */
953 pte_enter(pm, va, tte);
954 splx(s);
955 }
956
957 void
958 pmap_kremove(vaddr_t va, vsize_t len)
959 {
960
961 while (len > 0) {
962 pte_enter(pmap_kernel(), va, 0);
963 va += PAGE_SIZE;
964 len -= PAGE_SIZE;
965 }
966 }
967
968 /*
969 * Remove the given range of mapping entries.
970 */
971 void
972 pmap_remove(struct pmap *pm, vaddr_t va, vaddr_t endva)
973 {
974 int s;
975 paddr_t pa;
976 volatile u_int *ptp;
977
978 s = splvm();
979 while (va < endva) {
980
981 if ((ptp = pte_find(pm, va)) && (pa = *ptp)) {
982 pa = TTE_PA(pa);
983 pmap_remove_pv(pm, va, pa);
984 *ptp = 0;
985 ppc4xx_tlb_flush(va, pm->pm_ctx);
986 pm->pm_stats.resident_count--;
987 }
988 va += PAGE_SIZE;
989 }
990
991 splx(s);
992 }
993
994 /*
995 * Get the physical page address for the given pmap/virtual address.
996 */
997 boolean_t
998 pmap_extract(struct pmap *pm, vaddr_t va, paddr_t *pap)
999 {
1000 int seg = STIDX(va);
1001 int ptn = PTIDX(va);
1002 u_int pa = 0;
1003 int s;
1004
1005 s = splvm();
1006 if (pm->pm_ptbl[seg] && (pa = pm->pm_ptbl[seg][ptn])) {
1007 *pap = TTE_PA(pa) | (va & PGOFSET);
1008 }
1009 splx(s);
1010 return (pa != 0);
1011 }
1012
1013 /*
1014 * Lower the protection on the specified range of this pmap.
1015 *
1016 * There are only two cases: either the protection is going to 0,
1017 * or it is going to read-only.
1018 */
1019 void
1020 pmap_protect(struct pmap *pm, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
1021 {
1022 volatile u_int *ptp;
1023 int s, bic;
1024
1025 if ((prot & VM_PROT_READ) == 0) {
1026 pmap_remove(pm, sva, eva);
1027 return;
1028 }
1029 bic = 0;
1030 if ((prot & VM_PROT_WRITE) == 0) {
1031 bic |= TTE_WR;
1032 }
1033 if ((prot & VM_PROT_EXECUTE) == 0) {
1034 bic |= TTE_EX;
1035 }
1036 if (bic == 0) {
1037 return;
1038 }
1039 s = splvm();
1040 while (sva < eva) {
1041 if ((ptp = pte_find(pm, sva)) != NULL) {
1042 *ptp &= ~bic;
1043 ppc4xx_tlb_flush(sva, pm->pm_ctx);
1044 }
1045 sva += PAGE_SIZE;
1046 }
1047 splx(s);
1048 }
1049
1050 boolean_t
1051 pmap_check_attr(struct vm_page *pg, u_int mask, int clear)
1052 {
1053 paddr_t pa;
1054 char *attr;
1055 int s, rv;
1056
1057 /*
1058 * First modify bits in cache.
1059 */
1060 pa = VM_PAGE_TO_PHYS(pg);
1061 attr = pa_to_attr(pa);
1062 if (attr == NULL)
1063 return FALSE;
1064
1065 s = splvm();
1066 rv = ((*attr & mask) != 0);
1067 if (clear) {
1068 *attr &= ~mask;
1069 pmap_page_protect(pg, mask == PMAP_ATTR_CHG ? VM_PROT_READ : 0);
1070 }
1071 splx(s);
1072 return rv;
1073 }
1074
1075
1076 /*
1077 * Lower the protection on the specified physical page.
1078 *
1079 * There are only two cases: either the protection is going to 0,
1080 * or it is going to read-only.
1081 */
1082 void
1083 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
1084 {
1085 paddr_t pa = VM_PAGE_TO_PHYS(pg);
1086 vaddr_t va;
1087 struct pv_entry *pvh, *pv, *npv;
1088 struct pmap *pm;
1089
1090 pvh = pa_to_pv(pa);
1091 if (pvh == NULL)
1092 return;
1093
1094 /* Handle extra pvs which may be deleted in the operation */
1095 for (pv = pvh->pv_next; pv; pv = npv) {
1096 npv = pv->pv_next;
1097
1098 pm = pv->pv_pm;
1099 va = pv->pv_va;
1100 pmap_protect(pm, va, va + PAGE_SIZE, prot);
1101 }
1102 /* Now check the head pv */
1103 if (pvh->pv_pm) {
1104 pv = pvh;
1105 pm = pv->pv_pm;
1106 va = pv->pv_va;
1107 pmap_protect(pm, va, va + PAGE_SIZE, prot);
1108 }
1109 }
1110
1111 /*
1112 * Activate the address space for the specified process. If the process
1113 * is the current process, load the new MMU context.
1114 */
1115 void
1116 pmap_activate(struct lwp *l)
1117 {
1118 #if 0
1119 struct pcb *pcb = &l->l_proc->p_addr->u_pcb;
1120 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap;
1121
1122 /*
1123 * XXX Normally performed in cpu_fork().
1124 */
1125 printf("pmap_activate(%p), pmap=%p\n",l,pmap);
1126 pcb->pcb_pm = pmap;
1127 #endif
1128 }
1129
1130 /*
1131 * Deactivate the specified process's address space.
1132 */
1133 void
1134 pmap_deactivate(struct lwp *l)
1135 {
1136 }
1137
1138 /*
1139 * Synchronize caches corresponding to [addr, addr+len) in p.
1140 */
1141 void
1142 pmap_procwr(struct proc *p, vaddr_t va, size_t len)
1143 {
1144 struct pmap *pm = p->p_vmspace->vm_map.pmap;
1145 int msr, ctx, opid, step;
1146
1147 step = CACHELINESIZE;
1148
1149 /*
1150 * Need to turn off IMMU and switch to user context.
1151 * (icbi uses DMMU).
1152 */
1153 if (!(ctx = pm->pm_ctx)) {
1154 /* No context -- assign it one */
1155 ctx_alloc(pm);
1156 ctx = pm->pm_ctx;
1157 }
1158 __asm __volatile("mfmsr %0;"
1159 "li %1, %7;"
1160 "andc %1,%0,%1;"
1161 "mtmsr %1;"
1162 "sync;isync;"
1163 "mfpid %1;"
1164 "mtpid %2;"
1165 "sync; isync;"
1166 "1:"
1167 "dcbf 0,%3;"
1168 "icbi 0,%3;"
1169 "add %3,%3,%5;"
1170 "addc. %4,%4,%6;"
1171 "bge 1b;"
1172 "mtpid %1;"
1173 "mtmsr %0;"
1174 "sync; isync"
1175 : "=&r" (msr), "=&r" (opid)
1176 : "r" (ctx), "r" (va), "r" (len), "r" (step), "r" (-step),
1177 "K" (PSL_IR | PSL_DR));
1178 }
1179
1180
1181 /* This has to be done in real mode !!! */
1182 void
1183 ppc4xx_tlb_flush(vaddr_t va, int pid)
1184 {
1185 u_long i, found;
1186 u_long msr;
1187
1188 /* If there's no context then it can't be mapped. */
1189 if (!pid)
1190 return;
1191
1192 asm("mfpid %1;" /* Save PID */
1193 "mfmsr %2;" /* Save MSR */
1194 "li %0,0;" /* Now clear MSR */
1195 "mtmsr %0;"
1196 "mtpid %4;" /* Set PID */
1197 "sync;"
1198 "tlbsx. %0,0,%3;" /* Search TLB */
1199 "sync;"
1200 "mtpid %1;" /* Restore PID */
1201 "mtmsr %2;" /* Restore MSR */
1202 "sync;isync;"
1203 "li %1,1;"
1204 "beq 1f;"
1205 "li %1,0;"
1206 "1:"
1207 : "=&r" (i), "=&r" (found), "=&r" (msr)
1208 : "r" (va), "r" (pid));
1209 if (found && !TLB_LOCKED(i)) {
1210
1211 /* Now flush translation */
1212 asm volatile(
1213 "tlbwe %0,%1,0;"
1214 "sync;isync;"
1215 : : "r" (0), "r" (i));
1216
1217 tlb_info[i].ti_ctx = 0;
1218 tlb_info[i].ti_flags = 0;
1219 tlbnext = i;
1220 /* Successful flushes */
1221 tlbflush_ev.ev_count++;
1222 }
1223 }
1224
1225 void
1226 ppc4xx_tlb_flush_all(void)
1227 {
1228 u_long i;
1229
1230 for (i = 0; i < NTLB; i++)
1231 if (!TLB_LOCKED(i)) {
1232 asm volatile(
1233 "tlbwe %0,%1,0;"
1234 "sync;isync;"
1235 : : "r" (0), "r" (i));
1236 tlb_info[i].ti_ctx = 0;
1237 tlb_info[i].ti_flags = 0;
1238 }
1239
1240 asm volatile("sync;isync");
1241 }
1242
1243 /* Find a TLB entry to evict. */
1244 static int
1245 ppc4xx_tlb_find_victim(void)
1246 {
1247 int flags;
1248
1249 for (;;) {
1250 if (++tlbnext >= NTLB)
1251 tlbnext = TLB_NRESERVED;
1252 flags = tlb_info[tlbnext].ti_flags;
1253 if (!(flags & TLBF_USED) ||
1254 (flags & (TLBF_LOCKED | TLBF_REF)) == 0) {
1255 u_long va, stack = (u_long)&va;
1256
1257 if (!((tlb_info[tlbnext].ti_va ^ stack) & (~PGOFSET)) &&
1258 (tlb_info[tlbnext].ti_ctx == KERNEL_PID) &&
1259 (flags & TLBF_USED)) {
1260 /* Kernel stack page */
1261 flags |= TLBF_USED;
1262 tlb_info[tlbnext].ti_flags = flags;
1263 } else {
1264 /* Found it! */
1265 return (tlbnext);
1266 }
1267 } else {
1268 tlb_info[tlbnext].ti_flags = (flags & ~TLBF_REF);
1269 }
1270 }
1271 }
1272
1273 void
1274 ppc4xx_tlb_enter(int ctx, vaddr_t va, u_int pte)
1275 {
1276 u_long th, tl, idx;
1277 tlbpid_t pid;
1278 u_short msr;
1279 paddr_t pa;
1280 int s, sz;
1281
1282 tlbenter_ev.ev_count++;
1283
1284 sz = (pte & TTE_SZ_MASK) >> TTE_SZ_SHIFT;
1285 pa = (pte & TTE_RPN_MASK(sz));
1286 th = (va & TLB_EPN_MASK) | (sz << TLB_SIZE_SHFT) | TLB_VALID;
1287 tl = (pte & ~TLB_RPN_MASK) | pa;
1288 tl |= ppc4xx_tlbflags(va, pa);
1289
1290 s = splhigh();
1291 idx = ppc4xx_tlb_find_victim();
1292
1293 #ifdef DIAGNOSTIC
1294 if ((idx < TLB_NRESERVED) || (idx >= NTLB)) {
1295 panic("ppc4xx_tlb_enter: replacing entry %ld", idx);
1296 }
1297 #endif
1298
1299 tlb_info[idx].ti_va = (va & TLB_EPN_MASK);
1300 tlb_info[idx].ti_ctx = ctx;
1301 tlb_info[idx].ti_flags = TLBF_USED | TLBF_REF;
1302
1303 asm volatile(
1304 "mfmsr %0;" /* Save MSR */
1305 "li %1,0;"
1306 "tlbwe %1,%3,0;" /* Invalidate old entry. */
1307 "mtmsr %1;" /* Clear MSR */
1308 "mfpid %1;" /* Save old PID */
1309 "mtpid %2;" /* Load translation ctx */
1310 "sync; isync;"
1311 #ifdef DEBUG
1312 "andi. %3,%3,63;"
1313 "tweqi %3,0;" /* XXXXX DEBUG trap on index 0 */
1314 #endif
1315 "tlbwe %4,%3,1; tlbwe %5,%3,0;" /* Set TLB */
1316 "sync; isync;"
1317 "mtpid %1; mtmsr %0;" /* Restore PID and MSR */
1318 "sync; isync;"
1319 : "=&r" (msr), "=&r" (pid)
1320 : "r" (ctx), "r" (idx), "r" (tl), "r" (th));
1321 splx(s);
1322 }
1323
1324 void
1325 ppc4xx_tlb_unpin(int i)
1326 {
1327
1328 if (i == -1)
1329 for (i = 0; i < TLB_NRESERVED; i++)
1330 tlb_info[i].ti_flags &= ~TLBF_LOCKED;
1331 else
1332 tlb_info[i].ti_flags &= ~TLBF_LOCKED;
1333 }
1334
1335 void
1336 ppc4xx_tlb_init(void)
1337 {
1338 int i;
1339
1340 /* Mark reserved TLB entries */
1341 for (i = 0; i < TLB_NRESERVED; i++) {
1342 tlb_info[i].ti_flags = TLBF_LOCKED | TLBF_USED;
1343 tlb_info[i].ti_ctx = KERNEL_PID;
1344 }
1345
1346 /* Setup security zones */
1347 /* Z0 - accessible by kernel only if TLB entry permissions allow
1348 * Z1,Z2 - access is controlled by TLB entry permissions
1349 * Z3 - full access regardless of TLB entry permissions
1350 */
1351
1352 asm volatile(
1353 "mtspr %0,%1;"
1354 "sync;"
1355 :: "K"(SPR_ZPR), "r" (0x1b000000));
1356 }
1357
1358
1359 /*
1360 * We should pass the ctx in from trap code.
1361 */
1362 int
1363 pmap_tlbmiss(vaddr_t va, int ctx)
1364 {
1365 volatile u_int *pte;
1366 u_long tte;
1367
1368 tlbmiss_ev.ev_count++;
1369
1370 /*
1371 * XXXX We will reserve 0-0x80000000 for va==pa mappings.
1372 */
1373 if (ctx != KERNEL_PID || (va & 0x80000000)) {
1374 pte = pte_find((struct pmap *)ctxbusy[ctx], va);
1375 if (pte == NULL) {
1376 /* Map unmanaged addresses directly for kernel access */
1377 return 1;
1378 }
1379 tte = *pte;
1380 if (tte == 0) {
1381 return 1;
1382 }
1383 } else {
1384 /* Create a 16MB writable mapping. */
1385 #ifdef PPC_4XX_NOCACHE
1386 tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_I | TTE_WR;
1387 #else
1388 tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_WR;
1389 #endif
1390 }
1391 tlbhit_ev.ev_count++;
1392 ppc4xx_tlb_enter(ctx, va, tte);
1393
1394 return 0;
1395 }
1396
1397 /*
1398 * Flush all the entries matching a context from the TLB.
1399 */
1400 static int
1401 ctx_flush(int cnum)
1402 {
1403 int i;
1404
1405 /* We gotta steal this context */
1406 for (i = TLB_NRESERVED; i < NTLB; i++) {
1407 if (tlb_info[i].ti_ctx == cnum) {
1408 /* Can't steal ctx if it has a locked entry. */
1409 if (TLB_LOCKED(i)) {
1410 #ifdef DIAGNOSTIC
1411 printf("ctx_flush: can't invalidate "
1412 "locked mapping %d "
1413 "for context %d\n", i, cnum);
1414 #ifdef DDB
1415 Debugger();
1416 #endif
1417 #endif
1418 return (1);
1419 }
1420 #ifdef DIAGNOSTIC
1421 if (i < TLB_NRESERVED)
1422 panic("TLB entry %d not locked", i);
1423 #endif
1424 /* Invalidate particular TLB entry regardless of locked status */
1425 asm volatile("tlbwe %0,%1,0" : :"r"(0),"r"(i));
1426 tlb_info[i].ti_flags = 0;
1427 }
1428 }
1429 return (0);
1430 }
1431
1432 /*
1433 * Allocate a context. If necessary, steal one from someone else.
1434 *
1435 * The new context is flushed from the TLB before returning.
1436 */
1437 int
1438 ctx_alloc(struct pmap *pm)
1439 {
1440 int s, cnum;
1441 static int next = MINCTX;
1442
1443 if (pm == pmap_kernel()) {
1444 #ifdef DIAGNOSTIC
1445 printf("ctx_alloc: kernel pmap!\n");
1446 #endif
1447 return (0);
1448 }
1449 s = splvm();
1450
1451 /* Find a likely context. */
1452 cnum = next;
1453 do {
1454 if ((++cnum) > NUMCTX)
1455 cnum = MINCTX;
1456 } while (ctxbusy[cnum] != NULL && cnum != next);
1457
1458 /* Now clean it out */
1459 oops:
1460 if (cnum < MINCTX)
1461 cnum = MINCTX; /* Never steal ctx 0 or 1 */
1462 if (ctx_flush(cnum)) {
1463 /* oops -- something's wired. */
1464 if ((++cnum) > NUMCTX)
1465 cnum = MINCTX;
1466 goto oops;
1467 }
1468
1469 if (ctxbusy[cnum]) {
1470 #ifdef DEBUG
1471 /* We should identify this pmap and clear it */
1472 printf("Warning: stealing context %d\n", cnum);
1473 #endif
1474 ctxbusy[cnum]->pm_ctx = 0;
1475 }
1476 ctxbusy[cnum] = pm;
1477 next = cnum;
1478 splx(s);
1479 pm->pm_ctx = cnum;
1480
1481 return cnum;
1482 }
1483
1484 /*
1485 * Give away a context.
1486 */
1487 void
1488 ctx_free(struct pmap *pm)
1489 {
1490 int oldctx;
1491
1492 oldctx = pm->pm_ctx;
1493
1494 if (oldctx == 0)
1495 panic("ctx_free: freeing kernel context");
1496 #ifdef DIAGNOSTIC
1497 if (ctxbusy[oldctx] == 0)
1498 printf("ctx_free: freeing free context %d\n", oldctx);
1499 if (ctxbusy[oldctx] != pm) {
1500 printf("ctx_free: freeing someone esle's context\n "
1501 "ctxbusy[%d] = %p, pm->pm_ctx = %p\n",
1502 oldctx, (void *)(u_long)ctxbusy[oldctx], pm);
1503 #ifdef DDB
1504 Debugger();
1505 #endif
1506 }
1507 #endif
1508 /* We should verify it has not been stolen and reallocated... */
1509 ctxbusy[oldctx] = NULL;
1510 ctx_flush(oldctx);
1511 }
1512
1513
1514 #ifdef DEBUG
1515 /*
1516 * Test ref/modify handling.
1517 */
1518 void pmap_testout __P((void));
1519 void
1520 pmap_testout()
1521 {
1522 vaddr_t va;
1523 volatile int *loc;
1524 int val = 0;
1525 paddr_t pa;
1526 struct vm_page *pg;
1527 int ref, mod;
1528
1529 /* Allocate a page */
1530 va = (vaddr_t)uvm_km_zalloc(kernel_map, PAGE_SIZE);
1531 loc = (int*)va;
1532
1533 pmap_extract(pmap_kernel(), va, &pa);
1534 pg = PHYS_TO_VM_PAGE(pa);
1535 pmap_unwire(pmap_kernel(), va);
1536
1537 pmap_remove(pmap_kernel(), va, va+1);
1538 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1539 pmap_update(pmap_kernel());
1540
1541 /* Now clear reference and modify */
1542 ref = pmap_clear_reference(pg);
1543 mod = pmap_clear_modify(pg);
1544 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1545 (void *)(u_long)va, (long)pa,
1546 ref, mod);
1547
1548 /* Check it's properly cleared */
1549 ref = pmap_is_referenced(pg);
1550 mod = pmap_is_modified(pg);
1551 printf("Checking cleared page: ref %d, mod %d\n",
1552 ref, mod);
1553
1554 /* Reference page */
1555 val = *loc;
1556
1557 ref = pmap_is_referenced(pg);
1558 mod = pmap_is_modified(pg);
1559 printf("Referenced page: ref %d, mod %d val %x\n",
1560 ref, mod, val);
1561
1562 /* Now clear reference and modify */
1563 ref = pmap_clear_reference(pg);
1564 mod = pmap_clear_modify(pg);
1565 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1566 (void *)(u_long)va, (long)pa,
1567 ref, mod);
1568
1569 /* Modify page */
1570 *loc = 1;
1571
1572 ref = pmap_is_referenced(pg);
1573 mod = pmap_is_modified(pg);
1574 printf("Modified page: ref %d, mod %d\n",
1575 ref, mod);
1576
1577 /* Now clear reference and modify */
1578 ref = pmap_clear_reference(pg);
1579 mod = pmap_clear_modify(pg);
1580 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1581 (void *)(u_long)va, (long)pa,
1582 ref, mod);
1583
1584 /* Check it's properly cleared */
1585 ref = pmap_is_referenced(pg);
1586 mod = pmap_is_modified(pg);
1587 printf("Checking cleared page: ref %d, mod %d\n",
1588 ref, mod);
1589
1590 /* Modify page */
1591 *loc = 1;
1592
1593 ref = pmap_is_referenced(pg);
1594 mod = pmap_is_modified(pg);
1595 printf("Modified page: ref %d, mod %d\n",
1596 ref, mod);
1597
1598 /* Check pmap_protect() */
1599 pmap_protect(pmap_kernel(), va, va+1, VM_PROT_READ);
1600 pmap_update(pmap_kernel());
1601 ref = pmap_is_referenced(pg);
1602 mod = pmap_is_modified(pg);
1603 printf("pmap_protect(VM_PROT_READ): ref %d, mod %d\n",
1604 ref, mod);
1605
1606 /* Now clear reference and modify */
1607 ref = pmap_clear_reference(pg);
1608 mod = pmap_clear_modify(pg);
1609 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1610 (void *)(u_long)va, (long)pa,
1611 ref, mod);
1612
1613 /* Reference page */
1614 val = *loc;
1615
1616 ref = pmap_is_referenced(pg);
1617 mod = pmap_is_modified(pg);
1618 printf("Referenced page: ref %d, mod %d val %x\n",
1619 ref, mod, val);
1620
1621 /* Now clear reference and modify */
1622 ref = pmap_clear_reference(pg);
1623 mod = pmap_clear_modify(pg);
1624 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1625 (void *)(u_long)va, (long)pa,
1626 ref, mod);
1627
1628 /* Modify page */
1629 #if 0
1630 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1631 pmap_update(pmap_kernel());
1632 #endif
1633 *loc = 1;
1634
1635 ref = pmap_is_referenced(pg);
1636 mod = pmap_is_modified(pg);
1637 printf("Modified page: ref %d, mod %d\n",
1638 ref, mod);
1639
1640 /* Check pmap_protect() */
1641 pmap_protect(pmap_kernel(), va, va+1, VM_PROT_NONE);
1642 pmap_update(pmap_kernel());
1643 ref = pmap_is_referenced(pg);
1644 mod = pmap_is_modified(pg);
1645 printf("pmap_protect(): ref %d, mod %d\n",
1646 ref, mod);
1647
1648 /* Now clear reference and modify */
1649 ref = pmap_clear_reference(pg);
1650 mod = pmap_clear_modify(pg);
1651 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1652 (void *)(u_long)va, (long)pa,
1653 ref, mod);
1654
1655 /* Reference page */
1656 val = *loc;
1657
1658 ref = pmap_is_referenced(pg);
1659 mod = pmap_is_modified(pg);
1660 printf("Referenced page: ref %d, mod %d val %x\n",
1661 ref, mod, val);
1662
1663 /* Now clear reference and modify */
1664 ref = pmap_clear_reference(pg);
1665 mod = pmap_clear_modify(pg);
1666 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1667 (void *)(u_long)va, (long)pa,
1668 ref, mod);
1669
1670 /* Modify page */
1671 #if 0
1672 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1673 pmap_update(pmap_kernel());
1674 #endif
1675 *loc = 1;
1676
1677 ref = pmap_is_referenced(pg);
1678 mod = pmap_is_modified(pg);
1679 printf("Modified page: ref %d, mod %d\n",
1680 ref, mod);
1681
1682 /* Check pmap_pag_protect() */
1683 pmap_page_protect(pg, VM_PROT_READ);
1684 ref = pmap_is_referenced(pg);
1685 mod = pmap_is_modified(pg);
1686 printf("pmap_page_protect(VM_PROT_READ): ref %d, mod %d\n",
1687 ref, mod);
1688
1689 /* Now clear reference and modify */
1690 ref = pmap_clear_reference(pg);
1691 mod = pmap_clear_modify(pg);
1692 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1693 (void *)(u_long)va, (long)pa,
1694 ref, mod);
1695
1696 /* Reference page */
1697 val = *loc;
1698
1699 ref = pmap_is_referenced(pg);
1700 mod = pmap_is_modified(pg);
1701 printf("Referenced page: ref %d, mod %d val %x\n",
1702 ref, mod, val);
1703
1704 /* Now clear reference and modify */
1705 ref = pmap_clear_reference(pg);
1706 mod = pmap_clear_modify(pg);
1707 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1708 (void *)(u_long)va, (long)pa,
1709 ref, mod);
1710
1711 /* Modify page */
1712 #if 0
1713 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1714 pmap_update(pmap_kernel());
1715 #endif
1716 *loc = 1;
1717
1718 ref = pmap_is_referenced(pg);
1719 mod = pmap_is_modified(pg);
1720 printf("Modified page: ref %d, mod %d\n",
1721 ref, mod);
1722
1723 /* Check pmap_pag_protect() */
1724 pmap_page_protect(pg, VM_PROT_NONE);
1725 ref = pmap_is_referenced(pg);
1726 mod = pmap_is_modified(pg);
1727 printf("pmap_page_protect(): ref %d, mod %d\n",
1728 ref, mod);
1729
1730 /* Now clear reference and modify */
1731 ref = pmap_clear_reference(pg);
1732 mod = pmap_clear_modify(pg);
1733 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1734 (void *)(u_long)va, (long)pa,
1735 ref, mod);
1736
1737
1738 /* Reference page */
1739 val = *loc;
1740
1741 ref = pmap_is_referenced(pg);
1742 mod = pmap_is_modified(pg);
1743 printf("Referenced page: ref %d, mod %d val %x\n",
1744 ref, mod, val);
1745
1746 /* Now clear reference and modify */
1747 ref = pmap_clear_reference(pg);
1748 mod = pmap_clear_modify(pg);
1749 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1750 (void *)(u_long)va, (long)pa,
1751 ref, mod);
1752
1753 /* Modify page */
1754 #if 0
1755 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1756 pmap_update(pmap_kernel());
1757 #endif
1758 *loc = 1;
1759
1760 ref = pmap_is_referenced(pg);
1761 mod = pmap_is_modified(pg);
1762 printf("Modified page: ref %d, mod %d\n",
1763 ref, mod);
1764
1765 /* Unmap page */
1766 pmap_remove(pmap_kernel(), va, va+1);
1767 pmap_update(pmap_kernel());
1768 ref = pmap_is_referenced(pg);
1769 mod = pmap_is_modified(pg);
1770 printf("Unmapped page: ref %d, mod %d\n", ref, mod);
1771
1772 /* Now clear reference and modify */
1773 ref = pmap_clear_reference(pg);
1774 mod = pmap_clear_modify(pg);
1775 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1776 (void *)(u_long)va, (long)pa, ref, mod);
1777
1778 /* Check it's properly cleared */
1779 ref = pmap_is_referenced(pg);
1780 mod = pmap_is_modified(pg);
1781 printf("Checking cleared page: ref %d, mod %d\n",
1782 ref, mod);
1783
1784 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL,
1785 VM_PROT_ALL|PMAP_WIRED);
1786 uvm_km_free(kernel_map, (vaddr_t)va, PAGE_SIZE);
1787 }
1788 #endif
1789