pmap.c revision 1.41 1 /* $NetBSD: pmap.c,v 1.41 2006/07/12 06:22:17 simonb Exp $ */
2
3 /*
4 * Copyright 2001 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
40 * Copyright (C) 1995, 1996 TooLs GmbH.
41 * All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by TooLs GmbH.
54 * 4. The name of TooLs GmbH may not be used to endorse or promote products
55 * derived from this software without specific prior written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
62 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
64 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
65 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 */
68
69 #include <sys/cdefs.h>
70 __KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.41 2006/07/12 06:22:17 simonb Exp $");
71
72 #include <sys/param.h>
73 #include <sys/malloc.h>
74 #include <sys/proc.h>
75 #include <sys/user.h>
76 #include <sys/queue.h>
77 #include <sys/systm.h>
78 #include <sys/pool.h>
79 #include <sys/device.h>
80
81 #include <uvm/uvm.h>
82
83 #include <machine/cpu.h>
84 #include <machine/pcb.h>
85 #include <machine/powerpc.h>
86
87 #include <powerpc/spr.h>
88 #include <machine/tlb.h>
89
90 /*
91 * kernmap is an array of PTEs large enough to map in
92 * 4GB. At 16KB/page it is 256K entries or 2MB.
93 */
94 #define KERNMAP_SIZE ((0xffffffffU/PAGE_SIZE)+1)
95 caddr_t kernmap;
96
97 #define MINCTX 2
98 #define NUMCTX 256
99 volatile struct pmap *ctxbusy[NUMCTX];
100
101 #define TLBF_USED 0x1
102 #define TLBF_REF 0x2
103 #define TLBF_LOCKED 0x4
104 #define TLB_LOCKED(i) (tlb_info[(i)].ti_flags & TLBF_LOCKED)
105 typedef struct tlb_info_s {
106 char ti_flags;
107 char ti_ctx; /* TLB_PID assiciated with the entry */
108 u_int ti_va;
109 } tlb_info_t;
110
111 volatile tlb_info_t tlb_info[NTLB];
112 /* We'll use a modified FIFO replacement policy cause it's cheap */
113 volatile int tlbnext = TLB_NRESERVED;
114
115 /* Event counters */
116 struct evcnt tlbmiss_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
117 NULL, "cpu", "tlbmiss");
118 struct evcnt tlbhit_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
119 NULL, "cpu", "tlbhit");
120 struct evcnt tlbflush_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
121 NULL, "cpu", "tlbflush");
122 struct evcnt tlbenter_ev = EVCNT_INITIALIZER(EVCNT_TYPE_TRAP,
123 NULL, "cpu", "tlbenter");
124
125 struct pmap kernel_pmap_;
126
127 int physmem;
128 static int npgs;
129 static u_int nextavail;
130 #ifndef MSGBUFADDR
131 extern paddr_t msgbuf_paddr;
132 #endif
133
134 static struct mem_region *mem, *avail;
135
136 /*
137 * This is a cache of referenced/modified bits.
138 * Bits herein are shifted by ATTRSHFT.
139 */
140 static char *pmap_attrib;
141
142 #define PV_WIRED 0x1
143 #define PV_WIRE(pv) ((pv)->pv_va |= PV_WIRED)
144 #define PV_UNWIRE(pv) ((pv)->pv_va &= ~PV_WIRED)
145 #define PV_ISWIRED(pv) ((pv)->pv_va & PV_WIRED)
146 #define PV_CMPVA(va,pv) (!(((pv)->pv_va ^ (va)) & (~PV_WIRED)))
147
148 struct pv_entry {
149 struct pv_entry *pv_next; /* Linked list of mappings */
150 vaddr_t pv_va; /* virtual address of mapping */
151 struct pmap *pv_pm;
152 };
153
154 struct pv_entry *pv_table;
155 static struct pool pv_pool;
156
157 static int pmap_initialized;
158
159 static int ctx_flush(int);
160
161 inline struct pv_entry *pa_to_pv(paddr_t);
162 static inline char *pa_to_attr(paddr_t);
163
164 static inline volatile u_int *pte_find(struct pmap *, vaddr_t);
165 static inline int pte_enter(struct pmap *, vaddr_t, u_int);
166
167 static inline int pmap_enter_pv(struct pmap *, vaddr_t, paddr_t, boolean_t);
168 static void pmap_remove_pv(struct pmap *, vaddr_t, paddr_t);
169
170
171 inline struct pv_entry *
172 pa_to_pv(paddr_t pa)
173 {
174 int bank, pg;
175
176 bank = vm_physseg_find(atop(pa), &pg);
177 if (bank == -1)
178 return NULL;
179 return &vm_physmem[bank].pmseg.pvent[pg];
180 }
181
182 static inline char *
183 pa_to_attr(paddr_t pa)
184 {
185 int bank, pg;
186
187 bank = vm_physseg_find(atop(pa), &pg);
188 if (bank == -1)
189 return NULL;
190 return &vm_physmem[bank].pmseg.attrs[pg];
191 }
192
193 /*
194 * Insert PTE into page table.
195 */
196 int
197 pte_enter(struct pmap *pm, vaddr_t va, u_int pte)
198 {
199 int seg = STIDX(va);
200 int ptn = PTIDX(va);
201 u_int oldpte;
202
203 if (!pm->pm_ptbl[seg]) {
204 /* Don't allocate a page to clear a non-existent mapping. */
205 if (!pte)
206 return (0);
207 /* Allocate a page XXXX this will sleep! */
208 pm->pm_ptbl[seg] =
209 (uint *)uvm_km_alloc(kernel_map, PAGE_SIZE, 0,
210 UVM_KMF_WIRED | UVM_KMF_ZERO);
211 }
212 oldpte = pm->pm_ptbl[seg][ptn];
213 pm->pm_ptbl[seg][ptn] = pte;
214
215 /* Flush entry. */
216 ppc4xx_tlb_flush(va, pm->pm_ctx);
217 if (oldpte != pte) {
218 if (pte == 0)
219 pm->pm_stats.resident_count--;
220 else
221 pm->pm_stats.resident_count++;
222 }
223 return (1);
224 }
225
226 /*
227 * Get a pointer to a PTE in a page table.
228 */
229 volatile u_int *
230 pte_find(struct pmap *pm, vaddr_t va)
231 {
232 int seg = STIDX(va);
233 int ptn = PTIDX(va);
234
235 if (pm->pm_ptbl[seg])
236 return (&pm->pm_ptbl[seg][ptn]);
237
238 return (NULL);
239 }
240
241 /*
242 * This is called during initppc, before the system is really initialized.
243 */
244 void
245 pmap_bootstrap(u_int kernelstart, u_int kernelend)
246 {
247 struct mem_region *mp, *mp1;
248 int cnt, i;
249 u_int s, e, sz;
250
251 /*
252 * Allocate the kernel page table at the end of
253 * kernel space so it's in the locked TTE.
254 */
255 kernmap = (caddr_t)kernelend;
256
257 /*
258 * Initialize kernel page table.
259 */
260 for (i = 0; i < STSZ; i++) {
261 pmap_kernel()->pm_ptbl[i] = 0;
262 }
263 ctxbusy[0] = ctxbusy[1] = pmap_kernel();
264
265 /*
266 * Announce page-size to the VM-system
267 */
268 uvmexp.pagesize = NBPG;
269 uvm_setpagesize();
270
271 /*
272 * Get memory.
273 */
274 mem_regions(&mem, &avail);
275 for (mp = mem; mp->size; mp++) {
276 physmem += btoc(mp->size);
277 printf("+%lx,",mp->size);
278 }
279 printf("\n");
280 ppc4xx_tlb_init();
281 /*
282 * Count the number of available entries.
283 */
284 for (cnt = 0, mp = avail; mp->size; mp++)
285 cnt++;
286
287 /*
288 * Page align all regions.
289 * Non-page aligned memory isn't very interesting to us.
290 * Also, sort the entries for ascending addresses.
291 */
292 kernelstart &= ~PGOFSET;
293 kernelend = (kernelend + PGOFSET) & ~PGOFSET;
294 for (mp = avail; mp->size; mp++) {
295 s = mp->start;
296 e = mp->start + mp->size;
297 printf("%08x-%08x -> ",s,e);
298 /*
299 * Check whether this region holds all of the kernel.
300 */
301 if (s < kernelstart && e > kernelend) {
302 avail[cnt].start = kernelend;
303 avail[cnt++].size = e - kernelend;
304 e = kernelstart;
305 }
306 /*
307 * Look whether this regions starts within the kernel.
308 */
309 if (s >= kernelstart && s < kernelend) {
310 if (e <= kernelend)
311 goto empty;
312 s = kernelend;
313 }
314 /*
315 * Now look whether this region ends within the kernel.
316 */
317 if (e > kernelstart && e <= kernelend) {
318 if (s >= kernelstart)
319 goto empty;
320 e = kernelstart;
321 }
322 /*
323 * Now page align the start and size of the region.
324 */
325 s = round_page(s);
326 e = trunc_page(e);
327 if (e < s)
328 e = s;
329 sz = e - s;
330 printf("%08x-%08x = %x\n",s,e,sz);
331 /*
332 * Check whether some memory is left here.
333 */
334 if (sz == 0) {
335 empty:
336 memmove(mp, mp + 1,
337 (cnt - (mp - avail)) * sizeof *mp);
338 cnt--;
339 mp--;
340 continue;
341 }
342 /*
343 * Do an insertion sort.
344 */
345 npgs += btoc(sz);
346 for (mp1 = avail; mp1 < mp; mp1++)
347 if (s < mp1->start)
348 break;
349 if (mp1 < mp) {
350 memmove(mp1 + 1, mp1, (char *)mp - (char *)mp1);
351 mp1->start = s;
352 mp1->size = sz;
353 } else {
354 mp->start = s;
355 mp->size = sz;
356 }
357 }
358
359 /*
360 * We cannot do pmap_steal_memory here,
361 * since we don't run with translation enabled yet.
362 */
363 #ifndef MSGBUFADDR
364 /*
365 * allow for msgbuf
366 */
367 sz = round_page(MSGBUFSIZE);
368 mp = NULL;
369 for (mp1 = avail; mp1->size; mp1++)
370 if (mp1->size >= sz)
371 mp = mp1;
372 if (mp == NULL)
373 panic("not enough memory?");
374
375 npgs -= btoc(sz);
376 msgbuf_paddr = mp->start + mp->size - sz;
377 mp->size -= sz;
378 if (mp->size <= 0)
379 memmove(mp, mp + 1, (cnt - (mp - avail)) * sizeof *mp);
380 #endif
381
382 for (mp = avail; mp->size; mp++)
383 uvm_page_physload(atop(mp->start), atop(mp->start + mp->size),
384 atop(mp->start), atop(mp->start + mp->size),
385 VM_FREELIST_DEFAULT);
386
387 /*
388 * Initialize kernel pmap and hardware.
389 */
390 /* Setup TLB pid allocator so it knows we alreadu using PID 1 */
391 pmap_kernel()->pm_ctx = KERNEL_PID;
392 nextavail = avail->start;
393
394
395 evcnt_attach_static(&tlbmiss_ev);
396 evcnt_attach_static(&tlbhit_ev);
397 evcnt_attach_static(&tlbflush_ev);
398 evcnt_attach_static(&tlbenter_ev);
399 }
400
401 /*
402 * Restrict given range to physical memory
403 *
404 * (Used by /dev/mem)
405 */
406 void
407 pmap_real_memory(paddr_t *start, psize_t *size)
408 {
409 struct mem_region *mp;
410
411 for (mp = mem; mp->size; mp++) {
412 if (*start + *size > mp->start &&
413 *start < mp->start + mp->size) {
414 if (*start < mp->start) {
415 *size -= mp->start - *start;
416 *start = mp->start;
417 }
418 if (*start + *size > mp->start + mp->size)
419 *size = mp->start + mp->size - *start;
420 return;
421 }
422 }
423 *size = 0;
424 }
425
426 /*
427 * Initialize anything else for pmap handling.
428 * Called during vm_init().
429 */
430 void
431 pmap_init(void)
432 {
433 struct pv_entry *pv;
434 vsize_t sz;
435 vaddr_t addr;
436 int i, s;
437 int bank;
438 char *attr;
439
440 sz = (vsize_t)((sizeof(struct pv_entry) + 1) * npgs);
441 sz = round_page(sz);
442 addr = uvm_km_alloc(kernel_map, sz, 0, UVM_KMF_WIRED | UVM_KMF_ZERO);
443 s = splvm();
444 pv = pv_table = (struct pv_entry *)addr;
445 for (i = npgs; --i >= 0;)
446 pv++->pv_pm = NULL;
447 pmap_attrib = (char *)pv;
448 memset(pv, 0, npgs);
449
450 pv = pv_table;
451 attr = pmap_attrib;
452 for (bank = 0; bank < vm_nphysseg; bank++) {
453 sz = vm_physmem[bank].end - vm_physmem[bank].start;
454 vm_physmem[bank].pmseg.pvent = pv;
455 vm_physmem[bank].pmseg.attrs = attr;
456 pv += sz;
457 attr += sz;
458 }
459
460 pmap_initialized = 1;
461 splx(s);
462
463 /* Setup a pool for additional pvlist structures */
464 pool_init(&pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pv_entry", NULL);
465 }
466
467 /*
468 * How much virtual space is available to the kernel?
469 */
470 void
471 pmap_virtual_space(vaddr_t *start, vaddr_t *end)
472 {
473
474 #if 0
475 /*
476 * Reserve one segment for kernel virtual memory
477 */
478 *start = (vaddr_t)(KERNEL_SR << ADDR_SR_SHFT);
479 *end = *start + SEGMENT_LENGTH;
480 #else
481 *start = (vaddr_t) VM_MIN_KERNEL_ADDRESS;
482 *end = (vaddr_t) VM_MAX_KERNEL_ADDRESS;
483 #endif
484 }
485
486 #ifdef PMAP_GROWKERNEL
487 /*
488 * Preallocate kernel page tables to a specified VA.
489 * This simply loops through the first TTE for each
490 * page table from the beginning of the kernel pmap,
491 * reads the entry, and if the result is
492 * zero (either invalid entry or no page table) it stores
493 * a zero there, populating page tables in the process.
494 * This is not the most efficient technique but i don't
495 * expect it to be called that often.
496 */
497 extern struct vm_page *vm_page_alloc1 __P((void));
498 extern void vm_page_free1 __P((struct vm_page *));
499
500 vaddr_t kbreak = VM_MIN_KERNEL_ADDRESS;
501
502 vaddr_t
503 pmap_growkernel(vaddr_t maxkvaddr)
504 {
505 int s;
506 int seg;
507 paddr_t pg;
508 struct pmap *pm = pmap_kernel();
509
510 s = splvm();
511
512 /* Align with the start of a page table */
513 for (kbreak &= ~(PTMAP-1); kbreak < maxkvaddr;
514 kbreak += PTMAP) {
515 seg = STIDX(kbreak);
516
517 if (pte_find(pm, kbreak))
518 continue;
519
520 if (uvm.page_init_done) {
521 pg = (paddr_t)VM_PAGE_TO_PHYS(vm_page_alloc1());
522 } else {
523 if (!uvm_page_physget(&pg))
524 panic("pmap_growkernel: no memory");
525 }
526 if (!pg)
527 panic("pmap_growkernel: no pages");
528 pmap_zero_page((paddr_t)pg);
529
530 /* XXX This is based on all phymem being addressable */
531 pm->pm_ptbl[seg] = (u_int *)pg;
532 }
533 splx(s);
534 return (kbreak);
535 }
536
537 /*
538 * vm_page_alloc1:
539 *
540 * Allocate and return a memory cell with no associated object.
541 */
542 struct vm_page *
543 vm_page_alloc1(void)
544 {
545 struct vm_page *pg;
546
547 pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_USERESERVE);
548 if (pg) {
549 pg->wire_count = 1; /* no mappings yet */
550 pg->flags &= ~PG_BUSY; /* never busy */
551 }
552 return pg;
553 }
554
555 /*
556 * vm_page_free1:
557 *
558 * Returns the given page to the free list,
559 * disassociating it with any VM object.
560 *
561 * Object and page must be locked prior to entry.
562 */
563 void
564 vm_page_free1(struct vm_page *pg)
565 {
566 #ifdef DIAGNOSTIC
567 if (pg->flags != (PG_CLEAN|PG_FAKE)) {
568 printf("Freeing invalid page %p\n", pg);
569 printf("pa = %llx\n", (unsigned long long)VM_PAGE_TO_PHYS(pg));
570 #ifdef DDB
571 Debugger();
572 #endif
573 return;
574 }
575 #endif
576 pg->flags |= PG_BUSY;
577 pg->wire_count = 0;
578 uvm_pagefree(pg);
579 }
580 #endif
581
582 /*
583 * Create and return a physical map.
584 */
585 struct pmap *
586 pmap_create(void)
587 {
588 struct pmap *pm;
589
590 pm = malloc(sizeof *pm, M_VMPMAP, M_WAITOK);
591 memset(pm, 0, sizeof *pm);
592 pm->pm_refs = 1;
593 return pm;
594 }
595
596 /*
597 * Add a reference to the given pmap.
598 */
599 void
600 pmap_reference(struct pmap *pm)
601 {
602
603 pm->pm_refs++;
604 }
605
606 /*
607 * Retire the given pmap from service.
608 * Should only be called if the map contains no valid mappings.
609 */
610 void
611 pmap_destroy(struct pmap *pm)
612 {
613 int i;
614
615 if (--pm->pm_refs > 0) {
616 return;
617 }
618 KASSERT(pm->pm_stats.resident_count == 0);
619 KASSERT(pm->pm_stats.wired_count == 0);
620 for (i = 0; i < STSZ; i++)
621 if (pm->pm_ptbl[i]) {
622 uvm_km_free(kernel_map, (vaddr_t)pm->pm_ptbl[i],
623 PAGE_SIZE, UVM_KMF_WIRED);
624 pm->pm_ptbl[i] = NULL;
625 }
626 if (pm->pm_ctx)
627 ctx_free(pm);
628 free(pm, M_VMPMAP);
629 }
630
631 /*
632 * Copy the range specified by src_addr/len
633 * from the source map to the range dst_addr/len
634 * in the destination map.
635 *
636 * This routine is only advisory and need not do anything.
637 */
638 void
639 pmap_copy(struct pmap *dst_pmap, struct pmap *src_pmap, vaddr_t dst_addr,
640 vsize_t len, vaddr_t src_addr)
641 {
642 }
643
644 /*
645 * Require that all active physical maps contain no
646 * incorrect entries NOW.
647 */
648 void
649 pmap_update(struct pmap *pmap)
650 {
651 }
652
653 /*
654 * Garbage collects the physical map system for
655 * pages which are no longer used.
656 * Success need not be guaranteed -- that is, there
657 * may well be pages which are not referenced, but
658 * others may be collected.
659 * Called by the pageout daemon when pages are scarce.
660 */
661 void
662 pmap_collect(struct pmap *pm)
663 {
664 }
665
666 /*
667 * Fill the given physical page with zeroes.
668 */
669 void
670 pmap_zero_page(paddr_t pa)
671 {
672
673 #ifdef PPC_4XX_NOCACHE
674 memset((caddr_t)pa, 0, PAGE_SIZE);
675 #else
676 int i;
677
678 for (i = PAGE_SIZE/CACHELINESIZE; i > 0; i--) {
679 __asm volatile ("dcbz 0,%0" :: "r"(pa));
680 pa += CACHELINESIZE;
681 }
682 #endif
683 }
684
685 /*
686 * Copy the given physical source page to its destination.
687 */
688 void
689 pmap_copy_page(paddr_t src, paddr_t dst)
690 {
691
692 memcpy((caddr_t)dst, (caddr_t)src, PAGE_SIZE);
693 dcache_flush_page(dst);
694 }
695
696 /*
697 * This returns whether this is the first mapping of a page.
698 */
699 static inline int
700 pmap_enter_pv(struct pmap *pm, vaddr_t va, paddr_t pa, boolean_t wired)
701 {
702 struct pv_entry *pv, *npv = NULL;
703 int s;
704
705 if (!pmap_initialized)
706 return 0;
707
708 s = splvm();
709 pv = pa_to_pv(pa);
710 if (!pv->pv_pm) {
711 /*
712 * No entries yet, use header as the first entry.
713 */
714 pv->pv_va = va;
715 pv->pv_pm = pm;
716 pv->pv_next = NULL;
717 } else {
718 /*
719 * There is at least one other VA mapping this page.
720 * Place this entry after the header.
721 */
722 npv = pool_get(&pv_pool, PR_WAITOK);
723 npv->pv_va = va;
724 npv->pv_pm = pm;
725 npv->pv_next = pv->pv_next;
726 pv->pv_next = npv;
727 pv = npv;
728 }
729 if (wired) {
730 PV_WIRE(pv);
731 pm->pm_stats.wired_count++;
732 }
733 splx(s);
734 return (1);
735 }
736
737 static void
738 pmap_remove_pv(struct pmap *pm, vaddr_t va, paddr_t pa)
739 {
740 struct pv_entry *pv, *npv;
741
742 /*
743 * Remove from the PV table.
744 */
745 pv = pa_to_pv(pa);
746 if (!pv)
747 return;
748
749 /*
750 * If it is the first entry on the list, it is actually
751 * in the header and we must copy the following entry up
752 * to the header. Otherwise we must search the list for
753 * the entry. In either case we free the now unused entry.
754 */
755 if (pm == pv->pv_pm && PV_CMPVA(va, pv)) {
756 if (PV_ISWIRED(pv)) {
757 pm->pm_stats.wired_count--;
758 }
759 if ((npv = pv->pv_next)) {
760 *pv = *npv;
761 pool_put(&pv_pool, npv);
762 } else
763 pv->pv_pm = NULL;
764 } else {
765 for (; (npv = pv->pv_next) != NULL; pv = npv)
766 if (pm == npv->pv_pm && PV_CMPVA(va, npv))
767 break;
768 if (npv) {
769 pv->pv_next = npv->pv_next;
770 if (PV_ISWIRED(npv)) {
771 pm->pm_stats.wired_count--;
772 }
773 pool_put(&pv_pool, npv);
774 }
775 }
776 }
777
778 /*
779 * Insert physical page at pa into the given pmap at virtual address va.
780 */
781 int
782 pmap_enter(struct pmap *pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags)
783 {
784 int s;
785 u_int tte;
786 int managed;
787
788 /*
789 * Have to remove any existing mapping first.
790 */
791 pmap_remove(pm, va, va + PAGE_SIZE);
792
793 if (flags & PMAP_WIRED)
794 flags |= prot;
795
796 managed = 0;
797 if (vm_physseg_find(atop(pa), NULL) != -1)
798 managed = 1;
799
800 /*
801 * Generate TTE.
802 */
803 tte = TTE_PA(pa);
804 /* XXXX -- need to support multiple page sizes. */
805 tte |= TTE_SZ_16K;
806 #ifdef DIAGNOSTIC
807 if ((flags & (PME_NOCACHE | PME_WRITETHROUG)) ==
808 (PME_NOCACHE | PME_WRITETHROUG))
809 panic("pmap_enter: uncached & writethrough");
810 #endif
811 if (flags & PME_NOCACHE)
812 /* Must be I/O mapping */
813 tte |= TTE_I | TTE_G;
814 #ifdef PPC_4XX_NOCACHE
815 tte |= TTE_I;
816 #else
817 else if (flags & PME_WRITETHROUG)
818 /* Uncached and writethrough are not compatible */
819 tte |= TTE_W;
820 #endif
821 if (pm == pmap_kernel())
822 tte |= TTE_ZONE(ZONE_PRIV);
823 else
824 tte |= TTE_ZONE(ZONE_USER);
825
826 if (flags & VM_PROT_WRITE)
827 tte |= TTE_WR;
828
829 if (flags & VM_PROT_EXECUTE)
830 tte |= TTE_EX;
831
832 /*
833 * Now record mapping for later back-translation.
834 */
835 if (pmap_initialized && managed) {
836 char *attr;
837
838 if (!pmap_enter_pv(pm, va, pa, flags & PMAP_WIRED)) {
839 /* Could not enter pv on a managed page */
840 return 1;
841 }
842
843 /* Now set attributes. */
844 attr = pa_to_attr(pa);
845 #ifdef DIAGNOSTIC
846 if (!attr)
847 panic("managed but no attr");
848 #endif
849 if (flags & VM_PROT_ALL)
850 *attr |= PMAP_ATTR_REF;
851 if (flags & VM_PROT_WRITE)
852 *attr |= PMAP_ATTR_CHG;
853 }
854
855 s = splvm();
856
857 /* Insert page into page table. */
858 pte_enter(pm, va, tte);
859
860 /* If this is a real fault, enter it in the tlb */
861 if (tte && ((flags & PMAP_WIRED) == 0)) {
862 ppc4xx_tlb_enter(pm->pm_ctx, va, tte);
863 }
864 splx(s);
865
866 /* Flush the real memory from the instruction cache. */
867 if ((prot & VM_PROT_EXECUTE) && (tte & TTE_I) == 0)
868 __syncicache((void *)pa, PAGE_SIZE);
869
870 return 0;
871 }
872
873 void
874 pmap_unwire(struct pmap *pm, vaddr_t va)
875 {
876 struct pv_entry *pv;
877 paddr_t pa;
878 int s;
879
880 if (!pmap_extract(pm, va, &pa)) {
881 return;
882 }
883
884 pv = pa_to_pv(pa);
885 if (!pv)
886 return;
887
888 s = splvm();
889 while (pv != NULL) {
890 if (pm == pv->pv_pm && PV_CMPVA(va, pv)) {
891 if (PV_ISWIRED(pv)) {
892 PV_UNWIRE(pv);
893 pm->pm_stats.wired_count--;
894 }
895 break;
896 }
897 pv = pv->pv_next;
898 }
899 splx(s);
900 }
901
902 void
903 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot)
904 {
905 int s;
906 u_int tte;
907 struct pmap *pm = pmap_kernel();
908
909 /*
910 * Have to remove any existing mapping first.
911 */
912
913 /*
914 * Generate TTE.
915 *
916 * XXXX
917 *
918 * Since the kernel does not handle execution privileges properly,
919 * we will handle read and execute permissions together.
920 */
921 tte = 0;
922 if (prot & VM_PROT_ALL) {
923
924 tte = TTE_PA(pa) | TTE_EX | TTE_ZONE(ZONE_PRIV);
925 /* XXXX -- need to support multiple page sizes. */
926 tte |= TTE_SZ_16K;
927 #ifdef DIAGNOSTIC
928 if ((prot & (PME_NOCACHE | PME_WRITETHROUG)) ==
929 (PME_NOCACHE | PME_WRITETHROUG))
930 panic("pmap_kenter_pa: uncached & writethrough");
931 #endif
932 if (prot & PME_NOCACHE)
933 /* Must be I/O mapping */
934 tte |= TTE_I | TTE_G;
935 #ifdef PPC_4XX_NOCACHE
936 tte |= TTE_I;
937 #else
938 else if (prot & PME_WRITETHROUG)
939 /* Uncached and writethrough are not compatible */
940 tte |= TTE_W;
941 #endif
942 if (prot & VM_PROT_WRITE)
943 tte |= TTE_WR;
944 }
945
946 s = splvm();
947
948 /* Insert page into page table. */
949 pte_enter(pm, va, tte);
950 splx(s);
951 }
952
953 void
954 pmap_kremove(vaddr_t va, vsize_t len)
955 {
956
957 while (len > 0) {
958 pte_enter(pmap_kernel(), va, 0);
959 va += PAGE_SIZE;
960 len -= PAGE_SIZE;
961 }
962 }
963
964 /*
965 * Remove the given range of mapping entries.
966 */
967 void
968 pmap_remove(struct pmap *pm, vaddr_t va, vaddr_t endva)
969 {
970 int s;
971 paddr_t pa;
972 volatile u_int *ptp;
973
974 s = splvm();
975 while (va < endva) {
976
977 if ((ptp = pte_find(pm, va)) && (pa = *ptp)) {
978 pa = TTE_PA(pa);
979 pmap_remove_pv(pm, va, pa);
980 *ptp = 0;
981 ppc4xx_tlb_flush(va, pm->pm_ctx);
982 pm->pm_stats.resident_count--;
983 }
984 va += PAGE_SIZE;
985 }
986
987 splx(s);
988 }
989
990 /*
991 * Get the physical page address for the given pmap/virtual address.
992 */
993 boolean_t
994 pmap_extract(struct pmap *pm, vaddr_t va, paddr_t *pap)
995 {
996 int seg = STIDX(va);
997 int ptn = PTIDX(va);
998 u_int pa = 0;
999 int s;
1000
1001 s = splvm();
1002 if (pm->pm_ptbl[seg] && (pa = pm->pm_ptbl[seg][ptn])) {
1003 *pap = TTE_PA(pa) | (va & PGOFSET);
1004 }
1005 splx(s);
1006 return (pa != 0);
1007 }
1008
1009 /*
1010 * Lower the protection on the specified range of this pmap.
1011 *
1012 * There are only two cases: either the protection is going to 0,
1013 * or it is going to read-only.
1014 */
1015 void
1016 pmap_protect(struct pmap *pm, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
1017 {
1018 volatile u_int *ptp;
1019 int s, bic;
1020
1021 if ((prot & VM_PROT_READ) == 0) {
1022 pmap_remove(pm, sva, eva);
1023 return;
1024 }
1025 bic = 0;
1026 if ((prot & VM_PROT_WRITE) == 0) {
1027 bic |= TTE_WR;
1028 }
1029 if ((prot & VM_PROT_EXECUTE) == 0) {
1030 bic |= TTE_EX;
1031 }
1032 if (bic == 0) {
1033 return;
1034 }
1035 s = splvm();
1036 while (sva < eva) {
1037 if ((ptp = pte_find(pm, sva)) != NULL) {
1038 *ptp &= ~bic;
1039 ppc4xx_tlb_flush(sva, pm->pm_ctx);
1040 }
1041 sva += PAGE_SIZE;
1042 }
1043 splx(s);
1044 }
1045
1046 boolean_t
1047 pmap_check_attr(struct vm_page *pg, u_int mask, int clear)
1048 {
1049 paddr_t pa;
1050 char *attr;
1051 int s, rv;
1052
1053 /*
1054 * First modify bits in cache.
1055 */
1056 pa = VM_PAGE_TO_PHYS(pg);
1057 attr = pa_to_attr(pa);
1058 if (attr == NULL)
1059 return FALSE;
1060
1061 s = splvm();
1062 rv = ((*attr & mask) != 0);
1063 if (clear) {
1064 *attr &= ~mask;
1065 pmap_page_protect(pg, mask == PMAP_ATTR_CHG ? VM_PROT_READ : 0);
1066 }
1067 splx(s);
1068 return rv;
1069 }
1070
1071
1072 /*
1073 * Lower the protection on the specified physical page.
1074 *
1075 * There are only two cases: either the protection is going to 0,
1076 * or it is going to read-only.
1077 */
1078 void
1079 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
1080 {
1081 paddr_t pa = VM_PAGE_TO_PHYS(pg);
1082 vaddr_t va;
1083 struct pv_entry *pvh, *pv, *npv;
1084 struct pmap *pm;
1085
1086 pvh = pa_to_pv(pa);
1087 if (pvh == NULL)
1088 return;
1089
1090 /* Handle extra pvs which may be deleted in the operation */
1091 for (pv = pvh->pv_next; pv; pv = npv) {
1092 npv = pv->pv_next;
1093
1094 pm = pv->pv_pm;
1095 va = pv->pv_va;
1096 pmap_protect(pm, va, va + PAGE_SIZE, prot);
1097 }
1098 /* Now check the head pv */
1099 if (pvh->pv_pm) {
1100 pv = pvh;
1101 pm = pv->pv_pm;
1102 va = pv->pv_va;
1103 pmap_protect(pm, va, va + PAGE_SIZE, prot);
1104 }
1105 }
1106
1107 /*
1108 * Activate the address space for the specified process. If the process
1109 * is the current process, load the new MMU context.
1110 */
1111 void
1112 pmap_activate(struct lwp *l)
1113 {
1114 #if 0
1115 struct pcb *pcb = &l->l_proc->p_addr->u_pcb;
1116 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap;
1117
1118 /*
1119 * XXX Normally performed in cpu_fork().
1120 */
1121 printf("pmap_activate(%p), pmap=%p\n",l,pmap);
1122 pcb->pcb_pm = pmap;
1123 #endif
1124 }
1125
1126 /*
1127 * Deactivate the specified process's address space.
1128 */
1129 void
1130 pmap_deactivate(struct lwp *l)
1131 {
1132 }
1133
1134 /*
1135 * Synchronize caches corresponding to [addr, addr+len) in p.
1136 */
1137 void
1138 pmap_procwr(struct proc *p, vaddr_t va, size_t len)
1139 {
1140 struct pmap *pm = p->p_vmspace->vm_map.pmap;
1141 int msr, ctx, opid, step;
1142
1143 step = CACHELINESIZE;
1144
1145 /*
1146 * Need to turn off IMMU and switch to user context.
1147 * (icbi uses DMMU).
1148 */
1149 if (!(ctx = pm->pm_ctx)) {
1150 /* No context -- assign it one */
1151 ctx_alloc(pm);
1152 ctx = pm->pm_ctx;
1153 }
1154 __asm volatile("mfmsr %0;"
1155 "li %1, %7;"
1156 "andc %1,%0,%1;"
1157 "mtmsr %1;"
1158 "sync;isync;"
1159 "mfpid %1;"
1160 "mtpid %2;"
1161 "sync; isync;"
1162 "1:"
1163 "dcbf 0,%3;"
1164 "icbi 0,%3;"
1165 "add %3,%3,%5;"
1166 "addc. %4,%4,%6;"
1167 "bge 1b;"
1168 "mtpid %1;"
1169 "mtmsr %0;"
1170 "sync; isync"
1171 : "=&r" (msr), "=&r" (opid)
1172 : "r" (ctx), "r" (va), "r" (len), "r" (step), "r" (-step),
1173 "K" (PSL_IR | PSL_DR));
1174 }
1175
1176
1177 /* This has to be done in real mode !!! */
1178 void
1179 ppc4xx_tlb_flush(vaddr_t va, int pid)
1180 {
1181 u_long i, found;
1182 u_long msr;
1183
1184 /* If there's no context then it can't be mapped. */
1185 if (!pid)
1186 return;
1187
1188 __asm("mfpid %1;" /* Save PID */
1189 "mfmsr %2;" /* Save MSR */
1190 "li %0,0;" /* Now clear MSR */
1191 "mtmsr %0;"
1192 "mtpid %4;" /* Set PID */
1193 "sync;"
1194 "tlbsx. %0,0,%3;" /* Search TLB */
1195 "sync;"
1196 "mtpid %1;" /* Restore PID */
1197 "mtmsr %2;" /* Restore MSR */
1198 "sync;isync;"
1199 "li %1,1;"
1200 "beq 1f;"
1201 "li %1,0;"
1202 "1:"
1203 : "=&r" (i), "=&r" (found), "=&r" (msr)
1204 : "r" (va), "r" (pid));
1205 if (found && !TLB_LOCKED(i)) {
1206
1207 /* Now flush translation */
1208 __asm volatile(
1209 "tlbwe %0,%1,0;"
1210 "sync;isync;"
1211 : : "r" (0), "r" (i));
1212
1213 tlb_info[i].ti_ctx = 0;
1214 tlb_info[i].ti_flags = 0;
1215 tlbnext = i;
1216 /* Successful flushes */
1217 tlbflush_ev.ev_count++;
1218 }
1219 }
1220
1221 void
1222 ppc4xx_tlb_flush_all(void)
1223 {
1224 u_long i;
1225
1226 for (i = 0; i < NTLB; i++)
1227 if (!TLB_LOCKED(i)) {
1228 __asm volatile(
1229 "tlbwe %0,%1,0;"
1230 "sync;isync;"
1231 : : "r" (0), "r" (i));
1232 tlb_info[i].ti_ctx = 0;
1233 tlb_info[i].ti_flags = 0;
1234 }
1235
1236 __asm volatile("sync;isync");
1237 }
1238
1239 /* Find a TLB entry to evict. */
1240 static int
1241 ppc4xx_tlb_find_victim(void)
1242 {
1243 int flags;
1244
1245 for (;;) {
1246 if (++tlbnext >= NTLB)
1247 tlbnext = TLB_NRESERVED;
1248 flags = tlb_info[tlbnext].ti_flags;
1249 if (!(flags & TLBF_USED) ||
1250 (flags & (TLBF_LOCKED | TLBF_REF)) == 0) {
1251 u_long va, stack = (u_long)&va;
1252
1253 if (!((tlb_info[tlbnext].ti_va ^ stack) & (~PGOFSET)) &&
1254 (tlb_info[tlbnext].ti_ctx == KERNEL_PID) &&
1255 (flags & TLBF_USED)) {
1256 /* Kernel stack page */
1257 flags |= TLBF_USED;
1258 tlb_info[tlbnext].ti_flags = flags;
1259 } else {
1260 /* Found it! */
1261 return (tlbnext);
1262 }
1263 } else {
1264 tlb_info[tlbnext].ti_flags = (flags & ~TLBF_REF);
1265 }
1266 }
1267 }
1268
1269 void
1270 ppc4xx_tlb_enter(int ctx, vaddr_t va, u_int pte)
1271 {
1272 u_long th, tl, idx;
1273 tlbpid_t pid;
1274 u_short msr;
1275 paddr_t pa;
1276 int s, sz;
1277
1278 tlbenter_ev.ev_count++;
1279
1280 sz = (pte & TTE_SZ_MASK) >> TTE_SZ_SHIFT;
1281 pa = (pte & TTE_RPN_MASK(sz));
1282 th = (va & TLB_EPN_MASK) | (sz << TLB_SIZE_SHFT) | TLB_VALID;
1283 tl = (pte & ~TLB_RPN_MASK) | pa;
1284 tl |= ppc4xx_tlbflags(va, pa);
1285
1286 s = splhigh();
1287 idx = ppc4xx_tlb_find_victim();
1288
1289 #ifdef DIAGNOSTIC
1290 if ((idx < TLB_NRESERVED) || (idx >= NTLB)) {
1291 panic("ppc4xx_tlb_enter: replacing entry %ld", idx);
1292 }
1293 #endif
1294
1295 tlb_info[idx].ti_va = (va & TLB_EPN_MASK);
1296 tlb_info[idx].ti_ctx = ctx;
1297 tlb_info[idx].ti_flags = TLBF_USED | TLBF_REF;
1298
1299 __asm volatile(
1300 "mfmsr %0;" /* Save MSR */
1301 "li %1,0;"
1302 "tlbwe %1,%3,0;" /* Invalidate old entry. */
1303 "mtmsr %1;" /* Clear MSR */
1304 "mfpid %1;" /* Save old PID */
1305 "mtpid %2;" /* Load translation ctx */
1306 "sync; isync;"
1307 #ifdef DEBUG
1308 "andi. %3,%3,63;"
1309 "tweqi %3,0;" /* XXXXX DEBUG trap on index 0 */
1310 #endif
1311 "tlbwe %4,%3,1; tlbwe %5,%3,0;" /* Set TLB */
1312 "sync; isync;"
1313 "mtpid %1; mtmsr %0;" /* Restore PID and MSR */
1314 "sync; isync;"
1315 : "=&r" (msr), "=&r" (pid)
1316 : "r" (ctx), "r" (idx), "r" (tl), "r" (th));
1317 splx(s);
1318 }
1319
1320 void
1321 ppc4xx_tlb_init(void)
1322 {
1323 int i;
1324
1325 /* Mark reserved TLB entries */
1326 for (i = 0; i < TLB_NRESERVED; i++) {
1327 tlb_info[i].ti_flags = TLBF_LOCKED | TLBF_USED;
1328 tlb_info[i].ti_ctx = KERNEL_PID;
1329 }
1330
1331 /* Setup security zones */
1332 /* Z0 - accessible by kernel only if TLB entry permissions allow
1333 * Z1,Z2 - access is controlled by TLB entry permissions
1334 * Z3 - full access regardless of TLB entry permissions
1335 */
1336
1337 __asm volatile(
1338 "mtspr %0,%1;"
1339 "sync;"
1340 :: "K"(SPR_ZPR), "r" (0x1b000000));
1341 }
1342
1343
1344 /*
1345 * We should pass the ctx in from trap code.
1346 */
1347 int
1348 pmap_tlbmiss(vaddr_t va, int ctx)
1349 {
1350 volatile u_int *pte;
1351 u_long tte;
1352
1353 tlbmiss_ev.ev_count++;
1354
1355 /*
1356 * XXXX We will reserve 0-0x80000000 for va==pa mappings.
1357 */
1358 if (ctx != KERNEL_PID || (va & 0x80000000)) {
1359 pte = pte_find((struct pmap *)__UNVOLATILE(ctxbusy[ctx]), va);
1360 if (pte == NULL) {
1361 /* Map unmanaged addresses directly for kernel access */
1362 return 1;
1363 }
1364 tte = *pte;
1365 if (tte == 0) {
1366 return 1;
1367 }
1368 } else {
1369 /* Create a 16MB writable mapping. */
1370 #ifdef PPC_4XX_NOCACHE
1371 tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_I | TTE_WR;
1372 #else
1373 tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_WR;
1374 #endif
1375 }
1376 tlbhit_ev.ev_count++;
1377 ppc4xx_tlb_enter(ctx, va, tte);
1378
1379 return 0;
1380 }
1381
1382 /*
1383 * Flush all the entries matching a context from the TLB.
1384 */
1385 static int
1386 ctx_flush(int cnum)
1387 {
1388 int i;
1389
1390 /* We gotta steal this context */
1391 for (i = TLB_NRESERVED; i < NTLB; i++) {
1392 if (tlb_info[i].ti_ctx == cnum) {
1393 /* Can't steal ctx if it has a locked entry. */
1394 if (TLB_LOCKED(i)) {
1395 #ifdef DIAGNOSTIC
1396 printf("ctx_flush: can't invalidate "
1397 "locked mapping %d "
1398 "for context %d\n", i, cnum);
1399 #ifdef DDB
1400 Debugger();
1401 #endif
1402 #endif
1403 return (1);
1404 }
1405 #ifdef DIAGNOSTIC
1406 if (i < TLB_NRESERVED)
1407 panic("TLB entry %d not locked", i);
1408 #endif
1409 /* Invalidate particular TLB entry regardless of locked status */
1410 __asm volatile("tlbwe %0,%1,0" : :"r"(0),"r"(i));
1411 tlb_info[i].ti_flags = 0;
1412 }
1413 }
1414 return (0);
1415 }
1416
1417 /*
1418 * Allocate a context. If necessary, steal one from someone else.
1419 *
1420 * The new context is flushed from the TLB before returning.
1421 */
1422 int
1423 ctx_alloc(struct pmap *pm)
1424 {
1425 int s, cnum;
1426 static int next = MINCTX;
1427
1428 if (pm == pmap_kernel()) {
1429 #ifdef DIAGNOSTIC
1430 printf("ctx_alloc: kernel pmap!\n");
1431 #endif
1432 return (0);
1433 }
1434 s = splvm();
1435
1436 /* Find a likely context. */
1437 cnum = next;
1438 do {
1439 if ((++cnum) > NUMCTX)
1440 cnum = MINCTX;
1441 } while (ctxbusy[cnum] != NULL && cnum != next);
1442
1443 /* Now clean it out */
1444 oops:
1445 if (cnum < MINCTX)
1446 cnum = MINCTX; /* Never steal ctx 0 or 1 */
1447 if (ctx_flush(cnum)) {
1448 /* oops -- something's wired. */
1449 if ((++cnum) > NUMCTX)
1450 cnum = MINCTX;
1451 goto oops;
1452 }
1453
1454 if (ctxbusy[cnum]) {
1455 #ifdef DEBUG
1456 /* We should identify this pmap and clear it */
1457 printf("Warning: stealing context %d\n", cnum);
1458 #endif
1459 ctxbusy[cnum]->pm_ctx = 0;
1460 }
1461 ctxbusy[cnum] = pm;
1462 next = cnum;
1463 splx(s);
1464 pm->pm_ctx = cnum;
1465
1466 return cnum;
1467 }
1468
1469 /*
1470 * Give away a context.
1471 */
1472 void
1473 ctx_free(struct pmap *pm)
1474 {
1475 int oldctx;
1476
1477 oldctx = pm->pm_ctx;
1478
1479 if (oldctx == 0)
1480 panic("ctx_free: freeing kernel context");
1481 #ifdef DIAGNOSTIC
1482 if (ctxbusy[oldctx] == 0)
1483 printf("ctx_free: freeing free context %d\n", oldctx);
1484 if (ctxbusy[oldctx] != pm) {
1485 printf("ctx_free: freeing someone esle's context\n "
1486 "ctxbusy[%d] = %p, pm->pm_ctx = %p\n",
1487 oldctx, (void *)(u_long)ctxbusy[oldctx], pm);
1488 #ifdef DDB
1489 Debugger();
1490 #endif
1491 }
1492 #endif
1493 /* We should verify it has not been stolen and reallocated... */
1494 ctxbusy[oldctx] = NULL;
1495 ctx_flush(oldctx);
1496 }
1497
1498
1499 #ifdef DEBUG
1500 /*
1501 * Test ref/modify handling.
1502 */
1503 void pmap_testout __P((void));
1504 void
1505 pmap_testout()
1506 {
1507 vaddr_t va;
1508 volatile int *loc;
1509 int val = 0;
1510 paddr_t pa;
1511 struct vm_page *pg;
1512 int ref, mod;
1513
1514 /* Allocate a page */
1515 va = (vaddr_t)uvm_km_alloc(kernel_map, PAGE_SIZE, 0,
1516 UVM_KMF_WIRED | UVM_KMF_ZERO);
1517 loc = (int*)va;
1518
1519 pmap_extract(pmap_kernel(), va, &pa);
1520 pg = PHYS_TO_VM_PAGE(pa);
1521 pmap_unwire(pmap_kernel(), va);
1522
1523 pmap_kremove(va, PAGE_SIZE);
1524 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1525 pmap_update(pmap_kernel());
1526
1527 /* Now clear reference and modify */
1528 ref = pmap_clear_reference(pg);
1529 mod = pmap_clear_modify(pg);
1530 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1531 (void *)(u_long)va, (long)pa,
1532 ref, mod);
1533
1534 /* Check it's properly cleared */
1535 ref = pmap_is_referenced(pg);
1536 mod = pmap_is_modified(pg);
1537 printf("Checking cleared page: ref %d, mod %d\n",
1538 ref, mod);
1539
1540 /* Reference page */
1541 val = *loc;
1542
1543 ref = pmap_is_referenced(pg);
1544 mod = pmap_is_modified(pg);
1545 printf("Referenced page: ref %d, mod %d val %x\n",
1546 ref, mod, val);
1547
1548 /* Now clear reference and modify */
1549 ref = pmap_clear_reference(pg);
1550 mod = pmap_clear_modify(pg);
1551 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1552 (void *)(u_long)va, (long)pa,
1553 ref, mod);
1554
1555 /* Modify page */
1556 *loc = 1;
1557
1558 ref = pmap_is_referenced(pg);
1559 mod = pmap_is_modified(pg);
1560 printf("Modified page: ref %d, mod %d\n",
1561 ref, mod);
1562
1563 /* Now clear reference and modify */
1564 ref = pmap_clear_reference(pg);
1565 mod = pmap_clear_modify(pg);
1566 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1567 (void *)(u_long)va, (long)pa,
1568 ref, mod);
1569
1570 /* Check it's properly cleared */
1571 ref = pmap_is_referenced(pg);
1572 mod = pmap_is_modified(pg);
1573 printf("Checking cleared page: ref %d, mod %d\n",
1574 ref, mod);
1575
1576 /* Modify page */
1577 *loc = 1;
1578
1579 ref = pmap_is_referenced(pg);
1580 mod = pmap_is_modified(pg);
1581 printf("Modified page: ref %d, mod %d\n",
1582 ref, mod);
1583
1584 /* Check pmap_protect() */
1585 pmap_protect(pmap_kernel(), va, va+1, VM_PROT_READ);
1586 pmap_update(pmap_kernel());
1587 ref = pmap_is_referenced(pg);
1588 mod = pmap_is_modified(pg);
1589 printf("pmap_protect(VM_PROT_READ): ref %d, mod %d\n",
1590 ref, mod);
1591
1592 /* Now clear reference and modify */
1593 ref = pmap_clear_reference(pg);
1594 mod = pmap_clear_modify(pg);
1595 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1596 (void *)(u_long)va, (long)pa,
1597 ref, mod);
1598
1599 /* Reference page */
1600 val = *loc;
1601
1602 ref = pmap_is_referenced(pg);
1603 mod = pmap_is_modified(pg);
1604 printf("Referenced page: ref %d, mod %d val %x\n",
1605 ref, mod, val);
1606
1607 /* Now clear reference and modify */
1608 ref = pmap_clear_reference(pg);
1609 mod = pmap_clear_modify(pg);
1610 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1611 (void *)(u_long)va, (long)pa,
1612 ref, mod);
1613
1614 /* Modify page */
1615 #if 0
1616 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1617 pmap_update(pmap_kernel());
1618 #endif
1619 *loc = 1;
1620
1621 ref = pmap_is_referenced(pg);
1622 mod = pmap_is_modified(pg);
1623 printf("Modified page: ref %d, mod %d\n",
1624 ref, mod);
1625
1626 /* Check pmap_protect() */
1627 pmap_protect(pmap_kernel(), va, va+1, VM_PROT_NONE);
1628 pmap_update(pmap_kernel());
1629 ref = pmap_is_referenced(pg);
1630 mod = pmap_is_modified(pg);
1631 printf("pmap_protect(): ref %d, mod %d\n",
1632 ref, mod);
1633
1634 /* Now clear reference and modify */
1635 ref = pmap_clear_reference(pg);
1636 mod = pmap_clear_modify(pg);
1637 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1638 (void *)(u_long)va, (long)pa,
1639 ref, mod);
1640
1641 /* Reference page */
1642 val = *loc;
1643
1644 ref = pmap_is_referenced(pg);
1645 mod = pmap_is_modified(pg);
1646 printf("Referenced page: ref %d, mod %d val %x\n",
1647 ref, mod, val);
1648
1649 /* Now clear reference and modify */
1650 ref = pmap_clear_reference(pg);
1651 mod = pmap_clear_modify(pg);
1652 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1653 (void *)(u_long)va, (long)pa,
1654 ref, mod);
1655
1656 /* Modify page */
1657 #if 0
1658 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1659 pmap_update(pmap_kernel());
1660 #endif
1661 *loc = 1;
1662
1663 ref = pmap_is_referenced(pg);
1664 mod = pmap_is_modified(pg);
1665 printf("Modified page: ref %d, mod %d\n",
1666 ref, mod);
1667
1668 /* Check pmap_pag_protect() */
1669 pmap_page_protect(pg, VM_PROT_READ);
1670 ref = pmap_is_referenced(pg);
1671 mod = pmap_is_modified(pg);
1672 printf("pmap_page_protect(VM_PROT_READ): ref %d, mod %d\n",
1673 ref, mod);
1674
1675 /* Now clear reference and modify */
1676 ref = pmap_clear_reference(pg);
1677 mod = pmap_clear_modify(pg);
1678 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1679 (void *)(u_long)va, (long)pa,
1680 ref, mod);
1681
1682 /* Reference page */
1683 val = *loc;
1684
1685 ref = pmap_is_referenced(pg);
1686 mod = pmap_is_modified(pg);
1687 printf("Referenced page: ref %d, mod %d val %x\n",
1688 ref, mod, val);
1689
1690 /* Now clear reference and modify */
1691 ref = pmap_clear_reference(pg);
1692 mod = pmap_clear_modify(pg);
1693 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1694 (void *)(u_long)va, (long)pa,
1695 ref, mod);
1696
1697 /* Modify page */
1698 #if 0
1699 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1700 pmap_update(pmap_kernel());
1701 #endif
1702 *loc = 1;
1703
1704 ref = pmap_is_referenced(pg);
1705 mod = pmap_is_modified(pg);
1706 printf("Modified page: ref %d, mod %d\n",
1707 ref, mod);
1708
1709 /* Check pmap_pag_protect() */
1710 pmap_page_protect(pg, VM_PROT_NONE);
1711 ref = pmap_is_referenced(pg);
1712 mod = pmap_is_modified(pg);
1713 printf("pmap_page_protect(): ref %d, mod %d\n",
1714 ref, mod);
1715
1716 /* Now clear reference and modify */
1717 ref = pmap_clear_reference(pg);
1718 mod = pmap_clear_modify(pg);
1719 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1720 (void *)(u_long)va, (long)pa,
1721 ref, mod);
1722
1723
1724 /* Reference page */
1725 val = *loc;
1726
1727 ref = pmap_is_referenced(pg);
1728 mod = pmap_is_modified(pg);
1729 printf("Referenced page: ref %d, mod %d val %x\n",
1730 ref, mod, val);
1731
1732 /* Now clear reference and modify */
1733 ref = pmap_clear_reference(pg);
1734 mod = pmap_clear_modify(pg);
1735 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1736 (void *)(u_long)va, (long)pa,
1737 ref, mod);
1738
1739 /* Modify page */
1740 #if 0
1741 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1742 pmap_update(pmap_kernel());
1743 #endif
1744 *loc = 1;
1745
1746 ref = pmap_is_referenced(pg);
1747 mod = pmap_is_modified(pg);
1748 printf("Modified page: ref %d, mod %d\n",
1749 ref, mod);
1750
1751 /* Unmap page */
1752 pmap_remove(pmap_kernel(), va, va+1);
1753 pmap_update(pmap_kernel());
1754 ref = pmap_is_referenced(pg);
1755 mod = pmap_is_modified(pg);
1756 printf("Unmapped page: ref %d, mod %d\n", ref, mod);
1757
1758 /* Now clear reference and modify */
1759 ref = pmap_clear_reference(pg);
1760 mod = pmap_clear_modify(pg);
1761 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1762 (void *)(u_long)va, (long)pa, ref, mod);
1763
1764 /* Check it's properly cleared */
1765 ref = pmap_is_referenced(pg);
1766 mod = pmap_is_modified(pg);
1767 printf("Checking cleared page: ref %d, mod %d\n",
1768 ref, mod);
1769
1770 pmap_remove(pmap_kernel(), va, va + PAGE_SIZE);
1771 pmap_kenter_pa(va, pa, VM_PROT_ALL);
1772 uvm_km_free(kernel_map, (vaddr_t)va, PAGE_SIZE, UVM_KMF_WIRED);
1773 }
1774 #endif
1775