pmap.c revision 1.5.4.4 1 /* $NetBSD: pmap.c,v 1.5.4.4 2002/04/01 07:42:02 nathanw Exp $ */
2
3 /*
4 * Copyright 2001 Wasabi Systems, Inc.
5 * All rights reserved.
6 *
7 * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 *
9 * Redistribution and use in source and binary forms, with or without
10 * modification, are permitted provided that the following conditions
11 * are met:
12 * 1. Redistributions of source code must retain the above copyright
13 * notice, this list of conditions and the following disclaimer.
14 * 2. Redistributions in binary form must reproduce the above copyright
15 * notice, this list of conditions and the following disclaimer in the
16 * documentation and/or other materials provided with the distribution.
17 * 3. All advertising materials mentioning features or use of this software
18 * must display the following acknowledgement:
19 * This product includes software developed for the NetBSD Project by
20 * Wasabi Systems, Inc.
21 * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 * or promote products derived from this software without specific prior
23 * written permission.
24 *
25 * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 * POSSIBILITY OF SUCH DAMAGE.
36 */
37
38 /*
39 * Copyright (C) 1995, 1996 Wolfgang Solfrank.
40 * Copyright (C) 1995, 1996 TooLs GmbH.
41 * All rights reserved.
42 *
43 * Redistribution and use in source and binary forms, with or without
44 * modification, are permitted provided that the following conditions
45 * are met:
46 * 1. Redistributions of source code must retain the above copyright
47 * notice, this list of conditions and the following disclaimer.
48 * 2. Redistributions in binary form must reproduce the above copyright
49 * notice, this list of conditions and the following disclaimer in the
50 * documentation and/or other materials provided with the distribution.
51 * 3. All advertising materials mentioning features or use of this software
52 * must display the following acknowledgement:
53 * This product includes software developed by TooLs GmbH.
54 * 4. The name of TooLs GmbH may not be used to endorse or promote products
55 * derived from this software without specific prior written permission.
56 *
57 * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
58 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
62 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
64 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
65 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 */
68
69 #undef PPC_4XX_NOCACHE
70
71 #include <sys/param.h>
72 #include <sys/malloc.h>
73 #include <sys/proc.h>
74 #include <sys/user.h>
75 #include <sys/queue.h>
76 #include <sys/systm.h>
77 #include <sys/pool.h>
78 #include <sys/device.h>
79 #include <sys/lwp.h>
80
81 #include <uvm/uvm.h>
82
83 #include <machine/cpu.h>
84 #include <machine/pcb.h>
85 #include <machine/powerpc.h>
86
87 #include <powerpc/spr.h>
88 #include <machine/tlb.h>
89
90 /*
91 * kernmap is an array of PTEs large enough to map in
92 * 4GB. At 16KB/page it is 256K entries or 2MB.
93 */
94 #define KERNMAP_SIZE ((0xffffffffU/NBPG)+1)
95 caddr_t kernmap;
96
97 #define MINCTX 2
98 #define NUMCTX 256
99 volatile struct pmap *ctxbusy[NUMCTX];
100
101 #define TLBF_USED 0x1
102 #define TLBF_REF 0x2
103 #define TLBF_LOCKED 0x4
104 #define TLB_LOCKED(i) (tlb_info[(i)].ti_flags & TLBF_LOCKED)
105 typedef struct tlb_info_s {
106 char ti_flags;
107 char ti_ctx; /* TLB_PID assiciated with the entry */
108 u_int ti_va;
109 } tlb_info_t;
110
111 volatile tlb_info_t tlb_info[NTLB];
112 /* We'll use a modified FIFO replacement policy cause it's cheap */
113 volatile int tlbnext = TLB_NRESERVED;
114
115 u_long dtlb_miss_count = 0;
116 u_long itlb_miss_count = 0;
117 u_long ktlb_miss_count = 0;
118 u_long utlb_miss_count = 0;
119
120 /* Event counters -- XXX type `INTR' so we can see them with vmstat -i */
121 struct evcnt tlbmiss_ev = EVCNT_INITIALIZER(EVCNT_TYPE_INTR,
122 NULL, "cpu", "tlbmiss");
123 struct evcnt tlbhit_ev = EVCNT_INITIALIZER(EVCNT_TYPE_INTR,
124 NULL, "cpu", "tlbhit");
125 struct evcnt tlbflush_ev = EVCNT_INITIALIZER(EVCNT_TYPE_INTR,
126 NULL, "cpu", "tlbflush");
127 struct evcnt tlbenter_ev = EVCNT_INITIALIZER(EVCNT_TYPE_INTR,
128 NULL, "cpu", "tlbenter");
129
130 struct pmap kernel_pmap_;
131
132 int physmem;
133 static int npgs;
134 static u_int nextavail;
135 #ifndef MSGBUFADDR
136 extern paddr_t msgbuf_paddr;
137 #endif
138
139 static struct mem_region *mem, *avail;
140
141 /*
142 * This is a cache of referenced/modified bits.
143 * Bits herein are shifted by ATTRSHFT.
144 */
145 static char *pmap_attrib;
146
147 #define PV_WIRED 0x1
148 #define PV_WIRE(pv) ((pv)->pv_va |= PV_WIRED)
149 #define PV_CMPVA(va,pv) (!(((pv)->pv_va^(va))&(~PV_WIRED)))
150
151 struct pv_entry {
152 struct pv_entry *pv_next; /* Linked list of mappings */
153 vaddr_t pv_va; /* virtual address of mapping */
154 struct pmap *pv_pm;
155 };
156
157 struct pv_entry *pv_table;
158 static struct pool pv_pool;
159
160 static int pmap_initialized;
161
162 static int ctx_flush(int);
163
164 inline struct pv_entry *pa_to_pv(paddr_t);
165 static inline char *pa_to_attr(paddr_t);
166
167 static inline volatile u_int *pte_find(struct pmap *, vaddr_t);
168 static inline int pte_enter(struct pmap *, vaddr_t, u_int);
169
170 static void pmap_pinit(pmap_t);
171 static void pmap_release(pmap_t);
172 static inline int pmap_enter_pv(struct pmap *, vaddr_t, paddr_t);
173 static void pmap_remove_pv(struct pmap *, vaddr_t, paddr_t);
174
175
176 inline struct pv_entry *
177 pa_to_pv(paddr_t pa)
178 {
179 int bank, pg;
180
181 bank = vm_physseg_find(atop(pa), &pg);
182 if (bank == -1)
183 return NULL;
184 return &vm_physmem[bank].pmseg.pvent[pg];
185 }
186
187 static inline char *
188 pa_to_attr(paddr_t pa)
189 {
190 int bank, pg;
191
192 bank = vm_physseg_find(atop(pa), &pg);
193 if (bank == -1)
194 return NULL;
195 return &vm_physmem[bank].pmseg.attrs[pg];
196 }
197
198 /*
199 * Insert PTE into page table.
200 */
201 int
202 pte_enter(struct pmap *pm, vaddr_t va, u_int pte)
203 {
204 int seg = STIDX(va);
205 int ptn = PTIDX(va);
206 paddr_t pa;
207
208 if (!pm->pm_ptbl[seg]) {
209 /* Don't allocate a page to clear a non-existent mapping. */
210 if (!pte) return (1);
211 /* Allocate a page XXXX this will sleep! */
212 pa = 0;
213 pm->pm_ptbl[seg] = (uint *)uvm_km_alloc1(kernel_map, NBPG, 1);
214 }
215 pm->pm_ptbl[seg][ptn] = pte;
216
217 /* Flush entry. */
218 ppc4xx_tlb_flush(va, pm->pm_ctx);
219 return (1);
220 }
221
222 /*
223 * Get a pointer to a PTE in a page table.
224 */
225 volatile u_int *
226 pte_find(struct pmap *pm, vaddr_t va)
227 {
228 int seg = STIDX(va);
229 int ptn = PTIDX(va);
230
231 if (pm->pm_ptbl[seg])
232 return (&pm->pm_ptbl[seg][ptn]);
233
234 return (NULL);
235 }
236
237 /*
238 * This is called during initppc, before the system is really initialized.
239 */
240 void
241 pmap_bootstrap(u_int kernelstart, u_int kernelend)
242 {
243 struct mem_region *mp, *mp1;
244 int cnt, i;
245 u_int s, e, sz;
246
247 /*
248 * Allocate the kernel page table at the end of
249 * kernel space so it's in the locked TTE.
250 */
251 kernmap = (caddr_t)kernelend;
252
253 /*
254 * Initialize kernel page table.
255 */
256 for (i = 0; i < STSZ; i++) {
257 pmap_kernel()->pm_ptbl[i] = 0;
258 }
259 ctxbusy[0] = ctxbusy[1] = pmap_kernel();
260
261 /*
262 * Announce page-size to the VM-system
263 */
264 uvmexp.pagesize = NBPG;
265 uvm_setpagesize();
266
267 /*
268 * Get memory.
269 */
270 mem_regions(&mem, &avail);
271 for (mp = mem; mp->size; mp++) {
272 physmem += btoc(mp->size);
273 printf("+%lx,",mp->size);
274 }
275 printf("\n");
276 ppc4xx_tlb_init();
277 /*
278 * Count the number of available entries.
279 */
280 for (cnt = 0, mp = avail; mp->size; mp++)
281 cnt++;
282
283 /*
284 * Page align all regions.
285 * Non-page aligned memory isn't very interesting to us.
286 * Also, sort the entries for ascending addresses.
287 */
288 kernelstart &= ~PGOFSET;
289 kernelend = (kernelend + PGOFSET) & ~PGOFSET;
290 for (mp = avail; mp->size; mp++) {
291 s = mp->start;
292 e = mp->start + mp->size;
293 printf("%08x-%08x -> ",s,e);
294 /*
295 * Check whether this region holds all of the kernel.
296 */
297 if (s < kernelstart && e > kernelend) {
298 avail[cnt].start = kernelend;
299 avail[cnt++].size = e - kernelend;
300 e = kernelstart;
301 }
302 /*
303 * Look whether this regions starts within the kernel.
304 */
305 if (s >= kernelstart && s < kernelend) {
306 if (e <= kernelend)
307 goto empty;
308 s = kernelend;
309 }
310 /*
311 * Now look whether this region ends within the kernel.
312 */
313 if (e > kernelstart && e <= kernelend) {
314 if (s >= kernelstart)
315 goto empty;
316 e = kernelstart;
317 }
318 /*
319 * Now page align the start and size of the region.
320 */
321 s = round_page(s);
322 e = trunc_page(e);
323 if (e < s)
324 e = s;
325 sz = e - s;
326 printf("%08x-%08x = %x\n",s,e,sz);
327 /*
328 * Check whether some memory is left here.
329 */
330 if (sz == 0) {
331 empty:
332 memmove(mp, mp + 1,
333 (cnt - (mp - avail)) * sizeof *mp);
334 cnt--;
335 mp--;
336 continue;
337 }
338 /*
339 * Do an insertion sort.
340 */
341 npgs += btoc(sz);
342 for (mp1 = avail; mp1 < mp; mp1++)
343 if (s < mp1->start)
344 break;
345 if (mp1 < mp) {
346 memmove(mp1 + 1, mp1, (char *)mp - (char *)mp1);
347 mp1->start = s;
348 mp1->size = sz;
349 } else {
350 mp->start = s;
351 mp->size = sz;
352 }
353 }
354
355 /*
356 * We cannot do pmap_steal_memory here,
357 * since we don't run with translation enabled yet.
358 */
359 #ifndef MSGBUFADDR
360 /*
361 * allow for msgbuf
362 */
363 sz = round_page(MSGBUFSIZE);
364 mp = NULL;
365 for (mp1 = avail; mp1->size; mp1++)
366 if (mp1->size >= sz)
367 mp = mp1;
368 if (mp == NULL)
369 panic("not enough memory?");
370
371 npgs -= btoc(sz);
372 msgbuf_paddr = mp->start + mp->size - sz;
373 mp->size -= sz;
374 if (mp->size <= 0)
375 memmove(mp, mp + 1, (cnt - (mp - avail)) * sizeof *mp);
376 #endif
377
378 printf("Loading pages\n");
379 for (mp = avail; mp->size; mp++)
380 uvm_page_physload(atop(mp->start), atop(mp->start + mp->size),
381 atop(mp->start), atop(mp->start + mp->size),
382 VM_FREELIST_DEFAULT);
383
384 /*
385 * Initialize kernel pmap and hardware.
386 */
387 /* Setup TLB pid allocator so it knows we alreadu using PID 1 */
388 pmap_kernel()->pm_ctx = KERNEL_PID;
389 nextavail = avail->start;
390
391
392 evcnt_attach_static(&tlbhit_ev);
393 evcnt_attach_static(&tlbmiss_ev);
394 evcnt_attach_static(&tlbflush_ev);
395 evcnt_attach_static(&tlbenter_ev);
396 printf("Done\n");
397 }
398
399 /*
400 * Restrict given range to physical memory
401 *
402 * (Used by /dev/mem)
403 */
404 void
405 pmap_real_memory(paddr_t *start, psize_t *size)
406 {
407 struct mem_region *mp;
408
409 for (mp = mem; mp->size; mp++) {
410 if (*start + *size > mp->start &&
411 *start < mp->start + mp->size) {
412 if (*start < mp->start) {
413 *size -= mp->start - *start;
414 *start = mp->start;
415 }
416 if (*start + *size > mp->start + mp->size)
417 *size = mp->start + mp->size - *start;
418 return;
419 }
420 }
421 *size = 0;
422 }
423
424 /*
425 * Initialize anything else for pmap handling.
426 * Called during vm_init().
427 */
428 void
429 pmap_init(void)
430 {
431 struct pv_entry *pv;
432 vsize_t sz;
433 vaddr_t addr;
434 int i, s;
435 int bank;
436 char *attr;
437
438 sz = (vsize_t)((sizeof(struct pv_entry) + 1) * npgs);
439 sz = round_page(sz);
440 addr = uvm_km_zalloc(kernel_map, sz);
441 s = splvm();
442 pv = pv_table = (struct pv_entry *)addr;
443 for (i = npgs; --i >= 0;)
444 pv++->pv_pm = NULL;
445 pmap_attrib = (char *)pv;
446 memset(pv, 0, npgs);
447
448 pv = pv_table;
449 attr = pmap_attrib;
450 for (bank = 0; bank < vm_nphysseg; bank++) {
451 sz = vm_physmem[bank].end - vm_physmem[bank].start;
452 vm_physmem[bank].pmseg.pvent = pv;
453 vm_physmem[bank].pmseg.attrs = attr;
454 pv += sz;
455 attr += sz;
456 }
457
458 pmap_initialized = 1;
459 splx(s);
460
461 /* Setup a pool for additional pvlist structures */
462 pool_init(&pv_pool, sizeof(struct pv_entry), 0, 0, 0, "pv_entry", NULL);
463 }
464
465 /*
466 * How much virtual space is available to the kernel?
467 */
468 void
469 pmap_virtual_space(vaddr_t *start, vaddr_t *end)
470 {
471
472 #if 0
473 /*
474 * Reserve one segment for kernel virtual memory
475 */
476 *start = (vaddr_t)(KERNEL_SR << ADDR_SR_SHFT);
477 *end = *start + SEGMENT_LENGTH;
478 #else
479 *start = (vaddr_t) VM_MIN_KERNEL_ADDRESS;
480 *end = (vaddr_t) VM_MAX_KERNEL_ADDRESS;
481 #endif
482 }
483
484 #ifdef PMAP_GROWKERNEL
485 /*
486 * Preallocate kernel page tables to a specified VA.
487 * This simply loops through the first TTE for each
488 * page table from the beginning of the kernel pmap,
489 * reads the entry, and if the result is
490 * zero (either invalid entry or no page table) it stores
491 * a zero there, populating page tables in the process.
492 * This is not the most efficient technique but i don't
493 * expect it to be called that often.
494 */
495 extern struct vm_page *vm_page_alloc1 __P((void));
496 extern void vm_page_free1 __P((struct vm_page *));
497
498 vaddr_t kbreak = VM_MIN_KERNEL_ADDRESS;
499
500 vaddr_t
501 pmap_growkernel(maxkvaddr)
502 vaddr_t maxkvaddr;
503 {
504 int s;
505 int seg;
506 paddr_t pg;
507 struct pmap *pm = pmap_kernel();
508
509 s = splvm();
510
511 /* Align with the start of a page table */
512 for (kbreak &= ~(PTMAP-1); kbreak < maxkvaddr;
513 kbreak += PTMAP) {
514 seg = STIDX(kbreak);
515
516 if (pte_find(pm, kbreak)) continue;
517
518 if (uvm.page_init_done) {
519 pg = (paddr_t)VM_PAGE_TO_PHYS(vm_page_alloc1());
520 } else {
521 if (!uvm_page_physget(&pg))
522 panic("pmap_growkernel: no memory");
523 }
524 if (!pg) panic("pmap_growkernel: no pages");
525 pmap_zero_page((paddr_t)pg);
526
527 /* XXX This is based on all phymem being addressable */
528 pm->pm_ptbl[seg] = (u_int *)pg;
529 }
530 splx(s);
531 return (kbreak);
532 }
533
534 /*
535 * vm_page_alloc1:
536 *
537 * Allocate and return a memory cell with no associated object.
538 */
539 struct vm_page *
540 vm_page_alloc1()
541 {
542 struct vm_page *pg = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_USERESERVE);
543 if (pg) {
544 pg->wire_count = 1; /* no mappings yet */
545 pg->flags &= ~PG_BUSY; /* never busy */
546 }
547 return pg;
548 }
549
550 /*
551 * vm_page_free1:
552 *
553 * Returns the given page to the free list,
554 * disassociating it with any VM object.
555 *
556 * Object and page must be locked prior to entry.
557 */
558 void
559 vm_page_free1(mem)
560 struct vm_page *mem;
561 {
562 #ifdef DIAGNOSTIC
563 if (mem->flags != (PG_CLEAN|PG_FAKE)) {
564 printf("Freeing invalid page %p\n", mem);
565 printf("pa = %llx\n", (unsigned long long)VM_PAGE_TO_PHYS(mem));
566 #ifdef DDB
567 Debugger();
568 #endif
569 return;
570 }
571 #endif
572 mem->flags |= PG_BUSY;
573 mem->wire_count = 0;
574 uvm_pagefree(mem);
575 }
576 #endif
577
578 /*
579 * Create and return a physical map.
580 */
581 struct pmap *
582 pmap_create(void)
583 {
584 struct pmap *pm;
585
586 pm = (struct pmap *)malloc(sizeof *pm, M_VMPMAP, M_WAITOK);
587 memset((caddr_t)pm, 0, sizeof *pm);
588 pmap_pinit(pm);
589 return pm;
590 }
591
592 /*
593 * Initialize a preallocated and zeroed pmap structure.
594 */
595 void
596 pmap_pinit(struct pmap *pm)
597 {
598 int i;
599
600 /*
601 * Allocate some segment registers for this pmap.
602 */
603 pm->pm_refs = 1;
604 for (i = 0; i < STSZ; i++)
605 pm->pm_ptbl[i] = NULL;
606 }
607
608 /*
609 * Add a reference to the given pmap.
610 */
611 void
612 pmap_reference(struct pmap *pm)
613 {
614
615 pm->pm_refs++;
616 }
617
618 /*
619 * Retire the given pmap from service.
620 * Should only be called if the map contains no valid mappings.
621 */
622 void
623 pmap_destroy(struct pmap *pm)
624 {
625
626 if (--pm->pm_refs == 0) {
627 pmap_release(pm);
628 free((caddr_t)pm, M_VMPMAP);
629 }
630 }
631
632 /*
633 * Release any resources held by the given physical map.
634 * Called when a pmap initialized by pmap_pinit is being released.
635 */
636 static void
637 pmap_release(struct pmap *pm)
638 {
639 int i;
640
641 for (i = 0; i < STSZ; i++)
642 if (pm->pm_ptbl[i]) {
643 uvm_km_free(kernel_map, (vaddr_t)pm->pm_ptbl[i], NBPG);
644 pm->pm_ptbl[i] = NULL;
645 }
646 if (pm->pm_ctx) ctx_free(pm);
647 }
648
649 /*
650 * Copy the range specified by src_addr/len
651 * from the source map to the range dst_addr/len
652 * in the destination map.
653 *
654 * This routine is only advisory and need not do anything.
655 */
656 void
657 pmap_copy(struct pmap *dst_pmap, struct pmap *src_pmap, vaddr_t dst_addr,
658 vsize_t len, vaddr_t src_addr)
659 {
660 }
661
662 /*
663 * Require that all active physical maps contain no
664 * incorrect entries NOW.
665 */
666 void
667 pmap_update(struct pmap *pmap)
668 {
669 }
670
671 /*
672 * Garbage collects the physical map system for
673 * pages which are no longer used.
674 * Success need not be guaranteed -- that is, there
675 * may well be pages which are not referenced, but
676 * others may be collected.
677 * Called by the pageout daemon when pages are scarce.
678 */
679 void
680 pmap_collect(struct pmap *pm)
681 {
682 }
683
684 /*
685 * Fill the given physical page with zeroes.
686 */
687 void
688 pmap_zero_page(paddr_t pa)
689 {
690
691 #ifdef PPC_4XX_NOCACHE
692 memset((caddr_t)pa, 0, NBPG);
693 #else
694 int i;
695
696 for (i = NBPG/CACHELINESIZE; i > 0; i--) {
697 __asm __volatile ("dcbz 0,%0" :: "r"(pa));
698 pa += CACHELINESIZE;
699 }
700 #endif
701 }
702
703 /*
704 * Copy the given physical source page to its destination.
705 */
706 void
707 pmap_copy_page(paddr_t src, paddr_t dst)
708 {
709
710 memcpy((caddr_t)dst, (caddr_t)src, NBPG);
711 dcache_flush_page(dst);
712 }
713
714 /*
715 * This returns whether this is the first mapping of a page.
716 */
717 static inline int
718 pmap_enter_pv(struct pmap *pm, vaddr_t va, paddr_t pa)
719 {
720 struct pv_entry *pv, *npv = NULL;
721 int s;
722
723 if (!pmap_initialized)
724 return 0;
725
726 s = splvm();
727
728 pv = pa_to_pv(pa);
729 for (npv = pv; npv; npv = npv->pv_next)
730 if (npv->pv_va == va && npv->pv_pm == pm) {
731 printf("Duplicate pv: va %lx pm %p\n", va, pm);
732 Debugger();
733 return (1);
734 }
735
736 if (!pv->pv_pm) {
737 /*
738 * No entries yet, use header as the first entry.
739 */
740 pv->pv_va = va;
741 pv->pv_pm = pm;
742 pv->pv_next = NULL;
743 } else {
744 /*
745 * There is at least one other VA mapping this page.
746 * Place this entry after the header.
747 */
748 npv = pool_get(&pv_pool, PR_WAITOK);
749 if (!npv) return (0);
750 npv->pv_va = va;
751 npv->pv_pm = pm;
752 npv->pv_next = pv->pv_next;
753 pv->pv_next = npv;
754 }
755 splx(s);
756 return (1);
757 }
758
759 static void
760 pmap_remove_pv(struct pmap *pm, vaddr_t va, paddr_t pa)
761 {
762 struct pv_entry *pv, *npv;
763
764 /*
765 * Remove from the PV table.
766 */
767 pv = pa_to_pv(pa);
768 if (!pv) return;
769
770 /*
771 * If it is the first entry on the list, it is actually
772 * in the header and we must copy the following entry up
773 * to the header. Otherwise we must search the list for
774 * the entry. In either case we free the now unused entry.
775 */
776 if (pm == pv->pv_pm && PV_CMPVA(va, pv)) {
777 if ((npv = pv->pv_next)) {
778 *pv = *npv;
779 pool_put(&pv_pool, npv);
780 } else
781 pv->pv_pm = NULL;
782 } else {
783 for (; (npv = pv->pv_next) != NULL; pv = npv)
784 if (pm == npv->pv_pm && PV_CMPVA(va, npv))
785 break;
786 if (npv) {
787 pv->pv_next = npv->pv_next;
788 pool_put(&pv_pool, npv);
789 }
790 }
791 }
792
793 /*
794 * Insert physical page at pa into the given pmap at virtual address va.
795 */
796 int
797 pmap_enter(struct pmap *pm, vaddr_t va, paddr_t pa, vm_prot_t prot, int flags)
798 {
799 int s;
800 u_int tte;
801 int managed;
802
803 /*
804 * Have to remove any existing mapping first.
805 */
806 pmap_remove(pm, va, va + NBPG);
807
808 if (flags & PMAP_WIRED) flags |= prot;
809
810 /* If it has no protections don't bother w/the rest */
811 if (!(flags & VM_PROT_ALL))
812 return (0);
813
814 managed = 0;
815 if (vm_physseg_find(atop(pa), NULL) != -1)
816 managed = 1;
817
818 /*
819 * Generate TTE.
820 *
821 * XXXX
822 *
823 * Since the kernel does not handle execution privileges properly,
824 * we will handle read and execute permissions together.
825 */
826 tte = TTE_PA(pa) | TTE_EX;
827 /* XXXX -- need to support multiple page sizes. */
828 tte |= TTE_SZ_16K;
829 #ifdef DIAGNOSTIC
830 if ((flags & (PME_NOCACHE | PME_WRITETHROUG)) ==
831 (PME_NOCACHE | PME_WRITETHROUG))
832 panic("pmap_enter: uncached & writethrough\n");
833 #endif
834 if (flags & PME_NOCACHE)
835 /* Must be I/O mapping */
836 tte |= TTE_I | TTE_G;
837 #ifdef PPC_4XX_NOCACHE
838 tte |= TTE_I;
839 #else
840 else if (flags & PME_WRITETHROUG)
841 /* Uncached and writethrough are not compatible */
842 tte |= TTE_W;
843 #endif
844 if (pm == pmap_kernel())
845 tte |= TTE_ZONE(ZONE_PRIV);
846 else
847 tte |= TTE_ZONE(ZONE_USER);
848
849 if (flags & VM_PROT_WRITE)
850 tte |= TTE_WR;
851
852 /*
853 * Now record mapping for later back-translation.
854 */
855 if (pmap_initialized && managed) {
856 char *attr;
857
858 if (!pmap_enter_pv(pm, va, pa)) {
859 /* Could not enter pv on a managed page */
860 return 1;
861 }
862
863 /* Now set attributes. */
864 attr = pa_to_attr(pa);
865 #ifdef DIAGNOSTIC
866 if (!attr)
867 panic("managed but no attr\n");
868 #endif
869 if (flags & VM_PROT_ALL)
870 *attr |= PTE_HI_REF;
871 if (flags & VM_PROT_WRITE)
872 *attr |= PTE_HI_CHG;
873 }
874
875 s = splvm();
876 pm->pm_stats.resident_count++;
877
878 /* Insert page into page table. */
879 pte_enter(pm, va, tte);
880
881 /* If this is a real fault, enter it in the tlb */
882 if (tte && ((flags & PMAP_WIRED) == 0)) {
883 ppc4xx_tlb_enter(pm->pm_ctx, va, tte);
884 }
885 splx(s);
886 return 0;
887 }
888
889 void
890 pmap_unwire(struct pmap *pm, vaddr_t va)
891 {
892 struct pv_entry *pv, *npv;
893 paddr_t pa;
894 int s = splvm();
895
896 if (pm == NULL) {
897 return;
898 }
899
900 if (!pmap_extract(pm, va, &pa)) {
901 return;
902 }
903
904 va |= PV_WIRED;
905
906 pv = pa_to_pv(pa);
907 if (!pv) return;
908
909 /*
910 * If it is the first entry on the list, it is actually
911 * in the header and we must copy the following entry up
912 * to the header. Otherwise we must search the list for
913 * the entry. In either case we free the now unused entry.
914 */
915 for (npv = pv; (npv = pv->pv_next) != NULL; pv = npv) {
916 if (pm == npv->pv_pm && PV_CMPVA(va, npv)) {
917 npv->pv_va &= ~PV_WIRED;
918 break;
919 }
920 }
921 splx(s);
922 }
923
924 void
925 pmap_kenter_pa(vaddr_t va, paddr_t pa, vm_prot_t prot)
926 {
927 int s;
928 u_int tte;
929 struct pmap *pm = pmap_kernel();
930
931 /*
932 * Have to remove any existing mapping first.
933 */
934
935 /*
936 * Generate TTE.
937 *
938 * XXXX
939 *
940 * Since the kernel does not handle execution privileges properly,
941 * we will handle read and execute permissions together.
942 */
943 tte = 0;
944 if (prot & VM_PROT_ALL) {
945
946 tte = TTE_PA(pa) | TTE_EX | TTE_ZONE(ZONE_PRIV);
947 /* XXXX -- need to support multiple page sizes. */
948 tte |= TTE_SZ_16K;
949 #ifdef DIAGNOSTIC
950 if ((prot & (PME_NOCACHE | PME_WRITETHROUG)) ==
951 (PME_NOCACHE | PME_WRITETHROUG))
952 panic("pmap_kenter_pa: uncached & writethrough\n");
953 #endif
954 if (prot & PME_NOCACHE)
955 /* Must be I/O mapping */
956 tte |= TTE_I | TTE_G;
957 #ifdef PPC_4XX_NOCACHE
958 tte |= TTE_I;
959 #else
960 else if (prot & PME_WRITETHROUG)
961 /* Uncached and writethrough are not compatible */
962 tte |= TTE_W;
963 #endif
964 if (prot & VM_PROT_WRITE)
965 tte |= TTE_WR;
966 }
967
968 s = splvm();
969 pm->pm_stats.resident_count++;
970
971 /* Insert page into page table. */
972 pte_enter(pm, va, tte);
973 splx(s);
974 }
975
976 void
977 pmap_kremove(vaddr_t va, vsize_t len)
978 {
979
980 while (len > 0) {
981 pte_enter(pmap_kernel(), va, 0);
982 va += PAGE_SIZE;
983 len -= PAGE_SIZE;
984 }
985 }
986
987 /*
988 * Remove the given range of mapping entries.
989 */
990 void
991 pmap_remove(struct pmap *pm, vaddr_t va, vaddr_t endva)
992 {
993 int s;
994 paddr_t pa;
995 volatile u_int *ptp;
996
997 s = splvm();
998 while (va < endva) {
999
1000 if ((ptp = pte_find(pm, va)) && (pa = *ptp)) {
1001 pa = TTE_PA(pa);
1002 pmap_remove_pv(pm, va, pa);
1003 *ptp = 0;
1004 ppc4xx_tlb_flush(va, pm->pm_ctx);
1005 pm->pm_stats.resident_count--;
1006 }
1007 va += NBPG;
1008 }
1009
1010 splx(s);
1011 }
1012
1013 /*
1014 * Get the physical page address for the given pmap/virtual address.
1015 */
1016 boolean_t
1017 pmap_extract(struct pmap *pm, vaddr_t va, paddr_t *pap)
1018 {
1019 int seg = STIDX(va);
1020 int ptn = PTIDX(va);
1021 u_int pa = 0;
1022 int s = splvm();
1023
1024 if (pm->pm_ptbl[seg] && (pa = pm->pm_ptbl[seg][ptn])) {
1025 *pap = TTE_PA(pa) | (va & PGOFSET);
1026 }
1027 splx(s);
1028 return (pa != 0);
1029 }
1030
1031 /*
1032 * Lower the protection on the specified range of this pmap.
1033 *
1034 * There are only two cases: either the protection is going to 0,
1035 * or it is going to read-only.
1036 */
1037 void
1038 pmap_protect(struct pmap *pm, vaddr_t sva, vaddr_t eva, vm_prot_t prot)
1039 {
1040 volatile u_int *ptp;
1041 int s;
1042
1043 if (prot & VM_PROT_READ) {
1044 s = splvm();
1045 while (sva < eva) {
1046 if ((ptp = pte_find(pm, sva)) != NULL) {
1047 *ptp &= ~TTE_WR;
1048 ppc4xx_tlb_flush(sva, pm->pm_ctx);
1049 }
1050 sva += NBPG;
1051 }
1052 splx(s);
1053 return;
1054 }
1055 pmap_remove(pm, sva, eva);
1056 }
1057
1058 boolean_t
1059 check_attr(struct vm_page *pg, u_int mask, int clear)
1060 {
1061 paddr_t pa = VM_PAGE_TO_PHYS(pg);
1062 int s;
1063 char *attr;
1064 int rv;
1065
1066 /*
1067 * First modify bits in cache.
1068 */
1069 s = splvm();
1070 attr = pa_to_attr(pa);
1071 if (attr == NULL)
1072 return FALSE;
1073
1074 rv = ((*attr & mask) != 0);
1075 if (clear) {
1076 *attr &= ~mask;
1077 pmap_page_protect(pg, (mask == PTE_HI_CHG) ? VM_PROT_READ : 0);
1078 }
1079 splx(s);
1080 return rv;
1081 }
1082
1083
1084 /*
1085 * Lower the protection on the specified physical page.
1086 *
1087 * There are only two cases: either the protection is going to 0,
1088 * or it is going to read-only.
1089 */
1090 void
1091 pmap_page_protect(struct vm_page *pg, vm_prot_t prot)
1092 {
1093 paddr_t pa = VM_PAGE_TO_PHYS(pg);
1094 vaddr_t va;
1095 struct pv_entry *pvh, *pv, *npv;
1096 struct pmap *pm;
1097
1098 pvh = pa_to_pv(pa);
1099 if (pvh == NULL)
1100 return;
1101
1102 /* Handle extra pvs which may be deleted in the operation */
1103 for (pv = pvh->pv_next; pv; pv = npv) {
1104 npv = pv->pv_next;
1105
1106 pm = pv->pv_pm;
1107 va = pv->pv_va;
1108 pmap_protect(pm, va, va+NBPG, prot);
1109 }
1110 /* Now check the head pv */
1111 if (pvh->pv_pm) {
1112 pv = pvh;
1113 pm = pv->pv_pm;
1114 va = pv->pv_va;
1115 pmap_protect(pm, va, va+NBPG, prot);
1116 }
1117 }
1118
1119 /*
1120 * Activate the address space for the specified process. If the process
1121 * is the current process, load the new MMU context.
1122 */
1123 void
1124 pmap_activate(struct lwp *l)
1125 {
1126 #if 0
1127 struct pcb *pcb = &l->l_proc->p_addr->u_pcb;
1128 pmap_t pmap = l->l_proc->p_vmspace->vm_map.pmap;
1129
1130 /*
1131 * XXX Normally performed in cpu_fork().
1132 */
1133 printf("pmap_activate(%p), pmap=%p\n",l,pmap);
1134 if (pcb->pcb_pm != pmap) {
1135 pcb->pcb_pm = pmap;
1136 (void) pmap_extract(pmap_kernel(), (vaddr_t)pcb->pcb_pm,
1137 (paddr_t *)&pcb->pcb_pmreal);
1138 }
1139
1140 if (l == curproc) {
1141 /* Store pointer to new current pmap. */
1142 curpm = pcb->pcb_pmreal;
1143 }
1144 #endif
1145 }
1146
1147 /*
1148 * Deactivate the specified process's address space.
1149 */
1150 void
1151 pmap_deactivate(struct lwp *l)
1152 {
1153 }
1154
1155 /*
1156 * Synchronize caches corresponding to [addr, addr+len) in p.
1157 */
1158 void
1159 pmap_procwr(struct proc *p, vaddr_t va, size_t len)
1160 {
1161 struct pmap *pm = p->p_vmspace->vm_map.pmap;
1162 int msr, ctx, opid;
1163
1164
1165 /*
1166 * Need to turn off IMMU and switch to user context.
1167 * (icbi uses DMMU).
1168 */
1169 if (!(ctx = pm->pm_ctx)) {
1170 /* No context -- assign it one */
1171 ctx_alloc(pm);
1172 ctx = pm->pm_ctx;
1173 }
1174 __asm __volatile("mfmsr %0;"
1175 "li %1, 0x20;"
1176 "andc %1,%0,%1;"
1177 "mtmsr %1;"
1178 "sync;isync;"
1179 "mfpid %1;"
1180 "mtpid %2;"
1181 "sync; isync;"
1182 "1:"
1183 "dcbf 0,%3;"
1184 "icbi 0,%3;"
1185 "addi %3,%3,32;"
1186 "addic. %4,%4,-32;"
1187 "bge 1b;"
1188 "mtpid %1;"
1189 "mtmsr %0;"
1190 "sync; isync"
1191 : "=&r" (msr), "=&r" (opid)
1192 : "r" (ctx), "r" (va), "r" (len));
1193 }
1194
1195
1196 /* This has to be done in real mode !!! */
1197 void
1198 ppc4xx_tlb_flush(vaddr_t va, int pid)
1199 {
1200 u_long i, found;
1201 u_long msr;
1202
1203 /* If there's no context then it can't be mapped. */
1204 if (!pid) return;
1205
1206 asm("mfpid %1;" /* Save PID */
1207 "mfmsr %2;" /* Save MSR */
1208 "li %0,0;" /* Now clear MSR */
1209 "mtmsr %0;"
1210 "mtpid %4;" /* Set PID */
1211 "sync;"
1212 "tlbsx. %0,0,%3;" /* Search TLB */
1213 "sync;"
1214 "mtpid %1;" /* Restore PID */
1215 "mtmsr %2;" /* Restore MSR */
1216 "sync;isync;"
1217 "li %1,1;"
1218 "beq 1f;"
1219 "li %1,0;"
1220 "1:"
1221 : "=&r" (i), "=&r" (found), "=&r" (msr)
1222 : "r" (va), "r" (pid));
1223 if (found && !TLB_LOCKED(i)) {
1224
1225 /* Now flush translation */
1226 asm volatile(
1227 "tlbwe %0,%1,0;"
1228 "sync;isync;"
1229 : : "r" (0), "r" (i));
1230
1231 tlb_info[i].ti_ctx = 0;
1232 tlb_info[i].ti_flags = 0;
1233 tlbnext = i;
1234 /* Successful flushes */
1235 tlbflush_ev.ev_count++;
1236 }
1237 }
1238
1239 void
1240 ppc4xx_tlb_flush_all(void)
1241 {
1242 u_long i;
1243
1244 for (i = 0; i < NTLB; i++)
1245 if (!TLB_LOCKED(i)) {
1246 asm volatile(
1247 "tlbwe %0,%1,0;"
1248 "sync;isync;"
1249 : : "r" (0), "r" (i));
1250 tlb_info[i].ti_ctx = 0;
1251 tlb_info[i].ti_flags = 0;
1252 }
1253
1254 asm volatile("sync;isync");
1255 }
1256
1257 /* Find a TLB entry to evict. */
1258 static int
1259 ppc4xx_tlb_find_victim(void)
1260 {
1261 int flags;
1262
1263 for (;;) {
1264 if (++tlbnext >= NTLB)
1265 tlbnext = TLB_NRESERVED;
1266 flags = tlb_info[tlbnext].ti_flags;
1267 if (!(flags & TLBF_USED) ||
1268 (flags & (TLBF_LOCKED | TLBF_REF)) == 0) {
1269 u_long va, stack = (u_long)&va;
1270
1271 if (!((tlb_info[tlbnext].ti_va ^ stack) & (~PGOFSET)) &&
1272 (tlb_info[tlbnext].ti_ctx == KERNEL_PID) &&
1273 (flags & TLBF_USED)) {
1274 /* Kernel stack page */
1275 flags |= TLBF_USED;
1276 tlb_info[tlbnext].ti_flags = flags;
1277 } else {
1278 /* Found it! */
1279 return (tlbnext);
1280 }
1281 } else {
1282 tlb_info[tlbnext].ti_flags = (flags & ~TLBF_REF);
1283 }
1284 }
1285 }
1286
1287 void
1288 ppc4xx_tlb_enter(int ctx, vaddr_t va, u_int pte)
1289 {
1290 u_long th, tl, idx;
1291 tlbpid_t pid;
1292 u_short msr;
1293 paddr_t pa;
1294 int s, sz;
1295
1296
1297 tlbenter_ev.ev_count++;
1298
1299 sz = (pte & TTE_SZ_MASK) >> TTE_SZ_SHIFT;
1300 pa = (pte & TTE_RPN_MASK(sz));
1301 th = (va & TLB_EPN_MASK) | (sz << TLB_SIZE_SHFT) | TLB_VALID;
1302 tl = (pte & ~TLB_RPN_MASK) | pa;
1303 tl |= ppc4xx_tlbflags(va, pa);
1304
1305 s = splhigh();
1306 idx = ppc4xx_tlb_find_victim();
1307
1308 #ifdef DIAGNOSTIC
1309 if ((idx < TLB_NRESERVED) || (idx >= NTLB)) {
1310 panic("ppc4xx_tlb_enter: repacing entry %ld\n", idx);
1311 }
1312 #endif
1313
1314 tlb_info[idx].ti_va = (va & TLB_EPN_MASK);
1315 tlb_info[idx].ti_ctx = ctx;
1316 tlb_info[idx].ti_flags = TLBF_USED | TLBF_REF;
1317
1318 asm volatile(
1319 "mfmsr %0;" /* Save MSR */
1320 "li %1,0;"
1321 "tlbwe %1,%3,0;" /* Invalidate old entry. */
1322 "mtmsr %1;" /* Clear MSR */
1323 "mfpid %1;" /* Save old PID */
1324 "mtpid %2;" /* Load translation ctx */
1325 "sync; isync;"
1326 #ifdef DEBUG
1327 "andi. %3,%3,63;"
1328 "tweqi %3,0;" /* XXXXX DEBUG trap on index 0 */
1329 #endif
1330 "tlbwe %4,%3,1; tlbwe %5,%3,0;" /* Set TLB */
1331 "sync; isync;"
1332 "mtpid %1; mtmsr %0;" /* Restore PID and MSR */
1333 "sync; isync;"
1334 : "=&r" (msr), "=&r" (pid)
1335 : "r" (ctx), "r" (idx), "r" (tl), "r" (th));
1336 splx(s);
1337 }
1338
1339 void
1340 ppc4xx_tlb_unpin(int i)
1341 {
1342
1343 if (i == -1)
1344 for (i = 0; i < TLB_NRESERVED; i++)
1345 tlb_info[i].ti_flags &= ~TLBF_LOCKED;
1346 else
1347 tlb_info[i].ti_flags &= ~TLBF_LOCKED;
1348 }
1349
1350 void
1351 ppc4xx_tlb_init(void)
1352 {
1353 int i;
1354
1355 /* Mark reserved TLB entries */
1356 for (i = 0; i < TLB_NRESERVED; i++) {
1357 tlb_info[i].ti_flags = TLBF_LOCKED | TLBF_USED;
1358 tlb_info[i].ti_ctx = KERNEL_PID;
1359 }
1360
1361 /* Setup security zones */
1362 /* Z0 - accessible by kernel only if TLB entry permissions allow
1363 * Z1,Z2 - access is controlled by TLB entry permissions
1364 * Z3 - full access regardless of TLB entry permissions
1365 */
1366
1367 asm volatile(
1368 "mtspr %0,%1;"
1369 "sync;"
1370 :: "K"(SPR_ZPR), "r" (0x1b000000));
1371 }
1372
1373
1374 /*
1375 * We should pass the ctx in from trap code.
1376 */
1377 int
1378 pmap_tlbmiss(vaddr_t va, int ctx)
1379 {
1380 volatile u_int *pte;
1381 u_long tte;
1382
1383 tlbmiss_ev.ev_count++;
1384
1385 /*
1386 * XXXX We will reserve 0-0x80000000 for va==pa mappings.
1387 */
1388 if (ctx != KERNEL_PID || (va & 0x80000000)) {
1389 pte = pte_find((struct pmap *)ctxbusy[ctx], va);
1390 if (pte == NULL) {
1391 /* Map unmanaged addresses directly for kernel access */
1392 return 1;
1393 }
1394 tte = *pte;
1395 if (tte == 0) {
1396 return 1;
1397 }
1398 } else {
1399 /* Create a 16MB writeable mapping. */
1400 #ifdef PPC_4XX_NOCACHE
1401 tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_I | TTE_WR;
1402 #else
1403 tte = TTE_PA(va) | TTE_ZONE(ZONE_PRIV) | TTE_SZ_16M | TTE_WR;
1404 #endif
1405 }
1406 tlbhit_ev.ev_count++;
1407 ppc4xx_tlb_enter(ctx, va, tte);
1408
1409 return 0;
1410 }
1411
1412 /*
1413 * Flush all the entries matching a context from the TLB.
1414 */
1415 static int
1416 ctx_flush(int cnum)
1417 {
1418 int i;
1419
1420 /* We gotta steal this context */
1421 for (i = TLB_NRESERVED; i < NTLB; i++) {
1422 if (tlb_info[i].ti_ctx == cnum) {
1423 /* Can't steal ctx if it has a locked entry. */
1424 if (TLB_LOCKED(i)) {
1425 #ifdef DIAGNOSTIC
1426 printf("ctx_flush: can't invalidate "
1427 "locked mapping %d "
1428 "for context %d\n", i, cnum);
1429 #ifdef DDB
1430 Debugger();
1431 #endif
1432 #endif
1433 return (1);
1434 }
1435 #ifdef DIAGNOSTIC
1436 if (i < TLB_NRESERVED)
1437 panic("TLB entry %d not locked\n", i);
1438 #endif
1439 /* Invalidate particular TLB entry regardless of locked status */
1440 asm volatile("tlbwe %0,%1,0" : :"r"(0),"r"(i));
1441 tlb_info[i].ti_flags = 0;
1442 }
1443 }
1444 return (0);
1445 }
1446
1447 /*
1448 * Allocate a context. If necessary, steal one from someone else.
1449 *
1450 * The new context is flushed from the TLB before returning.
1451 */
1452 int
1453 ctx_alloc(struct pmap *pm)
1454 {
1455 int s, cnum;
1456 static int next = MINCTX;
1457
1458 if (pm == pmap_kernel()) {
1459 #ifdef DIAGNOSTIC
1460 printf("ctx_alloc: kernel pmap!\n");
1461 #endif
1462 return (0);
1463 }
1464 s = splvm();
1465
1466 /* Find a likely context. */
1467 cnum = next;
1468 do {
1469 if ((++cnum) > NUMCTX)
1470 cnum = MINCTX;
1471 } while (ctxbusy[cnum] != NULL && cnum != next);
1472
1473 /* Now clean it out */
1474 oops:
1475 if (cnum < MINCTX)
1476 cnum = MINCTX; /* Never steal ctx 0 or 1 */
1477 if (ctx_flush(cnum)) {
1478 /* oops -- something's wired. */
1479 if ((++cnum) > NUMCTX)
1480 cnum = MINCTX;
1481 goto oops;
1482 }
1483
1484 if (ctxbusy[cnum]) {
1485 #ifdef DEBUG
1486 /* We should identify this pmap and clear it */
1487 printf("Warning: stealing context %d\n", cnum);
1488 #endif
1489 ctxbusy[cnum]->pm_ctx = 0;
1490 }
1491 ctxbusy[cnum] = pm;
1492 next = cnum;
1493 splx(s);
1494 pm->pm_ctx = cnum;
1495
1496 return cnum;
1497 }
1498
1499 /*
1500 * Give away a context.
1501 */
1502 void
1503 ctx_free(struct pmap *pm)
1504 {
1505 int oldctx;
1506
1507 oldctx = pm->pm_ctx;
1508
1509 if (oldctx == 0)
1510 panic("ctx_free: freeing kernel context");
1511 #ifdef DIAGNOSTIC
1512 if (ctxbusy[oldctx] == 0)
1513 printf("ctx_free: freeing free context %d\n", oldctx);
1514 if (ctxbusy[oldctx] != pm) {
1515 printf("ctx_free: freeing someone esle's context\n "
1516 "ctxbusy[%d] = %p, pm->pm_ctx = %p\n",
1517 oldctx, (void *)(u_long)ctxbusy[oldctx], pm);
1518 #ifdef DDB
1519 Debugger();
1520 #endif
1521 }
1522 #endif
1523 /* We should verify it has not been stolen and reallocated... */
1524 ctxbusy[oldctx] = NULL;
1525 ctx_flush(oldctx);
1526 }
1527
1528
1529 #ifdef DEBUG
1530 /*
1531 * Test ref/modify handling.
1532 */
1533 void pmap_testout __P((void));
1534 void
1535 pmap_testout()
1536 {
1537 vaddr_t va;
1538 volatile int *loc;
1539 int val = 0;
1540 paddr_t pa;
1541 struct vm_page *pg;
1542 int ref, mod;
1543
1544 /* Allocate a page */
1545 va = (vaddr_t)uvm_km_alloc1(kernel_map, NBPG, 1);
1546 loc = (int*)va;
1547
1548 pmap_extract(pmap_kernel(), va, &pa);
1549 pg = PHYS_TO_VM_PAGE(pa);
1550 pmap_unwire(pmap_kernel(), va);
1551
1552 pmap_remove(pmap_kernel(), va, va+1);
1553 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1554 pmap_update(pmap_kernel());
1555
1556 /* Now clear reference and modify */
1557 ref = pmap_clear_reference(pg);
1558 mod = pmap_clear_modify(pg);
1559 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1560 (void *)(u_long)va, (long)pa,
1561 ref, mod);
1562
1563 /* Check it's properly cleared */
1564 ref = pmap_is_referenced(pg);
1565 mod = pmap_is_modified(pg);
1566 printf("Checking cleared page: ref %d, mod %d\n",
1567 ref, mod);
1568
1569 /* Reference page */
1570 val = *loc;
1571
1572 ref = pmap_is_referenced(pg);
1573 mod = pmap_is_modified(pg);
1574 printf("Referenced page: ref %d, mod %d val %x\n",
1575 ref, mod, val);
1576
1577 /* Now clear reference and modify */
1578 ref = pmap_clear_reference(pg);
1579 mod = pmap_clear_modify(pg);
1580 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1581 (void *)(u_long)va, (long)pa,
1582 ref, mod);
1583
1584 /* Modify page */
1585 *loc = 1;
1586
1587 ref = pmap_is_referenced(pg);
1588 mod = pmap_is_modified(pg);
1589 printf("Modified page: ref %d, mod %d\n",
1590 ref, mod);
1591
1592 /* Now clear reference and modify */
1593 ref = pmap_clear_reference(pg);
1594 mod = pmap_clear_modify(pg);
1595 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1596 (void *)(u_long)va, (long)pa,
1597 ref, mod);
1598
1599 /* Check it's properly cleared */
1600 ref = pmap_is_referenced(pg);
1601 mod = pmap_is_modified(pg);
1602 printf("Checking cleared page: ref %d, mod %d\n",
1603 ref, mod);
1604
1605 /* Modify page */
1606 *loc = 1;
1607
1608 ref = pmap_is_referenced(pg);
1609 mod = pmap_is_modified(pg);
1610 printf("Modified page: ref %d, mod %d\n",
1611 ref, mod);
1612
1613 /* Check pmap_protect() */
1614 pmap_protect(pmap_kernel(), va, va+1, VM_PROT_READ);
1615 pmap_update(pmap_kernel());
1616 ref = pmap_is_referenced(pg);
1617 mod = pmap_is_modified(pg);
1618 printf("pmap_protect(VM_PROT_READ): ref %d, mod %d\n",
1619 ref, mod);
1620
1621 /* Now clear reference and modify */
1622 ref = pmap_clear_reference(pg);
1623 mod = pmap_clear_modify(pg);
1624 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1625 (void *)(u_long)va, (long)pa,
1626 ref, mod);
1627
1628 /* Reference page */
1629 val = *loc;
1630
1631 ref = pmap_is_referenced(pg);
1632 mod = pmap_is_modified(pg);
1633 printf("Referenced page: ref %d, mod %d val %x\n",
1634 ref, mod, val);
1635
1636 /* Now clear reference and modify */
1637 ref = pmap_clear_reference(pg);
1638 mod = pmap_clear_modify(pg);
1639 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1640 (void *)(u_long)va, (long)pa,
1641 ref, mod);
1642
1643 /* Modify page */
1644 #if 0
1645 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1646 pmap_update(pmap_kernel());
1647 #endif
1648 *loc = 1;
1649
1650 ref = pmap_is_referenced(pg);
1651 mod = pmap_is_modified(pg);
1652 printf("Modified page: ref %d, mod %d\n",
1653 ref, mod);
1654
1655 /* Check pmap_protect() */
1656 pmap_protect(pmap_kernel(), va, va+1, VM_PROT_NONE);
1657 pmap_update(pmap_kernel());
1658 ref = pmap_is_referenced(pg);
1659 mod = pmap_is_modified(pg);
1660 printf("pmap_protect(): ref %d, mod %d\n",
1661 ref, mod);
1662
1663 /* Now clear reference and modify */
1664 ref = pmap_clear_reference(pg);
1665 mod = pmap_clear_modify(pg);
1666 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1667 (void *)(u_long)va, (long)pa,
1668 ref, mod);
1669
1670 /* Reference page */
1671 val = *loc;
1672
1673 ref = pmap_is_referenced(pg);
1674 mod = pmap_is_modified(pg);
1675 printf("Referenced page: ref %d, mod %d val %x\n",
1676 ref, mod, val);
1677
1678 /* Now clear reference and modify */
1679 ref = pmap_clear_reference(pg);
1680 mod = pmap_clear_modify(pg);
1681 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1682 (void *)(u_long)va, (long)pa,
1683 ref, mod);
1684
1685 /* Modify page */
1686 #if 0
1687 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1688 pmap_update(pmap_kernel());
1689 #endif
1690 *loc = 1;
1691
1692 ref = pmap_is_referenced(pg);
1693 mod = pmap_is_modified(pg);
1694 printf("Modified page: ref %d, mod %d\n",
1695 ref, mod);
1696
1697 /* Check pmap_pag_protect() */
1698 pmap_page_protect(pg, VM_PROT_READ);
1699 ref = pmap_is_referenced(pg);
1700 mod = pmap_is_modified(pg);
1701 printf("pmap_page_protect(VM_PROT_READ): ref %d, mod %d\n",
1702 ref, mod);
1703
1704 /* Now clear reference and modify */
1705 ref = pmap_clear_reference(pg);
1706 mod = pmap_clear_modify(pg);
1707 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1708 (void *)(u_long)va, (long)pa,
1709 ref, mod);
1710
1711 /* Reference page */
1712 val = *loc;
1713
1714 ref = pmap_is_referenced(pg);
1715 mod = pmap_is_modified(pg);
1716 printf("Referenced page: ref %d, mod %d val %x\n",
1717 ref, mod, val);
1718
1719 /* Now clear reference and modify */
1720 ref = pmap_clear_reference(pg);
1721 mod = pmap_clear_modify(pg);
1722 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1723 (void *)(u_long)va, (long)pa,
1724 ref, mod);
1725
1726 /* Modify page */
1727 #if 0
1728 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1729 pmap_update(pmap_kernel());
1730 #endif
1731 *loc = 1;
1732
1733 ref = pmap_is_referenced(pg);
1734 mod = pmap_is_modified(pg);
1735 printf("Modified page: ref %d, mod %d\n",
1736 ref, mod);
1737
1738 /* Check pmap_pag_protect() */
1739 pmap_page_protect(pg, VM_PROT_NONE);
1740 ref = pmap_is_referenced(pg);
1741 mod = pmap_is_modified(pg);
1742 printf("pmap_page_protect(): ref %d, mod %d\n",
1743 ref, mod);
1744
1745 /* Now clear reference and modify */
1746 ref = pmap_clear_reference(pg);
1747 mod = pmap_clear_modify(pg);
1748 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1749 (void *)(u_long)va, (long)pa,
1750 ref, mod);
1751
1752
1753 /* Reference page */
1754 val = *loc;
1755
1756 ref = pmap_is_referenced(pg);
1757 mod = pmap_is_modified(pg);
1758 printf("Referenced page: ref %d, mod %d val %x\n",
1759 ref, mod, val);
1760
1761 /* Now clear reference and modify */
1762 ref = pmap_clear_reference(pg);
1763 mod = pmap_clear_modify(pg);
1764 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1765 (void *)(u_long)va, (long)pa,
1766 ref, mod);
1767
1768 /* Modify page */
1769 #if 0
1770 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL, 0);
1771 pmap_update(pmap_kernel());
1772 #endif
1773 *loc = 1;
1774
1775 ref = pmap_is_referenced(pg);
1776 mod = pmap_is_modified(pg);
1777 printf("Modified page: ref %d, mod %d\n",
1778 ref, mod);
1779
1780 /* Unmap page */
1781 pmap_remove(pmap_kernel(), va, va+1);
1782 pmap_update(pmap_kernel());
1783 ref = pmap_is_referenced(pg);
1784 mod = pmap_is_modified(pg);
1785 printf("Unmapped page: ref %d, mod %d\n", ref, mod);
1786
1787 /* Now clear reference and modify */
1788 ref = pmap_clear_reference(pg);
1789 mod = pmap_clear_modify(pg);
1790 printf("Clearing page va %p pa %lx: ref %d, mod %d\n",
1791 (void *)(u_long)va, (long)pa, ref, mod);
1792
1793 /* Check it's properly cleared */
1794 ref = pmap_is_referenced(pg);
1795 mod = pmap_is_modified(pg);
1796 printf("Checking cleared page: ref %d, mod %d\n",
1797 ref, mod);
1798
1799 pmap_enter(pmap_kernel(), va, pa, VM_PROT_ALL,
1800 VM_PROT_ALL|PMAP_WIRED);
1801 uvm_km_free(kernel_map, (vaddr_t)va, NBPG);
1802 }
1803 #endif
1804