trap.c revision 1.39 1 1.39 ad /* $NetBSD: trap.c,v 1.39 2007/02/15 15:14:57 ad Exp $ */
2 1.1 simonb
3 1.1 simonb /*
4 1.1 simonb * Copyright 2001 Wasabi Systems, Inc.
5 1.1 simonb * All rights reserved.
6 1.1 simonb *
7 1.1 simonb * Written by Eduardo Horvath and Simon Burge for Wasabi Systems, Inc.
8 1.1 simonb *
9 1.1 simonb * Redistribution and use in source and binary forms, with or without
10 1.1 simonb * modification, are permitted provided that the following conditions
11 1.1 simonb * are met:
12 1.1 simonb * 1. Redistributions of source code must retain the above copyright
13 1.1 simonb * notice, this list of conditions and the following disclaimer.
14 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
15 1.1 simonb * notice, this list of conditions and the following disclaimer in the
16 1.1 simonb * documentation and/or other materials provided with the distribution.
17 1.1 simonb * 3. All advertising materials mentioning features or use of this software
18 1.1 simonb * must display the following acknowledgement:
19 1.1 simonb * This product includes software developed for the NetBSD Project by
20 1.1 simonb * Wasabi Systems, Inc.
21 1.1 simonb * 4. The name of Wasabi Systems, Inc. may not be used to endorse
22 1.1 simonb * or promote products derived from this software without specific prior
23 1.1 simonb * written permission.
24 1.1 simonb *
25 1.1 simonb * THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
26 1.1 simonb * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
27 1.1 simonb * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
28 1.1 simonb * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
29 1.1 simonb * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
30 1.1 simonb * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
31 1.1 simonb * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
32 1.1 simonb * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
33 1.1 simonb * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
34 1.1 simonb * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
35 1.1 simonb * POSSIBILITY OF SUCH DAMAGE.
36 1.1 simonb */
37 1.1 simonb
38 1.1 simonb /*
39 1.1 simonb * Copyright (C) 1995, 1996 Wolfgang Solfrank.
40 1.1 simonb * Copyright (C) 1995, 1996 TooLs GmbH.
41 1.1 simonb * All rights reserved.
42 1.1 simonb *
43 1.1 simonb * Redistribution and use in source and binary forms, with or without
44 1.1 simonb * modification, are permitted provided that the following conditions
45 1.1 simonb * are met:
46 1.1 simonb * 1. Redistributions of source code must retain the above copyright
47 1.1 simonb * notice, this list of conditions and the following disclaimer.
48 1.1 simonb * 2. Redistributions in binary form must reproduce the above copyright
49 1.1 simonb * notice, this list of conditions and the following disclaimer in the
50 1.1 simonb * documentation and/or other materials provided with the distribution.
51 1.1 simonb * 3. All advertising materials mentioning features or use of this software
52 1.1 simonb * must display the following acknowledgement:
53 1.1 simonb * This product includes software developed by TooLs GmbH.
54 1.1 simonb * 4. The name of TooLs GmbH may not be used to endorse or promote products
55 1.1 simonb * derived from this software without specific prior written permission.
56 1.1 simonb *
57 1.1 simonb * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
58 1.1 simonb * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
59 1.1 simonb * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
60 1.1 simonb * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
61 1.1 simonb * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
62 1.1 simonb * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
63 1.1 simonb * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
64 1.1 simonb * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
65 1.1 simonb * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
66 1.1 simonb * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
67 1.1 simonb */
68 1.14 lukem
69 1.14 lukem #include <sys/cdefs.h>
70 1.39 ad __KERNEL_RCSID(0, "$NetBSD: trap.c,v 1.39 2007/02/15 15:14:57 ad Exp $");
71 1.1 simonb
72 1.1 simonb #include "opt_altivec.h"
73 1.1 simonb #include "opt_ddb.h"
74 1.1 simonb
75 1.1 simonb #include <sys/param.h>
76 1.1 simonb #include <sys/proc.h>
77 1.1 simonb #include <sys/reboot.h>
78 1.1 simonb #include <sys/syscall.h>
79 1.1 simonb #include <sys/systm.h>
80 1.1 simonb #include <sys/user.h>
81 1.10 thorpej #include <sys/pool.h>
82 1.20 cl #include <sys/userret.h>
83 1.34 yamt #include <sys/kauth.h>
84 1.1 simonb
85 1.1 simonb #include <uvm/uvm_extern.h>
86 1.1 simonb
87 1.1 simonb #include <dev/cons.h>
88 1.1 simonb
89 1.1 simonb #include <machine/cpu.h>
90 1.1 simonb #include <machine/db_machdep.h>
91 1.1 simonb #include <machine/fpu.h>
92 1.1 simonb #include <machine/frame.h>
93 1.1 simonb #include <machine/pcb.h>
94 1.1 simonb #include <machine/psl.h>
95 1.1 simonb #include <machine/trap.h>
96 1.1 simonb
97 1.1 simonb #include <powerpc/spr.h>
98 1.1 simonb #include <powerpc/ibm4xx/pmap.h>
99 1.1 simonb #include <powerpc/ibm4xx/tlb.h>
100 1.1 simonb #include <powerpc/fpu/fpu_extern.h>
101 1.1 simonb
102 1.1 simonb /* These definitions should probably be somewhere else XXX */
103 1.1 simonb #define FIRSTARG 3 /* first argument is in reg 3 */
104 1.1 simonb #define NARGREG 8 /* 8 args are in registers */
105 1.1 simonb #define MOREARGS(sp) ((caddr_t)((int)(sp) + 8)) /* more args go here */
106 1.1 simonb
107 1.10 thorpej static int fix_unaligned __P((struct lwp *l, struct trapframe *frame));
108 1.1 simonb
109 1.1 simonb void trap __P((struct trapframe *)); /* Called from locore / trap_subr */
110 1.1 simonb /* Why are these not defined in a header? */
111 1.1 simonb int badaddr __P((void *, size_t));
112 1.1 simonb int badaddr_read __P((void *, size_t, int *));
113 1.1 simonb int ctx_setup __P((int, int));
114 1.1 simonb
115 1.1 simonb #ifdef DEBUG
116 1.1 simonb #define TDB_ALL 0x1
117 1.1 simonb int trapdebug = /* TDB_ALL */ 0;
118 1.1 simonb #define DBPRINTF(x, y) if (trapdebug & (x)) printf y
119 1.1 simonb #else
120 1.1 simonb #define DBPRINTF(x, y)
121 1.1 simonb #endif
122 1.1 simonb
123 1.1 simonb void
124 1.1 simonb trap(struct trapframe *frame)
125 1.1 simonb {
126 1.10 thorpej struct lwp *l = curlwp;
127 1.10 thorpej struct proc *p = l ? l->l_proc : NULL;
128 1.1 simonb int type = frame->exc;
129 1.1 simonb int ftype, rv;
130 1.18 eeh ksiginfo_t ksi;
131 1.1 simonb
132 1.10 thorpej KASSERT(l == 0 || (l->l_stat == LSONPROC));
133 1.1 simonb
134 1.35 ad if (frame->srr1 & PSL_PR) {
135 1.35 ad LWP_CACHE_CREDS(l, p);
136 1.1 simonb type |= EXC_USER;
137 1.35 ad }
138 1.1 simonb
139 1.1 simonb ftype = VM_PROT_READ;
140 1.1 simonb
141 1.13 simonb DBPRINTF(TDB_ALL, ("trap(%x) at %lx from frame %p &frame %p\n",
142 1.13 simonb type, frame->srr0, frame, &frame));
143 1.1 simonb
144 1.1 simonb switch (type) {
145 1.1 simonb case EXC_DEBUG|EXC_USER:
146 1.13 simonb {
147 1.13 simonb int srr2, srr3;
148 1.13 simonb
149 1.28 perry __asm volatile("mfspr %0,0x3f0" :
150 1.13 simonb "=r" (rv), "=r" (srr2), "=r" (srr3) :);
151 1.13 simonb printf("debug reg is %x srr2 %x srr3 %x\n", rv, srr2,
152 1.13 simonb srr3);
153 1.13 simonb /* XXX fall through or break here?! */
154 1.13 simonb }
155 1.1 simonb /*
156 1.1 simonb * DEBUG intr -- probably single-step.
157 1.1 simonb */
158 1.1 simonb case EXC_TRC|EXC_USER:
159 1.17 matt frame->srr1 &= ~PSL_SE;
160 1.19 thorpej KSI_INIT_TRAP(&ksi);
161 1.17 matt ksi.ksi_signo = SIGTRAP;
162 1.17 matt ksi.ksi_trap = EXC_TRC;
163 1.17 matt ksi.ksi_addr = (void *)frame->srr0;
164 1.39 ad KERNEL_LOCK(1, l);
165 1.17 matt trapsignal(l, &ksi);
166 1.39 ad KERNEL_UNLOCK_LAST(l);
167 1.1 simonb break;
168 1.7 simonb
169 1.13 simonb /*
170 1.13 simonb * If we could not find and install appropriate TLB entry, fall through.
171 1.13 simonb */
172 1.7 simonb
173 1.1 simonb case EXC_DSI:
174 1.1 simonb /* FALLTHROUGH */
175 1.1 simonb case EXC_DTMISS:
176 1.1 simonb {
177 1.1 simonb struct vm_map *map;
178 1.1 simonb vaddr_t va;
179 1.11 matt struct faultbuf *fb = NULL;
180 1.1 simonb
181 1.39 ad KERNEL_LOCK(1, NULL);
182 1.11 matt va = frame->dar;
183 1.11 matt if (frame->tf_xtra[TF_PID] == KERNEL_PID) {
184 1.1 simonb map = kernel_map;
185 1.1 simonb } else {
186 1.1 simonb map = &p->p_vmspace->vm_map;
187 1.1 simonb }
188 1.1 simonb
189 1.11 matt if (frame->tf_xtra[TF_ESR] & (ESR_DST|ESR_DIZ))
190 1.3 chs ftype = VM_PROT_WRITE;
191 1.1 simonb
192 1.13 simonb DBPRINTF(TDB_ALL,
193 1.13 simonb ("trap(EXC_DSI) at %lx %s fault on %p esr %x\n",
194 1.13 simonb frame->srr0,
195 1.13 simonb (ftype & VM_PROT_WRITE) ? "write" : "read",
196 1.13 simonb (void *)va, frame->tf_xtra[TF_ESR]));
197 1.32 drochner rv = uvm_fault(map, trunc_page(va), ftype);
198 1.39 ad KERNEL_UNLOCK_ONE(NULL);
199 1.1 simonb if (rv == 0)
200 1.1 simonb goto done;
201 1.10 thorpej if ((fb = l->l_addr->u_pcb.pcb_onfault) != NULL) {
202 1.11 matt frame->tf_xtra[TF_PID] = KERNEL_PID;
203 1.11 matt frame->srr0 = fb->fb_pc;
204 1.1 simonb frame->srr1 |= PSL_IR; /* Re-enable IMMU */
205 1.11 matt frame->fixreg[1] = fb->fb_sp;
206 1.11 matt frame->fixreg[2] = fb->fb_r2;
207 1.1 simonb frame->fixreg[3] = 1; /* Return TRUE */
208 1.11 matt frame->cr = fb->fb_cr;
209 1.11 matt memcpy(&frame->fixreg[13], fb->fb_fixreg,
210 1.11 matt sizeof(fb->fb_fixreg));
211 1.1 simonb goto done;
212 1.1 simonb }
213 1.1 simonb }
214 1.1 simonb goto brain_damage;
215 1.7 simonb
216 1.1 simonb case EXC_DSI|EXC_USER:
217 1.1 simonb /* FALLTHROUGH */
218 1.1 simonb case EXC_DTMISS|EXC_USER:
219 1.39 ad KERNEL_LOCK(1, l);
220 1.7 simonb
221 1.11 matt if (frame->tf_xtra[TF_ESR] & (ESR_DST|ESR_DIZ))
222 1.3 chs ftype = VM_PROT_WRITE;
223 1.1 simonb
224 1.13 simonb DBPRINTF(TDB_ALL,
225 1.13 simonb ("trap(EXC_DSI|EXC_USER) at %lx %s fault on %lx %x\n",
226 1.13 simonb frame->srr0, (ftype & VM_PROT_WRITE) ? "write" : "read",
227 1.13 simonb frame->dar, frame->tf_xtra[TF_ESR]));
228 1.13 simonb KASSERT(l == curlwp && (l->l_stat == LSONPROC));
229 1.13 simonb rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(frame->dar),
230 1.32 drochner ftype);
231 1.1 simonb if (rv == 0) {
232 1.39 ad KERNEL_UNLOCK_LAST(l);
233 1.13 simonb break;
234 1.1 simonb }
235 1.19 thorpej KSI_INIT_TRAP(&ksi);
236 1.17 matt ksi.ksi_signo = SIGSEGV;
237 1.17 matt ksi.ksi_trap = EXC_DSI;
238 1.17 matt ksi.ksi_addr = (void *)frame->dar;
239 1.1 simonb if (rv == ENOMEM) {
240 1.10 thorpej printf("UVM: pid %d (%s) lid %d, uid %d killed: "
241 1.13 simonb "out of swap\n",
242 1.13 simonb p->p_pid, p->p_comm, l->l_lid,
243 1.36 ad l->l_cred ?
244 1.36 ad kauth_cred_geteuid(l->l_cred) : -1);
245 1.17 matt ksi.ksi_signo = SIGKILL;
246 1.1 simonb }
247 1.17 matt trapsignal(l, &ksi);
248 1.39 ad KERNEL_UNLOCK_LAST(l);
249 1.1 simonb break;
250 1.15 chs
251 1.1 simonb case EXC_ITMISS|EXC_USER:
252 1.1 simonb case EXC_ISI|EXC_USER:
253 1.39 ad KERNEL_LOCK(1, l);
254 1.15 chs ftype = VM_PROT_EXECUTE;
255 1.13 simonb DBPRINTF(TDB_ALL,
256 1.15 chs ("trap(EXC_ISI|EXC_USER) at %lx execute fault tf %p\n",
257 1.13 simonb frame->srr0, frame));
258 1.13 simonb rv = uvm_fault(&p->p_vmspace->vm_map, trunc_page(frame->srr0),
259 1.32 drochner ftype);
260 1.1 simonb if (rv == 0) {
261 1.39 ad KERNEL_UNLOCK_LAST(l);
262 1.13 simonb break;
263 1.1 simonb }
264 1.19 thorpej KSI_INIT_TRAP(&ksi);
265 1.17 matt ksi.ksi_signo = SIGSEGV;
266 1.17 matt ksi.ksi_trap = EXC_ISI;
267 1.17 matt ksi.ksi_addr = (void *)frame->srr0;
268 1.21 drochner ksi.ksi_code = (rv == EACCES ? SEGV_ACCERR : SEGV_MAPERR);
269 1.17 matt trapsignal(l, &ksi);
270 1.39 ad KERNEL_UNLOCK_LAST(l);
271 1.1 simonb break;
272 1.1 simonb
273 1.1 simonb case EXC_AST|EXC_USER:
274 1.11 matt curcpu()->ci_astpending = 0; /* we are about to do it */
275 1.1 simonb uvmexp.softs++;
276 1.39 ad if (l->l_pflag & LP_OWEUPC) {
277 1.39 ad l->l_pflag &= ~LP_OWEUPC;
278 1.39 ad ADDUPROF(l);
279 1.1 simonb }
280 1.1 simonb /* Check whether we are being preempted. */
281 1.11 matt if (curcpu()->ci_want_resched)
282 1.38 ad preempt();
283 1.1 simonb break;
284 1.1 simonb
285 1.1 simonb
286 1.1 simonb case EXC_ALI|EXC_USER:
287 1.39 ad KERNEL_LOCK(1, l);
288 1.17 matt if (fix_unaligned(l, frame) != 0) {
289 1.19 thorpej KSI_INIT_TRAP(&ksi);
290 1.17 matt ksi.ksi_signo = SIGBUS;
291 1.17 matt ksi.ksi_trap = EXC_ALI;
292 1.17 matt ksi.ksi_addr = (void *)frame->dar;
293 1.17 matt trapsignal(l, &ksi);
294 1.17 matt } else
295 1.1 simonb frame->srr0 += 4;
296 1.39 ad KERNEL_UNLOCK_LAST(l);
297 1.1 simonb break;
298 1.1 simonb
299 1.1 simonb case EXC_PGM|EXC_USER:
300 1.7 simonb /*
301 1.7 simonb * Illegal insn:
302 1.1 simonb *
303 1.7 simonb * let's try to see if it's FPU and can be emulated.
304 1.1 simonb */
305 1.24 simonb uvmexp.traps++;
306 1.10 thorpej if (!(l->l_addr->u_pcb.pcb_flags & PCB_FPU)) {
307 1.10 thorpej memset(&l->l_addr->u_pcb.pcb_fpu, 0,
308 1.10 thorpej sizeof l->l_addr->u_pcb.pcb_fpu);
309 1.10 thorpej l->l_addr->u_pcb.pcb_flags |= PCB_FPU;
310 1.1 simonb }
311 1.1 simonb
312 1.7 simonb if ((rv = fpu_emulate(frame,
313 1.10 thorpej (struct fpreg *)&l->l_addr->u_pcb.pcb_fpu))) {
314 1.19 thorpej KSI_INIT_TRAP(&ksi);
315 1.17 matt ksi.ksi_signo = rv;
316 1.17 matt ksi.ksi_trap = EXC_PGM;
317 1.17 matt ksi.ksi_addr = (void *)frame->srr0;
318 1.39 ad KERNEL_LOCK(1, l);
319 1.17 matt trapsignal(l, &ksi);
320 1.39 ad KERNEL_UNLOCK_LAST(l);
321 1.1 simonb }
322 1.1 simonb break;
323 1.1 simonb
324 1.1 simonb case EXC_MCHK:
325 1.1 simonb {
326 1.11 matt struct faultbuf *fb;
327 1.1 simonb
328 1.10 thorpej if ((fb = l->l_addr->u_pcb.pcb_onfault) != NULL) {
329 1.11 matt frame->tf_xtra[TF_PID] = KERNEL_PID;
330 1.11 matt frame->srr0 = fb->fb_pc;
331 1.1 simonb frame->srr1 |= PSL_IR; /* Re-enable IMMU */
332 1.11 matt frame->fixreg[1] = fb->fb_sp;
333 1.11 matt frame->fixreg[2] = fb->fb_r2;
334 1.1 simonb frame->fixreg[3] = 1; /* Return TRUE */
335 1.11 matt frame->cr = fb->fb_cr;
336 1.11 matt memcpy(&frame->fixreg[13], fb->fb_fixreg,
337 1.11 matt sizeof(fb->fb_fixreg));
338 1.1 simonb goto done;
339 1.1 simonb }
340 1.1 simonb }
341 1.1 simonb goto brain_damage;
342 1.1 simonb default:
343 1.13 simonb brain_damage:
344 1.11 matt printf("trap type 0x%x at 0x%lx\n", type, frame->srr0);
345 1.1 simonb #ifdef DDB
346 1.1 simonb if (kdb_trap(type, frame))
347 1.1 simonb goto done;
348 1.1 simonb #endif
349 1.1 simonb #ifdef TRAP_PANICWAIT
350 1.1 simonb printf("Press a key to panic.\n");
351 1.1 simonb cngetc();
352 1.1 simonb #endif
353 1.1 simonb panic("trap");
354 1.1 simonb }
355 1.1 simonb
356 1.20 cl /* Invoke MI userret code */
357 1.20 cl mi_userret(l);
358 1.10 thorpej
359 1.10 thorpej curcpu()->ci_schedstate.spc_curpriority = l->l_priority = l->l_usrpri;
360 1.13 simonb done:
361 1.9 thorpej return;
362 1.1 simonb }
363 1.1 simonb
364 1.1 simonb int
365 1.1 simonb ctx_setup(int ctx, int srr1)
366 1.1 simonb {
367 1.1 simonb volatile struct pmap *pm;
368 1.1 simonb
369 1.1 simonb /* Update PID if we're returning to user mode. */
370 1.1 simonb if (srr1 & PSL_PR) {
371 1.1 simonb pm = curproc->p_vmspace->vm_map.pmap;
372 1.1 simonb if (!pm->pm_ctx) {
373 1.26 scw ctx_alloc(__UNVOLATILE(pm));
374 1.1 simonb }
375 1.1 simonb ctx = pm->pm_ctx;
376 1.1 simonb if (srr1 & PSL_SE) {
377 1.1 simonb int dbreg, mask = 0x48000000;
378 1.1 simonb /*
379 1.1 simonb * Set the Internal Debug and
380 1.1 simonb * Instruction Completion bits of
381 1.1 simonb * the DBCR0 register.
382 1.1 simonb *
383 1.1 simonb * XXX this is also used by jtag debuggers...
384 1.1 simonb */
385 1.28 perry __asm volatile("mfspr %0,0x3f2;"
386 1.13 simonb "or %0,%0,%1;"
387 1.13 simonb "mtspr 0x3f2,%0;" :
388 1.13 simonb "=&r" (dbreg) : "r" (mask));
389 1.1 simonb }
390 1.1 simonb }
391 1.1 simonb else if (!ctx) {
392 1.1 simonb ctx = KERNEL_PID;
393 1.1 simonb }
394 1.1 simonb return (ctx);
395 1.1 simonb }
396 1.1 simonb
397 1.1 simonb /*
398 1.1 simonb * Used by copyin()/copyout()
399 1.1 simonb */
400 1.1 simonb extern vaddr_t vmaprange __P((struct proc *, vaddr_t, vsize_t, int));
401 1.1 simonb extern void vunmaprange __P((vaddr_t, vsize_t));
402 1.13 simonb static int bigcopyin __P((const void *, void *, size_t ));
403 1.1 simonb static int bigcopyout __P((const void *, void *, size_t ));
404 1.1 simonb
405 1.1 simonb int
406 1.1 simonb copyin(const void *udaddr, void *kaddr, size_t len)
407 1.1 simonb {
408 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
409 1.1 simonb int msr, pid, tmp, ctx;
410 1.11 matt struct faultbuf env;
411 1.1 simonb
412 1.1 simonb /* For bigger buffers use the faster copy */
413 1.25 simonb if (len > 256)
414 1.25 simonb return (bigcopyin(udaddr, kaddr, len));
415 1.1 simonb
416 1.11 matt if (setfault(&env)) {
417 1.1 simonb curpcb->pcb_onfault = 0;
418 1.1 simonb return EFAULT;
419 1.1 simonb }
420 1.1 simonb
421 1.1 simonb if (!(ctx = pm->pm_ctx)) {
422 1.1 simonb /* No context -- assign it one */
423 1.1 simonb ctx_alloc(pm);
424 1.1 simonb ctx = pm->pm_ctx;
425 1.1 simonb }
426 1.1 simonb
427 1.29 perry __asm volatile("addi %6,%6,1; mtctr %6;" /* Set up counter */
428 1.1 simonb "mfmsr %0;" /* Save MSR */
429 1.1 simonb "li %1,0x20; "
430 1.1 simonb "andc %1,%0,%1; mtmsr %1;" /* Disable IMMU */
431 1.1 simonb "mfpid %1;" /* Save old PID */
432 1.1 simonb "sync; isync;"
433 1.1 simonb
434 1.1 simonb "1: bdz 2f;" /* while len */
435 1.1 simonb "mtpid %3; sync;" /* Load user ctx */
436 1.1 simonb "lbz %2,0(%4); addi %4,%4,1;" /* Load byte */
437 1.1 simonb "sync; isync;"
438 1.1 simonb "mtpid %1;sync;"
439 1.13 simonb "stb %2,0(%5); dcbf 0,%5; addi %5,%5,1;" /* Store kernel byte */
440 1.1 simonb "sync; isync;"
441 1.1 simonb "b 1b;" /* repeat */
442 1.1 simonb
443 1.1 simonb "2: mtpid %1; mtmsr %0;" /* Restore PID and MSR */
444 1.1 simonb "sync; isync;"
445 1.1 simonb : "=&r" (msr), "=&r" (pid), "=&r" (tmp)
446 1.23 scw : "r" (ctx), "b" (udaddr), "b" (kaddr), "b" (len));
447 1.1 simonb
448 1.1 simonb curpcb->pcb_onfault = 0;
449 1.1 simonb return 0;
450 1.1 simonb }
451 1.1 simonb
452 1.1 simonb static int
453 1.1 simonb bigcopyin(const void *udaddr, void *kaddr, size_t len)
454 1.1 simonb {
455 1.1 simonb const char *up;
456 1.1 simonb char *kp = kaddr;
457 1.10 thorpej struct lwp *l = curlwp;
458 1.10 thorpej struct proc *p;
459 1.1 simonb int error;
460 1.1 simonb
461 1.10 thorpej if (!l) {
462 1.1 simonb return EFAULT;
463 1.1 simonb }
464 1.1 simonb
465 1.10 thorpej p = l->l_proc;
466 1.10 thorpej
467 1.1 simonb /*
468 1.7 simonb * Stolen from physio():
469 1.1 simonb */
470 1.10 thorpej PHOLD(l);
471 1.37 chs error = uvm_vslock(p->p_vmspace, __UNCONST(udaddr), len, VM_PROT_READ);
472 1.1 simonb if (error) {
473 1.10 thorpej PRELE(l);
474 1.1 simonb return EFAULT;
475 1.1 simonb }
476 1.1 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len, VM_PROT_READ);
477 1.1 simonb
478 1.2 wiz memcpy(kp, up, len);
479 1.1 simonb vunmaprange((vaddr_t)up, len);
480 1.37 chs uvm_vsunlock(p->p_vmspace, __UNCONST(udaddr), len);
481 1.10 thorpej PRELE(l);
482 1.1 simonb
483 1.7 simonb return 0;
484 1.1 simonb }
485 1.1 simonb
486 1.1 simonb int
487 1.1 simonb copyout(const void *kaddr, void *udaddr, size_t len)
488 1.1 simonb {
489 1.1 simonb struct pmap *pm = curproc->p_vmspace->vm_map.pmap;
490 1.1 simonb int msr, pid, tmp, ctx;
491 1.11 matt struct faultbuf env;
492 1.1 simonb
493 1.1 simonb /* For big copies use more efficient routine */
494 1.25 simonb if (len > 256)
495 1.25 simonb return (bigcopyout(kaddr, udaddr, len));
496 1.1 simonb
497 1.11 matt if (setfault(&env)) {
498 1.1 simonb curpcb->pcb_onfault = 0;
499 1.1 simonb return EFAULT;
500 1.1 simonb }
501 1.1 simonb
502 1.1 simonb if (!(ctx = pm->pm_ctx)) {
503 1.1 simonb /* No context -- assign it one */
504 1.1 simonb ctx_alloc(pm);
505 1.1 simonb ctx = pm->pm_ctx;
506 1.1 simonb }
507 1.1 simonb
508 1.29 perry __asm volatile("addi %6,%6,1; mtctr %6;" /* Set up counter */
509 1.1 simonb "mfmsr %0;" /* Save MSR */
510 1.1 simonb "li %1,0x20; "
511 1.1 simonb "andc %1,%0,%1; mtmsr %1;" /* Disable IMMU */
512 1.1 simonb "mfpid %1;" /* Save old PID */
513 1.1 simonb "sync; isync;"
514 1.1 simonb
515 1.1 simonb "1: bdz 2f;" /* while len */
516 1.1 simonb "mtpid %1;sync;"
517 1.1 simonb "lbz %2,0(%5); addi %5,%5,1;" /* Load kernel byte */
518 1.1 simonb "sync; isync;"
519 1.1 simonb "mtpid %3; sync;" /* Load user ctx */
520 1.13 simonb "stb %2,0(%4); dcbf 0,%4; addi %4,%4,1;" /* Store user byte */
521 1.1 simonb "sync; isync;"
522 1.1 simonb "b 1b;" /* repeat */
523 1.1 simonb
524 1.1 simonb "2: mtpid %1; mtmsr %0;" /* Restore PID and MSR */
525 1.1 simonb "sync; isync;"
526 1.1 simonb : "=&r" (msr), "=&r" (pid), "=&r" (tmp)
527 1.23 scw : "r" (ctx), "b" (udaddr), "b" (kaddr), "b" (len));
528 1.1 simonb
529 1.1 simonb curpcb->pcb_onfault = 0;
530 1.1 simonb return 0;
531 1.1 simonb }
532 1.1 simonb
533 1.1 simonb static int
534 1.1 simonb bigcopyout(const void *kaddr, void *udaddr, size_t len)
535 1.1 simonb {
536 1.1 simonb char *up;
537 1.26 scw const char *kp = (const char *)kaddr;
538 1.10 thorpej struct lwp *l = curlwp;
539 1.10 thorpej struct proc *p;
540 1.1 simonb int error;
541 1.1 simonb
542 1.10 thorpej if (!l) {
543 1.1 simonb return EFAULT;
544 1.1 simonb }
545 1.1 simonb
546 1.10 thorpej p = l->l_proc;
547 1.10 thorpej
548 1.1 simonb /*
549 1.7 simonb * Stolen from physio():
550 1.1 simonb */
551 1.10 thorpej PHOLD(l);
552 1.37 chs error = uvm_vslock(p->p_vmspace, udaddr, len, VM_PROT_WRITE);
553 1.1 simonb if (error) {
554 1.10 thorpej PRELE(l);
555 1.1 simonb return EFAULT;
556 1.1 simonb }
557 1.7 simonb up = (char *)vmaprange(p, (vaddr_t)udaddr, len,
558 1.13 simonb VM_PROT_READ | VM_PROT_WRITE);
559 1.1 simonb
560 1.2 wiz memcpy(up, kp, len);
561 1.1 simonb vunmaprange((vaddr_t)up, len);
562 1.37 chs uvm_vsunlock(p->p_vmspace, udaddr, len);
563 1.10 thorpej PRELE(l);
564 1.1 simonb
565 1.7 simonb return 0;
566 1.1 simonb }
567 1.1 simonb
568 1.1 simonb /*
569 1.1 simonb * kcopy(const void *src, void *dst, size_t len);
570 1.1 simonb *
571 1.1 simonb * Copy len bytes from src to dst, aborting if we encounter a fatal
572 1.1 simonb * page fault.
573 1.1 simonb *
574 1.1 simonb * kcopy() _must_ save and restore the old fault handler since it is
575 1.1 simonb * called by uiomove(), which may be in the path of servicing a non-fatal
576 1.1 simonb * page fault.
577 1.1 simonb */
578 1.1 simonb int
579 1.1 simonb kcopy(const void *src, void *dst, size_t len)
580 1.1 simonb {
581 1.11 matt struct faultbuf env, *oldfault;
582 1.1 simonb
583 1.1 simonb oldfault = curpcb->pcb_onfault;
584 1.11 matt if (setfault(&env)) {
585 1.1 simonb curpcb->pcb_onfault = oldfault;
586 1.1 simonb return EFAULT;
587 1.1 simonb }
588 1.1 simonb
589 1.2 wiz memcpy(dst, src, len);
590 1.1 simonb
591 1.1 simonb curpcb->pcb_onfault = oldfault;
592 1.1 simonb return 0;
593 1.1 simonb }
594 1.1 simonb
595 1.1 simonb int
596 1.1 simonb badaddr(void *addr, size_t size)
597 1.1 simonb {
598 1.1 simonb
599 1.1 simonb return badaddr_read(addr, size, NULL);
600 1.1 simonb }
601 1.1 simonb
602 1.1 simonb int
603 1.1 simonb badaddr_read(void *addr, size_t size, int *rptr)
604 1.1 simonb {
605 1.11 matt struct faultbuf env;
606 1.1 simonb int x;
607 1.1 simonb
608 1.1 simonb /* Get rid of any stale machine checks that have been waiting. */
609 1.28 perry __asm volatile ("sync; isync");
610 1.1 simonb
611 1.11 matt if (setfault(&env)) {
612 1.1 simonb curpcb->pcb_onfault = 0;
613 1.28 perry __asm volatile ("sync");
614 1.1 simonb return 1;
615 1.1 simonb }
616 1.1 simonb
617 1.28 perry __asm volatile ("sync");
618 1.1 simonb
619 1.1 simonb switch (size) {
620 1.1 simonb case 1:
621 1.1 simonb x = *(volatile int8_t *)addr;
622 1.1 simonb break;
623 1.1 simonb case 2:
624 1.1 simonb x = *(volatile int16_t *)addr;
625 1.1 simonb break;
626 1.1 simonb case 4:
627 1.1 simonb x = *(volatile int32_t *)addr;
628 1.1 simonb break;
629 1.1 simonb default:
630 1.1 simonb panic("badaddr: invalid size (%d)", size);
631 1.1 simonb }
632 1.1 simonb
633 1.1 simonb /* Make sure we took the machine check, if we caused one. */
634 1.28 perry __asm volatile ("sync; isync");
635 1.1 simonb
636 1.1 simonb curpcb->pcb_onfault = 0;
637 1.28 perry __asm volatile ("sync"); /* To be sure. */
638 1.1 simonb
639 1.1 simonb /* Use the value to avoid reorder. */
640 1.1 simonb if (rptr)
641 1.1 simonb *rptr = x;
642 1.1 simonb
643 1.1 simonb return 0;
644 1.1 simonb }
645 1.1 simonb
646 1.1 simonb /*
647 1.1 simonb * For now, this only deals with the particular unaligned access case
648 1.1 simonb * that gcc tends to generate. Eventually it should handle all of the
649 1.1 simonb * possibilities that can happen on a 32-bit PowerPC in big-endian mode.
650 1.1 simonb */
651 1.1 simonb
652 1.1 simonb static int
653 1.10 thorpej fix_unaligned(struct lwp *l, struct trapframe *frame)
654 1.1 simonb {
655 1.1 simonb
656 1.1 simonb return -1;
657 1.10 thorpej }
658 1.10 thorpej
659 1.10 thorpej /*
660 1.10 thorpej * Start a new LWP
661 1.10 thorpej */
662 1.10 thorpej void
663 1.10 thorpej startlwp(arg)
664 1.10 thorpej void *arg;
665 1.10 thorpej {
666 1.10 thorpej int err;
667 1.10 thorpej ucontext_t *uc = arg;
668 1.10 thorpej struct lwp *l = curlwp;
669 1.10 thorpej
670 1.10 thorpej err = cpu_setmcontext(l, &uc->uc_mcontext, uc->uc_flags);
671 1.10 thorpej #if DIAGNOSTIC
672 1.10 thorpej if (err) {
673 1.10 thorpej printf("Error %d from cpu_setmcontext.", err);
674 1.10 thorpej }
675 1.10 thorpej #endif
676 1.10 thorpej pool_put(&lwp_uc_pool, uc);
677 1.10 thorpej
678 1.20 cl /* Invoke MI userret code */
679 1.20 cl mi_userret(l);
680 1.10 thorpej
681 1.10 thorpej curcpu()->ci_schedstate.spc_curpriority = l->l_priority = l->l_usrpri;
682 1.1 simonb }
683